1 ; RUN: llc < %s -mtriple=thumbv7-apple-darwin9 -mcpu=cortex-a8 -relocation-model=pic -frame-pointer=all -arm-atomic-cfg-tidy=0 | FileCheck %s
3 @csize = external global [100 x [20 x [4 x i8]]] ; <ptr> [#uses=1]
4 @vsize = external global [100 x [20 x [4 x i8]]] ; <ptr> [#uses=1]
5 @cll = external global [20 x [10 x i8]] ; <ptr> [#uses=1]
6 @lefline = external global [100 x [20 x i32]] ; <ptr> [#uses=1]
7 @sep = external global [20 x i32] ; <ptr> [#uses=1]
9 define void @main(i32 %argc, ptr %argv) noreturn nounwind {
13 %nb.i.i.i = alloca [25 x i8], align 1 ; <ptr> [#uses=0]
14 %line.i.i.i = alloca [200 x i8], align 1 ; <ptr> [#uses=1]
15 %line.i = alloca [1024 x i8], align 1 ; <ptr> [#uses=0]
16 br i1 undef, label %bb.i.i, label %bb4.preheader.i
18 bb.i.i: ; preds = %entry
21 bb4.preheader.i: ; preds = %entry
22 br i1 undef, label %tbl.exit, label %bb.i.preheader
24 bb.i.preheader: ; preds = %bb4.preheader.i
25 %line3.i.i.i = getelementptr [200 x i8], ptr %line.i.i.i, i32 0, i32 0 ; <ptr> [#uses=1]
28 bb.i: ; preds = %bb4.backedge.i, %bb.i.preheader
29 br i1 undef, label %bb3.i, label %bb4.backedge.i
31 bb3.i: ; preds = %bb.i
32 br i1 undef, label %bb2.i184.i.i, label %bb.i183.i.i
34 bb.i183.i.i: ; preds = %bb.i183.i.i, %bb3.i
35 br i1 undef, label %bb2.i184.i.i, label %bb.i183.i.i
37 bb2.i184.i.i: ; preds = %bb.i183.i.i, %bb3.i
38 br i1 undef, label %bb5.i185.i.i, label %bb35.preheader.i.i.i
40 bb35.preheader.i.i.i: ; preds = %bb2.i184.i.i
41 %0 = load i8, ptr %line3.i.i.i, align 1 ; <i8> [#uses=1]
42 %1 = icmp eq i8 %0, 59 ; <i1> [#uses=1]
43 br i1 %1, label %bb36.i.i.i, label %bb9.i186.i.i
45 bb5.i185.i.i: ; preds = %bb2.i184.i.i
48 bb9.i186.i.i: ; preds = %bb35.preheader.i.i.i
51 bb36.i.i.i: ; preds = %bb35.preheader.i.i.i
54 bb.i171.i.i: ; preds = %bb3.i176.i.i, %bb36.i.i.i, %bb5.i185.i.i
55 %2 = phi i32 [ %4, %bb3.i176.i.i ], [ 0, %bb36.i.i.i ], [ 0, %bb5.i185.i.i ] ; <i32> [#uses=6]
56 %scevgep16.i.i.i = getelementptr [20 x i32], ptr @sep, i32 0, i32 %2 ; <ptr> [#uses=1]
57 %scevgep18.i.i.i = getelementptr [20 x [10 x i8]], ptr @cll, i32 0, i32 %2, i32 0 ; <ptr> [#uses=0]
58 store i32 -1, ptr %scevgep16.i.i.i, align 4
59 br label %bb1.i175.i.i
61 bb1.i175.i.i: ; preds = %bb1.i175.i.i, %bb.i171.i.i
62 %i.03.i172.i.i = phi i32 [ 0, %bb.i171.i.i ], [ %3, %bb1.i175.i.i ] ; <i32> [#uses=4]
63 %scevgep11.i.i.i = getelementptr [100 x [20 x i32]], ptr @lefline, i32 0, i32 %i.03.i172.i.i, i32 %2 ; <ptr> [#uses=1]
64 %scevgep12.i.i.i = getelementptr [100 x [20 x [4 x i8]]], ptr @vsize, i32 0, i32 %i.03.i172.i.i, i32 %2, i32 0 ; <ptr> [#uses=1]
65 %scevgep13.i.i.i = getelementptr [100 x [20 x [4 x i8]]], ptr @csize, i32 0, i32 %i.03.i172.i.i, i32 %2, i32 0 ; <ptr> [#uses=0]
66 store i8 0, ptr %scevgep12.i.i.i, align 1
67 store i32 0, ptr %scevgep11.i.i.i, align 4
68 store i32 108, ptr undef, align 4
69 %3 = add i32 %i.03.i172.i.i, 1 ; <i32> [#uses=2]
70 %exitcond.i174.i.i = icmp eq i32 %3, 100 ; <i1> [#uses=1]
71 br i1 %exitcond.i174.i.i, label %bb3.i176.i.i, label %bb1.i175.i.i
73 bb3.i176.i.i: ; preds = %bb1.i175.i.i
74 %4 = add i32 %2, 1 ; <i32> [#uses=1]
75 br i1 undef, label %bb5.i177.i.i, label %bb.i171.i.i
77 bb5.i177.i.i: ; preds = %bb3.i176.i.i
80 bb4.backedge.i: ; preds = %bb.i
81 br i1 undef, label %tbl.exit, label %bb.i
83 tbl.exit: ; preds = %bb4.backedge.i, %bb4.preheader.i