| blob | 26af46263c0e2cd3e729cd25f2ad0178b65b363c |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
4 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW
6 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
7 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST
8 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
9 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
10 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL
11 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
12 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW
13 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL,AVX512BWVL-ONLY
14 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL,AVX512BWVL-ONLY
15 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi,+avx512vl,+fast-variable-crosslane-shuffle,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL,AVX512VBMI,AVX512VBMI-FAST
16 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vbmi,+avx512vl,+fast-variable-perlane-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL,AVX512VBMI,AVX512VBMI-SLOW
18 ; PR31551
19 ; Pairs of shufflevector:trunc functions with functional equivalence.
20 ; Ideally, the shuffles should be lowered to code with the same quality as the truncates.
22 define void @shuffle_v16i8_to_v8i8(ptr %L, ptr %S) nounwind {
23 ; SSE2-LABEL: shuffle_v16i8_to_v8i8:
24 ; SSE2: # %bb.0:
25 ; SSE2-NEXT: movdqa (%rdi), %xmm0
26 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
27 ; SSE2-NEXT: packuswb %xmm0, %xmm0
28 ; SSE2-NEXT: movq %xmm0, (%rsi)
29 ; SSE2-NEXT: retq
30 ;
31 ; SSE42-LABEL: shuffle_v16i8_to_v8i8:
32 ; SSE42: # %bb.0:
33 ; SSE42-NEXT: movdqa (%rdi), %xmm0
34 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
35 ; SSE42-NEXT: movq %xmm0, (%rsi)
36 ; SSE42-NEXT: retq
37 ;
38 ; AVX-LABEL: shuffle_v16i8_to_v8i8:
39 ; AVX: # %bb.0:
40 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
41 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
42 ; AVX-NEXT: vmovq %xmm0, (%rsi)
43 ; AVX-NEXT: retq
44 ;
45 ; AVX512F-LABEL: shuffle_v16i8_to_v8i8:
46 ; AVX512F: # %bb.0:
47 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
48 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
49 ; AVX512F-NEXT: vmovq %xmm0, (%rsi)
50 ; AVX512F-NEXT: retq
51 ;
52 ; AVX512VL-LABEL: shuffle_v16i8_to_v8i8:
53 ; AVX512VL: # %bb.0:
54 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
55 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
56 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi)
57 ; AVX512VL-NEXT: retq
58 ;
59 ; AVX512BW-LABEL: shuffle_v16i8_to_v8i8:
60 ; AVX512BW: # %bb.0:
61 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
62 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
63 ; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
64 ; AVX512BW-NEXT: retq
65 ;
66 ; AVX512BWVL-LABEL: shuffle_v16i8_to_v8i8:
67 ; AVX512BWVL: # %bb.0:
68 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
69 ; AVX512BWVL-NEXT: vpmovwb %xmm0, (%rsi)
70 ; AVX512BWVL-NEXT: retq
71 %vec = load <16 x i8>, ptr %L
72 %strided.vec = shufflevector <16 x i8> %vec, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
73 store <8 x i8> %strided.vec, ptr %S
74 ret void
75 }
77 define void @trunc_v8i16_to_v8i8(ptr %L, ptr %S) nounwind {
78 ; SSE2-LABEL: trunc_v8i16_to_v8i8:
79 ; SSE2: # %bb.0:
80 ; SSE2-NEXT: movdqa (%rdi), %xmm0
81 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
82 ; SSE2-NEXT: packuswb %xmm0, %xmm0
83 ; SSE2-NEXT: movq %xmm0, (%rsi)
84 ; SSE2-NEXT: retq
85 ;
86 ; SSE42-LABEL: trunc_v8i16_to_v8i8:
87 ; SSE42: # %bb.0:
88 ; SSE42-NEXT: movdqa (%rdi), %xmm0
89 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
90 ; SSE42-NEXT: movq %xmm0, (%rsi)
91 ; SSE42-NEXT: retq
92 ;
93 ; AVX-LABEL: trunc_v8i16_to_v8i8:
94 ; AVX: # %bb.0:
95 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
96 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
97 ; AVX-NEXT: vmovq %xmm0, (%rsi)
98 ; AVX-NEXT: retq
99 ;
100 ; AVX512F-LABEL: trunc_v8i16_to_v8i8:
101 ; AVX512F: # %bb.0:
102 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
103 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
104 ; AVX512F-NEXT: vmovq %xmm0, (%rsi)
105 ; AVX512F-NEXT: retq
106 ;
107 ; AVX512VL-LABEL: trunc_v8i16_to_v8i8:
108 ; AVX512VL: # %bb.0:
109 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
110 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
111 ; AVX512VL-NEXT: vmovq %xmm0, (%rsi)
112 ; AVX512VL-NEXT: retq
113 ;
114 ; AVX512BW-LABEL: trunc_v8i16_to_v8i8:
115 ; AVX512BW: # %bb.0:
116 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
117 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
118 ; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
119 ; AVX512BW-NEXT: retq
120 ;
121 ; AVX512BWVL-LABEL: trunc_v8i16_to_v8i8:
122 ; AVX512BWVL: # %bb.0:
123 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
124 ; AVX512BWVL-NEXT: vpmovwb %xmm0, (%rsi)
125 ; AVX512BWVL-NEXT: retq
126 %vec = load <16 x i8>, ptr %L
127 %bc = bitcast <16 x i8> %vec to <8 x i16>
128 %strided.vec = trunc <8 x i16> %bc to <8 x i8>
129 store <8 x i8> %strided.vec, ptr %S
130 ret void
131 }
133 define void @shuffle_v8i16_to_v4i16(ptr %L, ptr %S) nounwind {
134 ; SSE2-LABEL: shuffle_v8i16_to_v4i16:
135 ; SSE2: # %bb.0:
136 ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
137 ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
138 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
139 ; SSE2-NEXT: movq %xmm0, (%rsi)
140 ; SSE2-NEXT: retq
141 ;
142 ; SSE42-LABEL: shuffle_v8i16_to_v4i16:
143 ; SSE42: # %bb.0:
144 ; SSE42-NEXT: movdqa (%rdi), %xmm0
145 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
146 ; SSE42-NEXT: movq %xmm0, (%rsi)
147 ; SSE42-NEXT: retq
148 ;
149 ; AVX-LABEL: shuffle_v8i16_to_v4i16:
150 ; AVX: # %bb.0:
151 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
152 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
153 ; AVX-NEXT: vmovq %xmm0, (%rsi)
154 ; AVX-NEXT: retq
155 ;
156 ; AVX512F-LABEL: shuffle_v8i16_to_v4i16:
157 ; AVX512F: # %bb.0:
158 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
159 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
160 ; AVX512F-NEXT: vmovq %xmm0, (%rsi)
161 ; AVX512F-NEXT: retq
162 ;
163 ; AVX512VL-LABEL: shuffle_v8i16_to_v4i16:
164 ; AVX512VL: # %bb.0:
165 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
166 ; AVX512VL-NEXT: vpmovdw %xmm0, (%rsi)
167 ; AVX512VL-NEXT: retq
168 ;
169 ; AVX512BW-LABEL: shuffle_v8i16_to_v4i16:
170 ; AVX512BW: # %bb.0:
171 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
172 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
173 ; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
174 ; AVX512BW-NEXT: retq
175 ;
176 ; AVX512BWVL-LABEL: shuffle_v8i16_to_v4i16:
177 ; AVX512BWVL: # %bb.0:
178 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
179 ; AVX512BWVL-NEXT: vpmovdw %xmm0, (%rsi)
180 ; AVX512BWVL-NEXT: retq
181 %vec = load <8 x i16>, ptr %L
182 %strided.vec = shufflevector <8 x i16> %vec, <8 x i16> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
183 store <4 x i16> %strided.vec, ptr %S
184 ret void
185 }
187 define void @trunc_v4i32_to_v4i16(ptr %L, ptr %S) nounwind {
188 ; SSE2-LABEL: trunc_v4i32_to_v4i16:
189 ; SSE2: # %bb.0:
190 ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = mem[0,2,2,3,4,5,6,7]
191 ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
192 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
193 ; SSE2-NEXT: movq %xmm0, (%rsi)
194 ; SSE2-NEXT: retq
195 ;
196 ; SSE42-LABEL: trunc_v4i32_to_v4i16:
197 ; SSE42: # %bb.0:
198 ; SSE42-NEXT: movdqa (%rdi), %xmm0
199 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
200 ; SSE42-NEXT: movq %xmm0, (%rsi)
201 ; SSE42-NEXT: retq
202 ;
203 ; AVX-LABEL: trunc_v4i32_to_v4i16:
204 ; AVX: # %bb.0:
205 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
206 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
207 ; AVX-NEXT: vmovq %xmm0, (%rsi)
208 ; AVX-NEXT: retq
209 ;
210 ; AVX512F-LABEL: trunc_v4i32_to_v4i16:
211 ; AVX512F: # %bb.0:
212 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
213 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
214 ; AVX512F-NEXT: vmovq %xmm0, (%rsi)
215 ; AVX512F-NEXT: retq
216 ;
217 ; AVX512VL-LABEL: trunc_v4i32_to_v4i16:
218 ; AVX512VL: # %bb.0:
219 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
220 ; AVX512VL-NEXT: vpmovdw %xmm0, (%rsi)
221 ; AVX512VL-NEXT: retq
222 ;
223 ; AVX512BW-LABEL: trunc_v4i32_to_v4i16:
224 ; AVX512BW: # %bb.0:
225 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
226 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u]
227 ; AVX512BW-NEXT: vmovq %xmm0, (%rsi)
228 ; AVX512BW-NEXT: retq
229 ;
230 ; AVX512BWVL-LABEL: trunc_v4i32_to_v4i16:
231 ; AVX512BWVL: # %bb.0:
232 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
233 ; AVX512BWVL-NEXT: vpmovdw %xmm0, (%rsi)
234 ; AVX512BWVL-NEXT: retq
235 %vec = load <8 x i16>, ptr %L
236 %bc = bitcast <8 x i16> %vec to <4 x i32>
237 %strided.vec = trunc <4 x i32> %bc to <4 x i16>
238 store <4 x i16> %strided.vec, ptr %S
239 ret void
240 }
242 define void @shuffle_v4i32_to_v2i32(ptr %L, ptr %S) nounwind {
243 ; SSE-LABEL: shuffle_v4i32_to_v2i32:
244 ; SSE: # %bb.0:
245 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
246 ; SSE-NEXT: movq %xmm0, (%rsi)
247 ; SSE-NEXT: retq
248 ;
249 ; AVX-LABEL: shuffle_v4i32_to_v2i32:
250 ; AVX: # %bb.0:
251 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,2,2,3]
252 ; AVX-NEXT: vmovlps %xmm0, (%rsi)
253 ; AVX-NEXT: retq
254 ;
255 ; AVX512-LABEL: shuffle_v4i32_to_v2i32:
256 ; AVX512: # %bb.0:
257 ; AVX512-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,2,2,3]
258 ; AVX512-NEXT: vmovlps %xmm0, (%rsi)
259 ; AVX512-NEXT: retq
260 %vec = load <4 x i32>, ptr %L
261 %strided.vec = shufflevector <4 x i32> %vec, <4 x i32> undef, <2 x i32> <i32 0, i32 2>
262 store <2 x i32> %strided.vec, ptr %S
263 ret void
264 }
266 define void @trunc_v2i64_to_v2i32(ptr %L, ptr %S) nounwind {
267 ; SSE-LABEL: trunc_v2i64_to_v2i32:
268 ; SSE: # %bb.0:
269 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
270 ; SSE-NEXT: movq %xmm0, (%rsi)
271 ; SSE-NEXT: retq
272 ;
273 ; AVX-LABEL: trunc_v2i64_to_v2i32:
274 ; AVX: # %bb.0:
275 ; AVX-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,2,2,3]
276 ; AVX-NEXT: vmovlps %xmm0, (%rsi)
277 ; AVX-NEXT: retq
278 ;
279 ; AVX512F-LABEL: trunc_v2i64_to_v2i32:
280 ; AVX512F: # %bb.0:
281 ; AVX512F-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,2,2,3]
282 ; AVX512F-NEXT: vmovlps %xmm0, (%rsi)
283 ; AVX512F-NEXT: retq
284 ;
285 ; AVX512VL-LABEL: trunc_v2i64_to_v2i32:
286 ; AVX512VL: # %bb.0:
287 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
288 ; AVX512VL-NEXT: vpmovqd %xmm0, (%rsi)
289 ; AVX512VL-NEXT: retq
290 ;
291 ; AVX512BW-LABEL: trunc_v2i64_to_v2i32:
292 ; AVX512BW: # %bb.0:
293 ; AVX512BW-NEXT: vpermilps {{.*#+}} xmm0 = mem[0,2,2,3]
294 ; AVX512BW-NEXT: vmovlps %xmm0, (%rsi)
295 ; AVX512BW-NEXT: retq
296 ;
297 ; AVX512BWVL-LABEL: trunc_v2i64_to_v2i32:
298 ; AVX512BWVL: # %bb.0:
299 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
300 ; AVX512BWVL-NEXT: vpmovqd %xmm0, (%rsi)
301 ; AVX512BWVL-NEXT: retq
302 %vec = load <4 x i32>, ptr %L
303 %bc = bitcast <4 x i32> %vec to <2 x i64>
304 %strided.vec = trunc <2 x i64> %bc to <2 x i32>
305 store <2 x i32> %strided.vec, ptr %S
306 ret void
307 }
309 define void @shuffle_v16i8_to_v4i8(ptr %L, ptr %S) nounwind {
310 ; SSE2-LABEL: shuffle_v16i8_to_v4i8:
311 ; SSE2: # %bb.0:
312 ; SSE2-NEXT: movdqa (%rdi), %xmm0
313 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
314 ; SSE2-NEXT: packuswb %xmm0, %xmm0
315 ; SSE2-NEXT: packuswb %xmm0, %xmm0
316 ; SSE2-NEXT: movd %xmm0, (%rsi)
317 ; SSE2-NEXT: retq
318 ;
319 ; SSE42-LABEL: shuffle_v16i8_to_v4i8:
320 ; SSE42: # %bb.0:
321 ; SSE42-NEXT: movdqa (%rdi), %xmm0
322 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
323 ; SSE42-NEXT: movd %xmm0, (%rsi)
324 ; SSE42-NEXT: retq
325 ;
326 ; AVX-LABEL: shuffle_v16i8_to_v4i8:
327 ; AVX: # %bb.0:
328 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
329 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
330 ; AVX-NEXT: vmovd %xmm0, (%rsi)
331 ; AVX-NEXT: retq
332 ;
333 ; AVX512F-LABEL: shuffle_v16i8_to_v4i8:
334 ; AVX512F: # %bb.0:
335 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
336 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
337 ; AVX512F-NEXT: vmovd %xmm0, (%rsi)
338 ; AVX512F-NEXT: retq
339 ;
340 ; AVX512VL-LABEL: shuffle_v16i8_to_v4i8:
341 ; AVX512VL: # %bb.0:
342 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
343 ; AVX512VL-NEXT: vpmovdb %xmm0, (%rsi)
344 ; AVX512VL-NEXT: retq
345 ;
346 ; AVX512BW-LABEL: shuffle_v16i8_to_v4i8:
347 ; AVX512BW: # %bb.0:
348 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
349 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
350 ; AVX512BW-NEXT: vmovd %xmm0, (%rsi)
351 ; AVX512BW-NEXT: retq
352 ;
353 ; AVX512BWVL-LABEL: shuffle_v16i8_to_v4i8:
354 ; AVX512BWVL: # %bb.0:
355 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
356 ; AVX512BWVL-NEXT: vpmovdb %xmm0, (%rsi)
357 ; AVX512BWVL-NEXT: retq
358 %vec = load <16 x i8>, ptr %L
359 %strided.vec = shufflevector <16 x i8> %vec, <16 x i8> undef, <4 x i32> <i32 0, i32 4, i32 8, i32 12>
360 store <4 x i8> %strided.vec, ptr %S
361 ret void
362 }
364 define void @trunc_v4i32_to_v4i8(ptr %L, ptr %S) nounwind {
365 ; SSE2-LABEL: trunc_v4i32_to_v4i8:
366 ; SSE2: # %bb.0:
367 ; SSE2-NEXT: movdqa (%rdi), %xmm0
368 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
369 ; SSE2-NEXT: packuswb %xmm0, %xmm0
370 ; SSE2-NEXT: packuswb %xmm0, %xmm0
371 ; SSE2-NEXT: movd %xmm0, (%rsi)
372 ; SSE2-NEXT: retq
373 ;
374 ; SSE42-LABEL: trunc_v4i32_to_v4i8:
375 ; SSE42: # %bb.0:
376 ; SSE42-NEXT: movdqa (%rdi), %xmm0
377 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
378 ; SSE42-NEXT: movd %xmm0, (%rsi)
379 ; SSE42-NEXT: retq
380 ;
381 ; AVX-LABEL: trunc_v4i32_to_v4i8:
382 ; AVX: # %bb.0:
383 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
384 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
385 ; AVX-NEXT: vmovd %xmm0, (%rsi)
386 ; AVX-NEXT: retq
387 ;
388 ; AVX512F-LABEL: trunc_v4i32_to_v4i8:
389 ; AVX512F: # %bb.0:
390 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
391 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
392 ; AVX512F-NEXT: vmovd %xmm0, (%rsi)
393 ; AVX512F-NEXT: retq
394 ;
395 ; AVX512VL-LABEL: trunc_v4i32_to_v4i8:
396 ; AVX512VL: # %bb.0:
397 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
398 ; AVX512VL-NEXT: vpmovdb %xmm0, (%rsi)
399 ; AVX512VL-NEXT: retq
400 ;
401 ; AVX512BW-LABEL: trunc_v4i32_to_v4i8:
402 ; AVX512BW: # %bb.0:
403 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
404 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
405 ; AVX512BW-NEXT: vmovd %xmm0, (%rsi)
406 ; AVX512BW-NEXT: retq
407 ;
408 ; AVX512BWVL-LABEL: trunc_v4i32_to_v4i8:
409 ; AVX512BWVL: # %bb.0:
410 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
411 ; AVX512BWVL-NEXT: vpmovdb %xmm0, (%rsi)
412 ; AVX512BWVL-NEXT: retq
413 %vec = load <16 x i8>, ptr %L
414 %bc = bitcast <16 x i8> %vec to <4 x i32>
415 %strided.vec = trunc <4 x i32> %bc to <4 x i8>
416 store <4 x i8> %strided.vec, ptr %S
417 ret void
418 }
420 define void @shuffle_v8i16_to_v2i16(ptr %L, ptr %S) nounwind {
421 ; SSE-LABEL: shuffle_v8i16_to_v2i16:
422 ; SSE: # %bb.0:
423 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
424 ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
425 ; SSE-NEXT: movd %xmm0, (%rsi)
426 ; SSE-NEXT: retq
427 ;
428 ; AVX1-LABEL: shuffle_v8i16_to_v2i16:
429 ; AVX1: # %bb.0:
430 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3]
431 ; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
432 ; AVX1-NEXT: vmovd %xmm0, (%rsi)
433 ; AVX1-NEXT: retq
434 ;
435 ; AVX2-SLOW-LABEL: shuffle_v8i16_to_v2i16:
436 ; AVX2-SLOW: # %bb.0:
437 ; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3]
438 ; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
439 ; AVX2-SLOW-NEXT: vmovd %xmm0, (%rsi)
440 ; AVX2-SLOW-NEXT: retq
441 ;
442 ; AVX2-FAST-LABEL: shuffle_v8i16_to_v2i16:
443 ; AVX2-FAST: # %bb.0:
444 ; AVX2-FAST-NEXT: vmovdqa (%rdi), %xmm0
445 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u]
446 ; AVX2-FAST-NEXT: vmovd %xmm0, (%rsi)
447 ; AVX2-FAST-NEXT: retq
448 ;
449 ; AVX512F-LABEL: shuffle_v8i16_to_v2i16:
450 ; AVX512F: # %bb.0:
451 ; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3]
452 ; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
453 ; AVX512F-NEXT: vmovd %xmm0, (%rsi)
454 ; AVX512F-NEXT: retq
455 ;
456 ; AVX512VL-LABEL: shuffle_v8i16_to_v2i16:
457 ; AVX512VL: # %bb.0:
458 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
459 ; AVX512VL-NEXT: vpmovqw %xmm0, (%rsi)
460 ; AVX512VL-NEXT: retq
461 ;
462 ; AVX512BW-LABEL: shuffle_v8i16_to_v2i16:
463 ; AVX512BW: # %bb.0:
464 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
465 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u]
466 ; AVX512BW-NEXT: vmovd %xmm0, (%rsi)
467 ; AVX512BW-NEXT: retq
468 ;
469 ; AVX512BWVL-LABEL: shuffle_v8i16_to_v2i16:
470 ; AVX512BWVL: # %bb.0:
471 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
472 ; AVX512BWVL-NEXT: vpmovqw %xmm0, (%rsi)
473 ; AVX512BWVL-NEXT: retq
474 %vec = load <8 x i16>, ptr %L
475 %strided.vec = shufflevector <8 x i16> %vec, <8 x i16> undef, <2 x i32> <i32 0, i32 4>
476 store <2 x i16> %strided.vec, ptr %S
477 ret void
478 }
480 define void @trunc_v2i64_to_v2i16(ptr %L, ptr %S) nounwind {
481 ; SSE-LABEL: trunc_v2i64_to_v2i16:
482 ; SSE: # %bb.0:
483 ; SSE-NEXT: pshufd {{.*#+}} xmm0 = mem[0,2,2,3]
484 ; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
485 ; SSE-NEXT: movd %xmm0, (%rsi)
486 ; SSE-NEXT: retq
487 ;
488 ; AVX1-LABEL: trunc_v2i64_to_v2i16:
489 ; AVX1: # %bb.0:
490 ; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3]
491 ; AVX1-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
492 ; AVX1-NEXT: vmovd %xmm0, (%rsi)
493 ; AVX1-NEXT: retq
494 ;
495 ; AVX2-SLOW-LABEL: trunc_v2i64_to_v2i16:
496 ; AVX2-SLOW: # %bb.0:
497 ; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3]
498 ; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
499 ; AVX2-SLOW-NEXT: vmovd %xmm0, (%rsi)
500 ; AVX2-SLOW-NEXT: retq
501 ;
502 ; AVX2-FAST-LABEL: trunc_v2i64_to_v2i16:
503 ; AVX2-FAST: # %bb.0:
504 ; AVX2-FAST-NEXT: vmovdqa (%rdi), %xmm0
505 ; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u]
506 ; AVX2-FAST-NEXT: vmovd %xmm0, (%rsi)
507 ; AVX2-FAST-NEXT: retq
508 ;
509 ; AVX512F-LABEL: trunc_v2i64_to_v2i16:
510 ; AVX512F: # %bb.0:
511 ; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = mem[0,2,2,3]
512 ; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
513 ; AVX512F-NEXT: vmovd %xmm0, (%rsi)
514 ; AVX512F-NEXT: retq
515 ;
516 ; AVX512VL-LABEL: trunc_v2i64_to_v2i16:
517 ; AVX512VL: # %bb.0:
518 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
519 ; AVX512VL-NEXT: vpmovqw %xmm0, (%rsi)
520 ; AVX512VL-NEXT: retq
521 ;
522 ; AVX512BW-LABEL: trunc_v2i64_to_v2i16:
523 ; AVX512BW: # %bb.0:
524 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
525 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,8,9,u,u,u,u,u,u,u,u,u,u,u,u]
526 ; AVX512BW-NEXT: vmovd %xmm0, (%rsi)
527 ; AVX512BW-NEXT: retq
528 ;
529 ; AVX512BWVL-LABEL: trunc_v2i64_to_v2i16:
530 ; AVX512BWVL: # %bb.0:
531 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
532 ; AVX512BWVL-NEXT: vpmovqw %xmm0, (%rsi)
533 ; AVX512BWVL-NEXT: retq
534 %vec = load <8 x i16>, ptr %L
535 %bc = bitcast <8 x i16> %vec to <2 x i64>
536 %strided.vec = trunc <2 x i64> %bc to <2 x i16>
537 store <2 x i16> %strided.vec, ptr %S
538 ret void
539 }
541 define void @shuffle_v16i8_to_v2i8(ptr %L, ptr %S) nounwind {
542 ; SSE2-LABEL: shuffle_v16i8_to_v2i8:
543 ; SSE2: # %bb.0:
544 ; SSE2-NEXT: movdqa (%rdi), %xmm0
545 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
546 ; SSE2-NEXT: packuswb %xmm0, %xmm0
547 ; SSE2-NEXT: packuswb %xmm0, %xmm0
548 ; SSE2-NEXT: packuswb %xmm0, %xmm0
549 ; SSE2-NEXT: movd %xmm0, %eax
550 ; SSE2-NEXT: movw %ax, (%rsi)
551 ; SSE2-NEXT: retq
552 ;
553 ; SSE42-LABEL: shuffle_v16i8_to_v2i8:
554 ; SSE42: # %bb.0:
555 ; SSE42-NEXT: movdqa (%rdi), %xmm0
556 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
557 ; SSE42-NEXT: pextrw $0, %xmm0, (%rsi)
558 ; SSE42-NEXT: retq
559 ;
560 ; AVX-LABEL: shuffle_v16i8_to_v2i8:
561 ; AVX: # %bb.0:
562 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
563 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
564 ; AVX-NEXT: vpextrw $0, %xmm0, (%rsi)
565 ; AVX-NEXT: retq
566 ;
567 ; AVX512F-LABEL: shuffle_v16i8_to_v2i8:
568 ; AVX512F: # %bb.0:
569 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
570 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
571 ; AVX512F-NEXT: vpextrw $0, %xmm0, (%rsi)
572 ; AVX512F-NEXT: retq
573 ;
574 ; AVX512VL-LABEL: shuffle_v16i8_to_v2i8:
575 ; AVX512VL: # %bb.0:
576 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
577 ; AVX512VL-NEXT: vpmovqb %xmm0, (%rsi)
578 ; AVX512VL-NEXT: retq
579 ;
580 ; AVX512BW-LABEL: shuffle_v16i8_to_v2i8:
581 ; AVX512BW: # %bb.0:
582 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
583 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
584 ; AVX512BW-NEXT: vpextrw $0, %xmm0, (%rsi)
585 ; AVX512BW-NEXT: retq
586 ;
587 ; AVX512BWVL-LABEL: shuffle_v16i8_to_v2i8:
588 ; AVX512BWVL: # %bb.0:
589 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
590 ; AVX512BWVL-NEXT: vpmovqb %xmm0, (%rsi)
591 ; AVX512BWVL-NEXT: retq
592 %vec = load <16 x i8>, ptr %L
593 %strided.vec = shufflevector <16 x i8> %vec, <16 x i8> undef, <2 x i32> <i32 0, i32 8>
594 store <2 x i8> %strided.vec, ptr %S
595 ret void
596 }
598 define void @trunc_v2i64_to_v2i8(ptr %L, ptr %S) nounwind {
599 ; SSE2-LABEL: trunc_v2i64_to_v2i8:
600 ; SSE2: # %bb.0:
601 ; SSE2-NEXT: movdqa (%rdi), %xmm0
602 ; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
603 ; SSE2-NEXT: packuswb %xmm0, %xmm0
604 ; SSE2-NEXT: packuswb %xmm0, %xmm0
605 ; SSE2-NEXT: packuswb %xmm0, %xmm0
606 ; SSE2-NEXT: movd %xmm0, %eax
607 ; SSE2-NEXT: movw %ax, (%rsi)
608 ; SSE2-NEXT: retq
609 ;
610 ; SSE42-LABEL: trunc_v2i64_to_v2i8:
611 ; SSE42: # %bb.0:
612 ; SSE42-NEXT: movdqa (%rdi), %xmm0
613 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
614 ; SSE42-NEXT: pextrw $0, %xmm0, (%rsi)
615 ; SSE42-NEXT: retq
616 ;
617 ; AVX-LABEL: trunc_v2i64_to_v2i8:
618 ; AVX: # %bb.0:
619 ; AVX-NEXT: vmovdqa (%rdi), %xmm0
620 ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
621 ; AVX-NEXT: vpextrw $0, %xmm0, (%rsi)
622 ; AVX-NEXT: retq
623 ;
624 ; AVX512F-LABEL: trunc_v2i64_to_v2i8:
625 ; AVX512F: # %bb.0:
626 ; AVX512F-NEXT: vmovdqa (%rdi), %xmm0
627 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
628 ; AVX512F-NEXT: vpextrw $0, %xmm0, (%rsi)
629 ; AVX512F-NEXT: retq
630 ;
631 ; AVX512VL-LABEL: trunc_v2i64_to_v2i8:
632 ; AVX512VL: # %bb.0:
633 ; AVX512VL-NEXT: vmovdqa (%rdi), %xmm0
634 ; AVX512VL-NEXT: vpmovqb %xmm0, (%rsi)
635 ; AVX512VL-NEXT: retq
636 ;
637 ; AVX512BW-LABEL: trunc_v2i64_to_v2i8:
638 ; AVX512BW: # %bb.0:
639 ; AVX512BW-NEXT: vmovdqa (%rdi), %xmm0
640 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u]
641 ; AVX512BW-NEXT: vpextrw $0, %xmm0, (%rsi)
642 ; AVX512BW-NEXT: retq
643 ;
644 ; AVX512BWVL-LABEL: trunc_v2i64_to_v2i8:
645 ; AVX512BWVL: # %bb.0:
646 ; AVX512BWVL-NEXT: vmovdqa (%rdi), %xmm0
647 ; AVX512BWVL-NEXT: vpmovqb %xmm0, (%rsi)
648 ; AVX512BWVL-NEXT: retq
649 %vec = load <16 x i8>, ptr %L
650 %bc = bitcast <16 x i8> %vec to <2 x i64>
651 %strided.vec = trunc <2 x i64> %bc to <2 x i8>
652 store <2 x i8> %strided.vec, ptr %S
653 ret void
654 }
656 ; PR88030 - Select sub-elements and truncate
658 define <16 x i8> @evenelts_v32i16_shuffle_v16i16_to_v16i8(<32 x i16> %n2) nounwind {
659 ; SSE2-LABEL: evenelts_v32i16_shuffle_v16i16_to_v16i8:
660 ; SSE2: # %bb.0:
661 ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,0,255,0,255,0,255,0]
662 ; SSE2-NEXT: pand %xmm4, %xmm3
663 ; SSE2-NEXT: pand %xmm4, %xmm2
664 ; SSE2-NEXT: packuswb %xmm3, %xmm2
665 ; SSE2-NEXT: pand %xmm4, %xmm1
666 ; SSE2-NEXT: pand %xmm4, %xmm0
667 ; SSE2-NEXT: packuswb %xmm1, %xmm0
668 ; SSE2-NEXT: packuswb %xmm2, %xmm0
669 ; SSE2-NEXT: retq
670 ;
671 ; SSE42-LABEL: evenelts_v32i16_shuffle_v16i16_to_v16i8:
672 ; SSE42: # %bb.0:
673 ; SSE42-NEXT: movq {{.*#+}} xmm4 = [0,0,0,0,0,4,8,12,0,0,0,0,0,0,0,0]
674 ; SSE42-NEXT: pshufb %xmm4, %xmm3
675 ; SSE42-NEXT: pshufb %xmm4, %xmm2
676 ; SSE42-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
677 ; SSE42-NEXT: movd {{.*#+}} xmm3 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
678 ; SSE42-NEXT: pshufb %xmm3, %xmm1
679 ; SSE42-NEXT: pshufb %xmm3, %xmm0
680 ; SSE42-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
681 ; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
682 ; SSE42-NEXT: retq
683 ;
684 ; AVX1-LABEL: evenelts_v32i16_shuffle_v16i16_to_v16i8:
685 ; AVX1: # %bb.0:
686 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
687 ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm3 = [0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
688 ; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
689 ; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1
690 ; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
691 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
692 ; AVX1-NEXT: vmovd {{.*#+}} xmm3 = [0,4,8,12,0,0,0,0,0,0,0,0,0,0,0,0]
693 ; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
694 ; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
695 ; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
696 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
697 ; AVX1-NEXT: vzeroupper
698 ; AVX1-NEXT: retq
699 ;
700 ; AVX2-LABEL: evenelts_v32i16_shuffle_v16i16_to_v16i8:
701 ; AVX2: # %bb.0:
702 ; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12,0,4,8,12]
703 ; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0
704 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
705 ; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
706 ; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1
707 ; AVX2-NEXT: vpmovsxbd {{.*#+}} xmm2 = [0,0,0,4]
708 ; AVX2-NEXT: vpermd %ymm1, %ymm2, %ymm1
709 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
710 ; AVX2-NEXT: vzeroupper
711 ; AVX2-NEXT: retq
712 ;
713 ; AVX512-LABEL: evenelts_v32i16_shuffle_v16i16_to_v16i8:
714 ; AVX512: # %bb.0:
715 ; AVX512-NEXT: vpmovdb %zmm0, %xmm0
716 ; AVX512-NEXT: vzeroupper
717 ; AVX512-NEXT: retq
718 %n0 = bitcast <32 x i16> %n2 to <64 x i8>
719 %p = shufflevector <64 x i8> %n0, <64 x i8> poison, <16 x i32> <i32 0, i32 4, i32 8, i32 12, i32 16, i32 20, i32 24, i32 28, i32 32, i32 36, i32 40, i32 44, i32 48, i32 52, i32 56, i32 60>
720 ret <16 x i8> %p
721 }
723 define <16 x i8> @oddelts_v32i16_shuffle_v16i16_to_v16i8(<32 x i16> %n2) nounwind {
724 ; SSE2-LABEL: oddelts_v32i16_shuffle_v16i16_to_v16i8:
725 ; SSE2: # %bb.0:
726 ; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[3,1,2,3,4,5,6,7]
727 ; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,5,6,7]
728 ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
729 ; SSE2-NEXT: pand %xmm4, %xmm3
730 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,1,2,0]
731 ; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,7,6,5,4]
732 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[3,1,2,3,4,5,6,7]
733 ; SSE2-NEXT: pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,7,5,6,7]
734 ; SSE2-NEXT: pand %xmm4, %xmm2
735 ; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
736 ; SSE2-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[1,0,3,2,4,5,6,7]
737 ; SSE2-NEXT: packuswb %xmm3, %xmm2
738 ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[3,1,2,3,4,5,6,7]
739 ; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,5,6,7]
740 ; SSE2-NEXT: pand %xmm4, %xmm1
741 ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,2,0]
742 ; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4]
743 ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[3,1,2,3,4,5,6,7]
744 ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,5,6,7]
745 ; SSE2-NEXT: pand %xmm4, %xmm0
746 ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
747 ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
748 ; SSE2-NEXT: packuswb %xmm1, %xmm0
749 ; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,3],xmm2[0,3]
750 ; SSE2-NEXT: retq
751 ;
752 ; SSE42-LABEL: oddelts_v32i16_shuffle_v16i16_to_v16i8:
753 ; SSE42: # %bb.0:
754 ; SSE42-NEXT: movq {{.*#+}} xmm4 = [0,0,0,0,2,6,10,14,0,0,0,0,0,0,0,0]
755 ; SSE42-NEXT: pshufb %xmm4, %xmm3
756 ; SSE42-NEXT: pshufb %xmm4, %xmm2
757 ; SSE42-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
758 ; SSE42-NEXT: movd {{.*#+}} xmm3 = [2,6,10,14,0,0,0,0,0,0,0,0,0,0,0,0]
759 ; SSE42-NEXT: pshufb %xmm3, %xmm1
760 ; SSE42-NEXT: pshufb %xmm3, %xmm0
761 ; SSE42-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
762 ; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
763 ; SSE42-NEXT: retq
764 ;
765 ; AVX1-LABEL: oddelts_v32i16_shuffle_v16i16_to_v16i8:
766 ; AVX1: # %bb.0:
767 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
768 ; AVX1-NEXT: vbroadcastss {{.*#+}} xmm3 = [2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14]
769 ; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
770 ; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1
771 ; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
772 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2
773 ; AVX1-NEXT: vmovd {{.*#+}} xmm3 = [2,6,10,14,0,0,0,0,0,0,0,0,0,0,0,0]
774 ; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2
775 ; AVX1-NEXT: vpshufb %xmm3, %xmm0, %xmm0
776 ; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
777 ; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
778 ; AVX1-NEXT: vzeroupper
779 ; AVX1-NEXT: retq
780 ;
781 ; AVX2-LABEL: oddelts_v32i16_shuffle_v16i16_to_v16i8:
782 ; AVX2: # %bb.0:
783 ; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14,2,6,10,14]
784 ; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0
785 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm3
786 ; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1]
787 ; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1
788 ; AVX2-NEXT: vpmovsxbd {{.*#+}} xmm2 = [0,0,0,4]
789 ; AVX2-NEXT: vpermd %ymm1, %ymm2, %ymm1
790 ; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
791 ; AVX2-NEXT: vzeroupper
792 ; AVX2-NEXT: retq
793 ;
794 ; AVX512-LABEL: oddelts_v32i16_shuffle_v16i16_to_v16i8:
795 ; AVX512: # %bb.0:
796 ; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0
797 ; AVX512-NEXT: vpmovdb %zmm0, %xmm0
798 ; AVX512-NEXT: vzeroupper
799 ; AVX512-NEXT: retq
800 %n0 = bitcast <32 x i16> %n2 to <64 x i8>
801 %p = shufflevector <64 x i8> %n0, <64 x i8> poison, <16 x i32> <i32 2, i32 6, i32 10, i32 14, i32 18, i32 22, i32 26, i32 30, i32 34, i32 38, i32 42, i32 46, i32 50, i32 54, i32 58, i32 62>
802 ret <16 x i8> %p
803 }
805 define <16 x i8> @evenelts_v32i16_trunc_v16i16_to_v16i8(<32 x i16> %n2) nounwind {
806 ; SSE2-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
807 ; SSE2: # %bb.0:
808 ; SSE2-NEXT: pushq %rbp
809 ; SSE2-NEXT: pushq %r14
810 ; SSE2-NEXT: pushq %rbx
811 ; SSE2-NEXT: pextrw $2, %xmm0, %eax
812 ; SSE2-NEXT: pextrw $4, %xmm0, %ecx
813 ; SSE2-NEXT: pextrw $6, %xmm0, %edx
814 ; SSE2-NEXT: pextrw $2, %xmm1, %esi
815 ; SSE2-NEXT: pextrw $4, %xmm1, %edi
816 ; SSE2-NEXT: pextrw $6, %xmm1, %r8d
817 ; SSE2-NEXT: pextrw $2, %xmm2, %r9d
818 ; SSE2-NEXT: pextrw $4, %xmm2, %r10d
819 ; SSE2-NEXT: pextrw $6, %xmm2, %r11d
820 ; SSE2-NEXT: pextrw $2, %xmm3, %ebx
821 ; SSE2-NEXT: pextrw $4, %xmm3, %ebp
822 ; SSE2-NEXT: pextrw $6, %xmm3, %r14d
823 ; SSE2-NEXT: movd %r14d, %xmm4
824 ; SSE2-NEXT: movd %ebp, %xmm5
825 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
826 ; SSE2-NEXT: movd %ebx, %xmm4
827 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
828 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
829 ; SSE2-NEXT: movd %r11d, %xmm4
830 ; SSE2-NEXT: movd %r10d, %xmm5
831 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
832 ; SSE2-NEXT: movd %r9d, %xmm4
833 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
834 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3]
835 ; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
836 ; SSE2-NEXT: movd %r8d, %xmm3
837 ; SSE2-NEXT: movd %edi, %xmm4
838 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
839 ; SSE2-NEXT: movd %esi, %xmm3
840 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
841 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3]
842 ; SSE2-NEXT: movd %edx, %xmm3
843 ; SSE2-NEXT: movd %ecx, %xmm4
844 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
845 ; SSE2-NEXT: movd %eax, %xmm3
846 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
847 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3]
848 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
849 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
850 ; SSE2-NEXT: popq %rbx
851 ; SSE2-NEXT: popq %r14
852 ; SSE2-NEXT: popq %rbp
853 ; SSE2-NEXT: retq
854 ;
855 ; SSE42-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
856 ; SSE42: # %bb.0:
857 ; SSE42-NEXT: pushq %rbp
858 ; SSE42-NEXT: pushq %r14
859 ; SSE42-NEXT: pushq %rbx
860 ; SSE42-NEXT: pextrw $6, %xmm3, %eax
861 ; SSE42-NEXT: pextrw $4, %xmm3, %ecx
862 ; SSE42-NEXT: pextrw $2, %xmm3, %edx
863 ; SSE42-NEXT: movd %xmm3, %esi
864 ; SSE42-NEXT: pextrw $6, %xmm2, %edi
865 ; SSE42-NEXT: pextrw $4, %xmm2, %r8d
866 ; SSE42-NEXT: pextrw $2, %xmm2, %r9d
867 ; SSE42-NEXT: movd %xmm2, %r10d
868 ; SSE42-NEXT: pextrw $6, %xmm1, %r11d
869 ; SSE42-NEXT: pextrw $4, %xmm1, %ebx
870 ; SSE42-NEXT: pextrw $2, %xmm1, %ebp
871 ; SSE42-NEXT: movd %xmm1, %r14d
872 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
873 ; SSE42-NEXT: pinsrb $4, %r14d, %xmm0
874 ; SSE42-NEXT: pinsrb $5, %ebp, %xmm0
875 ; SSE42-NEXT: pinsrb $6, %ebx, %xmm0
876 ; SSE42-NEXT: pinsrb $7, %r11d, %xmm0
877 ; SSE42-NEXT: pinsrb $8, %r10d, %xmm0
878 ; SSE42-NEXT: pinsrb $9, %r9d, %xmm0
879 ; SSE42-NEXT: pinsrb $10, %r8d, %xmm0
880 ; SSE42-NEXT: pinsrb $11, %edi, %xmm0
881 ; SSE42-NEXT: pinsrb $12, %esi, %xmm0
882 ; SSE42-NEXT: pinsrb $13, %edx, %xmm0
883 ; SSE42-NEXT: pinsrb $14, %ecx, %xmm0
884 ; SSE42-NEXT: pinsrb $15, %eax, %xmm0
885 ; SSE42-NEXT: popq %rbx
886 ; SSE42-NEXT: popq %r14
887 ; SSE42-NEXT: popq %rbp
888 ; SSE42-NEXT: retq
889 ;
890 ; AVX1-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
891 ; AVX1: # %bb.0:
892 ; AVX1-NEXT: pushq %rbp
893 ; AVX1-NEXT: pushq %r14
894 ; AVX1-NEXT: pushq %rbx
895 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
896 ; AVX1-NEXT: vpextrw $6, %xmm2, %eax
897 ; AVX1-NEXT: vpextrw $4, %xmm2, %ecx
898 ; AVX1-NEXT: vpextrw $2, %xmm2, %edx
899 ; AVX1-NEXT: vmovd %xmm2, %esi
900 ; AVX1-NEXT: vpextrw $6, %xmm1, %edi
901 ; AVX1-NEXT: vpextrw $4, %xmm1, %r8d
902 ; AVX1-NEXT: vpextrw $2, %xmm1, %r9d
903 ; AVX1-NEXT: vmovd %xmm1, %r10d
904 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
905 ; AVX1-NEXT: vpextrw $6, %xmm1, %r11d
906 ; AVX1-NEXT: vpextrw $4, %xmm1, %ebx
907 ; AVX1-NEXT: vpextrw $2, %xmm1, %ebp
908 ; AVX1-NEXT: vmovd %xmm1, %r14d
909 ; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
910 ; AVX1-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
911 ; AVX1-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
912 ; AVX1-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
913 ; AVX1-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
914 ; AVX1-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
915 ; AVX1-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
916 ; AVX1-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
917 ; AVX1-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
918 ; AVX1-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
919 ; AVX1-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
920 ; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
921 ; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
922 ; AVX1-NEXT: popq %rbx
923 ; AVX1-NEXT: popq %r14
924 ; AVX1-NEXT: popq %rbp
925 ; AVX1-NEXT: vzeroupper
926 ; AVX1-NEXT: retq
927 ;
928 ; AVX2-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
929 ; AVX2: # %bb.0:
930 ; AVX2-NEXT: pushq %rbp
931 ; AVX2-NEXT: pushq %r14
932 ; AVX2-NEXT: pushq %rbx
933 ; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
934 ; AVX2-NEXT: vpextrw $6, %xmm2, %eax
935 ; AVX2-NEXT: vpextrw $4, %xmm2, %ecx
936 ; AVX2-NEXT: vpextrw $2, %xmm2, %edx
937 ; AVX2-NEXT: vmovd %xmm2, %esi
938 ; AVX2-NEXT: vpextrw $6, %xmm1, %edi
939 ; AVX2-NEXT: vpextrw $4, %xmm1, %r8d
940 ; AVX2-NEXT: vpextrw $2, %xmm1, %r9d
941 ; AVX2-NEXT: vmovd %xmm1, %r10d
942 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
943 ; AVX2-NEXT: vpextrw $6, %xmm1, %r11d
944 ; AVX2-NEXT: vpextrw $4, %xmm1, %ebx
945 ; AVX2-NEXT: vpextrw $2, %xmm1, %ebp
946 ; AVX2-NEXT: vmovd %xmm1, %r14d
947 ; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u]
948 ; AVX2-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
949 ; AVX2-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
950 ; AVX2-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
951 ; AVX2-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
952 ; AVX2-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
953 ; AVX2-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
954 ; AVX2-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
955 ; AVX2-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
956 ; AVX2-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
957 ; AVX2-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
958 ; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
959 ; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
960 ; AVX2-NEXT: popq %rbx
961 ; AVX2-NEXT: popq %r14
962 ; AVX2-NEXT: popq %rbp
963 ; AVX2-NEXT: vzeroupper
964 ; AVX2-NEXT: retq
965 ;
966 ; AVX512F-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
967 ; AVX512F: # %bb.0:
968 ; AVX512F-NEXT: pushq %rbp
969 ; AVX512F-NEXT: pushq %rbx
970 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm1
971 ; AVX512F-NEXT: vextracti32x4 $3, %zmm0, %xmm2
972 ; AVX512F-NEXT: vpextrw $6, %xmm2, %eax
973 ; AVX512F-NEXT: vpextrw $4, %xmm2, %ecx
974 ; AVX512F-NEXT: vpextrw $2, %xmm2, %edx
975 ; AVX512F-NEXT: vmovd %xmm2, %esi
976 ; AVX512F-NEXT: vextracti32x4 $2, %zmm0, %xmm2
977 ; AVX512F-NEXT: vpextrw $6, %xmm2, %edi
978 ; AVX512F-NEXT: vpextrw $4, %xmm2, %r8d
979 ; AVX512F-NEXT: vpextrw $2, %xmm2, %r9d
980 ; AVX512F-NEXT: vmovd %xmm2, %r10d
981 ; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0
982 ; AVX512F-NEXT: vpextrw $6, %xmm0, %r11d
983 ; AVX512F-NEXT: vpextrw $4, %xmm0, %ebx
984 ; AVX512F-NEXT: vpextrw $2, %xmm0, %ebp
985 ; AVX512F-NEXT: vpinsrb $5, %ebp, %xmm1, %xmm0
986 ; AVX512F-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
987 ; AVX512F-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
988 ; AVX512F-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
989 ; AVX512F-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
990 ; AVX512F-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
991 ; AVX512F-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
992 ; AVX512F-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
993 ; AVX512F-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
994 ; AVX512F-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
995 ; AVX512F-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
996 ; AVX512F-NEXT: popq %rbx
997 ; AVX512F-NEXT: popq %rbp
998 ; AVX512F-NEXT: vzeroupper
999 ; AVX512F-NEXT: retq
1000 ;
1001 ; AVX512VL-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
1002 ; AVX512VL: # %bb.0:
1003 ; AVX512VL-NEXT: pushq %rbp
1004 ; AVX512VL-NEXT: pushq %r14
1005 ; AVX512VL-NEXT: pushq %rbx
1006 ; AVX512VL-NEXT: vextracti32x4 $3, %zmm0, %xmm1
1007 ; AVX512VL-NEXT: vpextrw $6, %xmm1, %eax
1008 ; AVX512VL-NEXT: vpextrw $4, %xmm1, %ecx
1009 ; AVX512VL-NEXT: vpextrw $2, %xmm1, %edx
1010 ; AVX512VL-NEXT: vmovd %xmm1, %esi
1011 ; AVX512VL-NEXT: vextracti32x4 $2, %zmm0, %xmm1
1012 ; AVX512VL-NEXT: vpextrw $6, %xmm1, %edi
1013 ; AVX512VL-NEXT: vpextrw $4, %xmm1, %r8d
1014 ; AVX512VL-NEXT: vpextrw $2, %xmm1, %r9d
1015 ; AVX512VL-NEXT: vmovd %xmm1, %r10d
1016 ; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
1017 ; AVX512VL-NEXT: vpextrw $6, %xmm1, %r11d
1018 ; AVX512VL-NEXT: vpextrw $4, %xmm1, %ebx
1019 ; AVX512VL-NEXT: vpextrw $2, %xmm1, %ebp
1020 ; AVX512VL-NEXT: vmovd %xmm1, %r14d
1021 ; AVX512VL-NEXT: vpmovdb %xmm0, %xmm0
1022 ; AVX512VL-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1023 ; AVX512VL-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1024 ; AVX512VL-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1025 ; AVX512VL-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1026 ; AVX512VL-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1027 ; AVX512VL-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1028 ; AVX512VL-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1029 ; AVX512VL-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1030 ; AVX512VL-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1031 ; AVX512VL-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1032 ; AVX512VL-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1033 ; AVX512VL-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1034 ; AVX512VL-NEXT: popq %rbx
1035 ; AVX512VL-NEXT: popq %r14
1036 ; AVX512VL-NEXT: popq %rbp
1037 ; AVX512VL-NEXT: vzeroupper
1038 ; AVX512VL-NEXT: retq
1039 ;
1040 ; AVX512BW-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
1041 ; AVX512BW: # %bb.0:
1042 ; AVX512BW-NEXT: pushq %rbp
1043 ; AVX512BW-NEXT: pushq %rbx
1044 ; AVX512BW-NEXT: vpmovdb %zmm0, %xmm1
1045 ; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm2
1046 ; AVX512BW-NEXT: vpextrw $6, %xmm2, %eax
1047 ; AVX512BW-NEXT: vpextrw $4, %xmm2, %ecx
1048 ; AVX512BW-NEXT: vpextrw $2, %xmm2, %edx
1049 ; AVX512BW-NEXT: vmovd %xmm2, %esi
1050 ; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2
1051 ; AVX512BW-NEXT: vpextrw $6, %xmm2, %edi
1052 ; AVX512BW-NEXT: vpextrw $4, %xmm2, %r8d
1053 ; AVX512BW-NEXT: vpextrw $2, %xmm2, %r9d
1054 ; AVX512BW-NEXT: vmovd %xmm2, %r10d
1055 ; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm0
1056 ; AVX512BW-NEXT: vpextrw $6, %xmm0, %r11d
1057 ; AVX512BW-NEXT: vpextrw $4, %xmm0, %ebx
1058 ; AVX512BW-NEXT: vpextrw $2, %xmm0, %ebp
1059 ; AVX512BW-NEXT: vpinsrb $5, %ebp, %xmm1, %xmm0
1060 ; AVX512BW-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1061 ; AVX512BW-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1062 ; AVX512BW-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1063 ; AVX512BW-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1064 ; AVX512BW-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1065 ; AVX512BW-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1066 ; AVX512BW-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1067 ; AVX512BW-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1068 ; AVX512BW-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1069 ; AVX512BW-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1070 ; AVX512BW-NEXT: popq %rbx
1071 ; AVX512BW-NEXT: popq %rbp
1072 ; AVX512BW-NEXT: vzeroupper
1073 ; AVX512BW-NEXT: retq
1074 ;
1075 ; AVX512BWVL-ONLY-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
1076 ; AVX512BWVL-ONLY: # %bb.0:
1077 ; AVX512BWVL-ONLY-NEXT: pushq %rbp
1078 ; AVX512BWVL-ONLY-NEXT: pushq %r14
1079 ; AVX512BWVL-ONLY-NEXT: pushq %rbx
1080 ; AVX512BWVL-ONLY-NEXT: vextracti32x4 $3, %zmm0, %xmm1
1081 ; AVX512BWVL-ONLY-NEXT: vpextrw $6, %xmm1, %eax
1082 ; AVX512BWVL-ONLY-NEXT: vpextrw $4, %xmm1, %ecx
1083 ; AVX512BWVL-ONLY-NEXT: vpextrw $2, %xmm1, %edx
1084 ; AVX512BWVL-ONLY-NEXT: vmovd %xmm1, %esi
1085 ; AVX512BWVL-ONLY-NEXT: vextracti32x4 $2, %zmm0, %xmm1
1086 ; AVX512BWVL-ONLY-NEXT: vpextrw $6, %xmm1, %edi
1087 ; AVX512BWVL-ONLY-NEXT: vpextrw $4, %xmm1, %r8d
1088 ; AVX512BWVL-ONLY-NEXT: vpextrw $2, %xmm1, %r9d
1089 ; AVX512BWVL-ONLY-NEXT: vmovd %xmm1, %r10d
1090 ; AVX512BWVL-ONLY-NEXT: vextracti128 $1, %ymm0, %xmm1
1091 ; AVX512BWVL-ONLY-NEXT: vpextrw $6, %xmm1, %r11d
1092 ; AVX512BWVL-ONLY-NEXT: vpextrw $4, %xmm1, %ebx
1093 ; AVX512BWVL-ONLY-NEXT: vpextrw $2, %xmm1, %ebp
1094 ; AVX512BWVL-ONLY-NEXT: vmovd %xmm1, %r14d
1095 ; AVX512BWVL-ONLY-NEXT: vpmovdb %xmm0, %xmm0
1096 ; AVX512BWVL-ONLY-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1097 ; AVX512BWVL-ONLY-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1098 ; AVX512BWVL-ONLY-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1099 ; AVX512BWVL-ONLY-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1100 ; AVX512BWVL-ONLY-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1101 ; AVX512BWVL-ONLY-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1102 ; AVX512BWVL-ONLY-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1103 ; AVX512BWVL-ONLY-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1104 ; AVX512BWVL-ONLY-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1105 ; AVX512BWVL-ONLY-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1106 ; AVX512BWVL-ONLY-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1107 ; AVX512BWVL-ONLY-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1108 ; AVX512BWVL-ONLY-NEXT: popq %rbx
1109 ; AVX512BWVL-ONLY-NEXT: popq %r14
1110 ; AVX512BWVL-ONLY-NEXT: popq %rbp
1111 ; AVX512BWVL-ONLY-NEXT: vzeroupper
1112 ; AVX512BWVL-ONLY-NEXT: retq
1113 ;
1114 ; AVX512VBMI-FAST-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
1115 ; AVX512VBMI-FAST: # %bb.0:
1116 ; AVX512VBMI-FAST-NEXT: vmovdqa {{.*#+}} xmm1 = [0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,79]
1117 ; AVX512VBMI-FAST-NEXT: vpxor %xmm2, %xmm2, %xmm2
1118 ; AVX512VBMI-FAST-NEXT: vpermi2b %zmm2, %zmm0, %zmm1
1119 ; AVX512VBMI-FAST-NEXT: vextracti32x4 $3, %zmm0, %xmm0
1120 ; AVX512VBMI-FAST-NEXT: vpextrw $6, %xmm0, %eax
1121 ; AVX512VBMI-FAST-NEXT: vpinsrb $15, %eax, %xmm1, %xmm0
1122 ; AVX512VBMI-FAST-NEXT: vzeroupper
1123 ; AVX512VBMI-FAST-NEXT: retq
1124 ;
1125 ; AVX512VBMI-SLOW-LABEL: evenelts_v32i16_trunc_v16i16_to_v16i8:
1126 ; AVX512VBMI-SLOW: # %bb.0:
1127 ; AVX512VBMI-SLOW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,4,8,12,16,20,24,28,32,36,40,44,48,77,78,79]
1128 ; AVX512VBMI-SLOW-NEXT: vpxor %xmm2, %xmm2, %xmm2
1129 ; AVX512VBMI-SLOW-NEXT: vpermi2b %zmm2, %zmm0, %zmm1
1130 ; AVX512VBMI-SLOW-NEXT: vextracti32x4 $3, %zmm0, %xmm0
1131 ; AVX512VBMI-SLOW-NEXT: vpextrw $6, %xmm0, %eax
1132 ; AVX512VBMI-SLOW-NEXT: vpextrw $4, %xmm0, %ecx
1133 ; AVX512VBMI-SLOW-NEXT: vpextrw $2, %xmm0, %edx
1134 ; AVX512VBMI-SLOW-NEXT: vpinsrb $13, %edx, %xmm1, %xmm0
1135 ; AVX512VBMI-SLOW-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1136 ; AVX512VBMI-SLOW-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1137 ; AVX512VBMI-SLOW-NEXT: vzeroupper
1138 ; AVX512VBMI-SLOW-NEXT: retq
1139 %n0 = shufflevector <32 x i16> %n2, <32 x i16> poison, <16 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26, i32 28, i32 30>
1140 %n1 = trunc <16 x i16> %n0 to <16 x i8>
1141 ret <16 x i8> %n1
1142 }
1144 define <16 x i8> @oddelts_v32i16_trunc_v16i16_to_v16i8(<32 x i16> %n2) nounwind {
1145 ; SSE2-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1146 ; SSE2: # %bb.0:
1147 ; SSE2-NEXT: pextrw $7, %xmm3, %eax
1148 ; SSE2-NEXT: movd %eax, %xmm4
1149 ; SSE2-NEXT: pextrw $5, %xmm3, %eax
1150 ; SSE2-NEXT: movd %eax, %xmm5
1151 ; SSE2-NEXT: pextrw $3, %xmm3, %eax
1152 ; SSE2-NEXT: movd %eax, %xmm6
1153 ; SSE2-NEXT: pextrw $1, %xmm3, %eax
1154 ; SSE2-NEXT: movd %eax, %xmm3
1155 ; SSE2-NEXT: pextrw $7, %xmm2, %eax
1156 ; SSE2-NEXT: movd %eax, %xmm7
1157 ; SSE2-NEXT: pextrw $5, %xmm2, %eax
1158 ; SSE2-NEXT: movd %eax, %xmm8
1159 ; SSE2-NEXT: pextrw $3, %xmm2, %eax
1160 ; SSE2-NEXT: movd %eax, %xmm9
1161 ; SSE2-NEXT: pextrw $1, %xmm2, %eax
1162 ; SSE2-NEXT: movd %eax, %xmm2
1163 ; SSE2-NEXT: pextrw $7, %xmm1, %eax
1164 ; SSE2-NEXT: movd %eax, %xmm10
1165 ; SSE2-NEXT: pextrw $5, %xmm1, %eax
1166 ; SSE2-NEXT: movd %eax, %xmm11
1167 ; SSE2-NEXT: pextrw $3, %xmm1, %eax
1168 ; SSE2-NEXT: movd %eax, %xmm12
1169 ; SSE2-NEXT: pextrw $1, %xmm1, %eax
1170 ; SSE2-NEXT: movd %eax, %xmm1
1171 ; SSE2-NEXT: pextrw $7, %xmm0, %eax
1172 ; SSE2-NEXT: movd %eax, %xmm13
1173 ; SSE2-NEXT: pextrw $5, %xmm0, %eax
1174 ; SSE2-NEXT: movd %eax, %xmm14
1175 ; SSE2-NEXT: pextrw $3, %xmm0, %eax
1176 ; SSE2-NEXT: movd %eax, %xmm15
1177 ; SSE2-NEXT: pextrw $1, %xmm0, %eax
1178 ; SSE2-NEXT: movd %eax, %xmm0
1179 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
1180 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1],xmm3[2],xmm6[2],xmm3[3],xmm6[3],xmm3[4],xmm6[4],xmm3[5],xmm6[5],xmm3[6],xmm6[6],xmm3[7],xmm6[7]
1181 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3]
1182 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm8 = xmm8[0],xmm7[0],xmm8[1],xmm7[1],xmm8[2],xmm7[2],xmm8[3],xmm7[3],xmm8[4],xmm7[4],xmm8[5],xmm7[5],xmm8[6],xmm7[6],xmm8[7],xmm7[7]
1183 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm9[0],xmm2[1],xmm9[1],xmm2[2],xmm9[2],xmm2[3],xmm9[3],xmm2[4],xmm9[4],xmm2[5],xmm9[5],xmm2[6],xmm9[6],xmm2[7],xmm9[7]
1184 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3]
1185 ; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
1186 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm11 = xmm11[0],xmm10[0],xmm11[1],xmm10[1],xmm11[2],xmm10[2],xmm11[3],xmm10[3],xmm11[4],xmm10[4],xmm11[5],xmm10[5],xmm11[6],xmm10[6],xmm11[7],xmm10[7]
1187 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm12[0],xmm1[1],xmm12[1],xmm1[2],xmm12[2],xmm1[3],xmm12[3],xmm1[4],xmm12[4],xmm1[5],xmm12[5],xmm1[6],xmm12[6],xmm1[7],xmm12[7]
1188 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm11[0],xmm1[1],xmm11[1],xmm1[2],xmm11[2],xmm1[3],xmm11[3]
1189 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm14 = xmm14[0],xmm13[0],xmm14[1],xmm13[1],xmm14[2],xmm13[2],xmm14[3],xmm13[3],xmm14[4],xmm13[4],xmm14[5],xmm13[5],xmm14[6],xmm13[6],xmm14[7],xmm13[7]
1190 ; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm15[0],xmm0[1],xmm15[1],xmm0[2],xmm15[2],xmm0[3],xmm15[3],xmm0[4],xmm15[4],xmm0[5],xmm15[5],xmm0[6],xmm15[6],xmm0[7],xmm15[7]
1191 ; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm14[0],xmm0[1],xmm14[1],xmm0[2],xmm14[2],xmm0[3],xmm14[3]
1192 ; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1193 ; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
1194 ; SSE2-NEXT: retq
1195 ;
1196 ; SSE42-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1197 ; SSE42: # %bb.0:
1198 ; SSE42-NEXT: pushq %rbp
1199 ; SSE42-NEXT: pushq %r14
1200 ; SSE42-NEXT: pushq %rbx
1201 ; SSE42-NEXT: pextrw $7, %xmm3, %eax
1202 ; SSE42-NEXT: pextrw $5, %xmm3, %ecx
1203 ; SSE42-NEXT: pextrw $3, %xmm3, %edx
1204 ; SSE42-NEXT: pextrw $1, %xmm3, %esi
1205 ; SSE42-NEXT: pextrw $7, %xmm2, %edi
1206 ; SSE42-NEXT: pextrw $5, %xmm2, %r8d
1207 ; SSE42-NEXT: pextrw $3, %xmm2, %r9d
1208 ; SSE42-NEXT: pextrw $1, %xmm2, %r10d
1209 ; SSE42-NEXT: pextrw $7, %xmm1, %r11d
1210 ; SSE42-NEXT: pextrw $5, %xmm1, %ebx
1211 ; SSE42-NEXT: pextrw $3, %xmm1, %ebp
1212 ; SSE42-NEXT: pextrw $1, %xmm1, %r14d
1213 ; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1214 ; SSE42-NEXT: pinsrb $4, %r14d, %xmm0
1215 ; SSE42-NEXT: pinsrb $5, %ebp, %xmm0
1216 ; SSE42-NEXT: pinsrb $6, %ebx, %xmm0
1217 ; SSE42-NEXT: pinsrb $7, %r11d, %xmm0
1218 ; SSE42-NEXT: pinsrb $8, %r10d, %xmm0
1219 ; SSE42-NEXT: pinsrb $9, %r9d, %xmm0
1220 ; SSE42-NEXT: pinsrb $10, %r8d, %xmm0
1221 ; SSE42-NEXT: pinsrb $11, %edi, %xmm0
1222 ; SSE42-NEXT: pinsrb $12, %esi, %xmm0
1223 ; SSE42-NEXT: pinsrb $13, %edx, %xmm0
1224 ; SSE42-NEXT: pinsrb $14, %ecx, %xmm0
1225 ; SSE42-NEXT: pinsrb $15, %eax, %xmm0
1226 ; SSE42-NEXT: popq %rbx
1227 ; SSE42-NEXT: popq %r14
1228 ; SSE42-NEXT: popq %rbp
1229 ; SSE42-NEXT: retq
1230 ;
1231 ; AVX1-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1232 ; AVX1: # %bb.0:
1233 ; AVX1-NEXT: pushq %rbp
1234 ; AVX1-NEXT: pushq %r14
1235 ; AVX1-NEXT: pushq %rbx
1236 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
1237 ; AVX1-NEXT: vpextrw $7, %xmm2, %eax
1238 ; AVX1-NEXT: vpextrw $5, %xmm2, %ecx
1239 ; AVX1-NEXT: vpextrw $3, %xmm2, %edx
1240 ; AVX1-NEXT: vpextrw $1, %xmm2, %esi
1241 ; AVX1-NEXT: vpextrw $7, %xmm1, %edi
1242 ; AVX1-NEXT: vpextrw $5, %xmm1, %r8d
1243 ; AVX1-NEXT: vpextrw $3, %xmm1, %r9d
1244 ; AVX1-NEXT: vpextrw $1, %xmm1, %r10d
1245 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1
1246 ; AVX1-NEXT: vpextrw $7, %xmm1, %r11d
1247 ; AVX1-NEXT: vpextrw $5, %xmm1, %ebx
1248 ; AVX1-NEXT: vpextrw $3, %xmm1, %ebp
1249 ; AVX1-NEXT: vpextrw $1, %xmm1, %r14d
1250 ; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1251 ; AVX1-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1252 ; AVX1-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1253 ; AVX1-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1254 ; AVX1-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1255 ; AVX1-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1256 ; AVX1-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1257 ; AVX1-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1258 ; AVX1-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1259 ; AVX1-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1260 ; AVX1-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1261 ; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1262 ; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1263 ; AVX1-NEXT: popq %rbx
1264 ; AVX1-NEXT: popq %r14
1265 ; AVX1-NEXT: popq %rbp
1266 ; AVX1-NEXT: vzeroupper
1267 ; AVX1-NEXT: retq
1268 ;
1269 ; AVX2-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1270 ; AVX2: # %bb.0:
1271 ; AVX2-NEXT: pushq %rbp
1272 ; AVX2-NEXT: pushq %r14
1273 ; AVX2-NEXT: pushq %rbx
1274 ; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2
1275 ; AVX2-NEXT: vpextrw $7, %xmm2, %eax
1276 ; AVX2-NEXT: vpextrw $5, %xmm2, %ecx
1277 ; AVX2-NEXT: vpextrw $3, %xmm2, %edx
1278 ; AVX2-NEXT: vpextrw $1, %xmm2, %esi
1279 ; AVX2-NEXT: vpextrw $7, %xmm1, %edi
1280 ; AVX2-NEXT: vpextrw $5, %xmm1, %r8d
1281 ; AVX2-NEXT: vpextrw $3, %xmm1, %r9d
1282 ; AVX2-NEXT: vpextrw $1, %xmm1, %r10d
1283 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
1284 ; AVX2-NEXT: vpextrw $7, %xmm1, %r11d
1285 ; AVX2-NEXT: vpextrw $5, %xmm1, %ebx
1286 ; AVX2-NEXT: vpextrw $3, %xmm1, %ebp
1287 ; AVX2-NEXT: vpextrw $1, %xmm1, %r14d
1288 ; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1289 ; AVX2-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1290 ; AVX2-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1291 ; AVX2-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1292 ; AVX2-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1293 ; AVX2-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1294 ; AVX2-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1295 ; AVX2-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1296 ; AVX2-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1297 ; AVX2-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1298 ; AVX2-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1299 ; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1300 ; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1301 ; AVX2-NEXT: popq %rbx
1302 ; AVX2-NEXT: popq %r14
1303 ; AVX2-NEXT: popq %rbp
1304 ; AVX2-NEXT: vzeroupper
1305 ; AVX2-NEXT: retq
1306 ;
1307 ; AVX512F-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1308 ; AVX512F: # %bb.0:
1309 ; AVX512F-NEXT: pushq %rbp
1310 ; AVX512F-NEXT: pushq %r14
1311 ; AVX512F-NEXT: pushq %rbx
1312 ; AVX512F-NEXT: vextracti32x4 $3, %zmm0, %xmm1
1313 ; AVX512F-NEXT: vpextrw $7, %xmm1, %eax
1314 ; AVX512F-NEXT: vpextrw $5, %xmm1, %ecx
1315 ; AVX512F-NEXT: vpextrw $3, %xmm1, %edx
1316 ; AVX512F-NEXT: vpextrw $1, %xmm1, %esi
1317 ; AVX512F-NEXT: vextracti32x4 $2, %zmm0, %xmm1
1318 ; AVX512F-NEXT: vpextrw $7, %xmm1, %edi
1319 ; AVX512F-NEXT: vpextrw $5, %xmm1, %r8d
1320 ; AVX512F-NEXT: vpextrw $3, %xmm1, %r9d
1321 ; AVX512F-NEXT: vpextrw $1, %xmm1, %r10d
1322 ; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1
1323 ; AVX512F-NEXT: vpextrw $7, %xmm1, %r11d
1324 ; AVX512F-NEXT: vpextrw $5, %xmm1, %ebx
1325 ; AVX512F-NEXT: vpextrw $3, %xmm1, %ebp
1326 ; AVX512F-NEXT: vpextrw $1, %xmm1, %r14d
1327 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1328 ; AVX512F-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1329 ; AVX512F-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1330 ; AVX512F-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1331 ; AVX512F-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1332 ; AVX512F-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1333 ; AVX512F-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1334 ; AVX512F-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1335 ; AVX512F-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1336 ; AVX512F-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1337 ; AVX512F-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1338 ; AVX512F-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1339 ; AVX512F-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1340 ; AVX512F-NEXT: popq %rbx
1341 ; AVX512F-NEXT: popq %r14
1342 ; AVX512F-NEXT: popq %rbp
1343 ; AVX512F-NEXT: vzeroupper
1344 ; AVX512F-NEXT: retq
1345 ;
1346 ; AVX512VL-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1347 ; AVX512VL: # %bb.0:
1348 ; AVX512VL-NEXT: pushq %rbp
1349 ; AVX512VL-NEXT: pushq %r14
1350 ; AVX512VL-NEXT: pushq %rbx
1351 ; AVX512VL-NEXT: vextracti32x4 $3, %zmm0, %xmm1
1352 ; AVX512VL-NEXT: vpextrw $7, %xmm1, %eax
1353 ; AVX512VL-NEXT: vpextrw $5, %xmm1, %ecx
1354 ; AVX512VL-NEXT: vpextrw $3, %xmm1, %edx
1355 ; AVX512VL-NEXT: vpextrw $1, %xmm1, %esi
1356 ; AVX512VL-NEXT: vextracti32x4 $2, %zmm0, %xmm1
1357 ; AVX512VL-NEXT: vpextrw $7, %xmm1, %edi
1358 ; AVX512VL-NEXT: vpextrw $5, %xmm1, %r8d
1359 ; AVX512VL-NEXT: vpextrw $3, %xmm1, %r9d
1360 ; AVX512VL-NEXT: vpextrw $1, %xmm1, %r10d
1361 ; AVX512VL-NEXT: vextracti128 $1, %ymm0, %xmm1
1362 ; AVX512VL-NEXT: vpextrw $7, %xmm1, %r11d
1363 ; AVX512VL-NEXT: vpextrw $5, %xmm1, %ebx
1364 ; AVX512VL-NEXT: vpextrw $3, %xmm1, %ebp
1365 ; AVX512VL-NEXT: vpextrw $1, %xmm1, %r14d
1366 ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1367 ; AVX512VL-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1368 ; AVX512VL-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1369 ; AVX512VL-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1370 ; AVX512VL-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1371 ; AVX512VL-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1372 ; AVX512VL-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1373 ; AVX512VL-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1374 ; AVX512VL-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1375 ; AVX512VL-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1376 ; AVX512VL-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1377 ; AVX512VL-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1378 ; AVX512VL-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1379 ; AVX512VL-NEXT: popq %rbx
1380 ; AVX512VL-NEXT: popq %r14
1381 ; AVX512VL-NEXT: popq %rbp
1382 ; AVX512VL-NEXT: vzeroupper
1383 ; AVX512VL-NEXT: retq
1384 ;
1385 ; AVX512BW-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1386 ; AVX512BW: # %bb.0:
1387 ; AVX512BW-NEXT: pushq %rbp
1388 ; AVX512BW-NEXT: pushq %r14
1389 ; AVX512BW-NEXT: pushq %rbx
1390 ; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm1
1391 ; AVX512BW-NEXT: vpextrw $7, %xmm1, %eax
1392 ; AVX512BW-NEXT: vpextrw $5, %xmm1, %ecx
1393 ; AVX512BW-NEXT: vpextrw $3, %xmm1, %edx
1394 ; AVX512BW-NEXT: vpextrw $1, %xmm1, %esi
1395 ; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm1
1396 ; AVX512BW-NEXT: vpextrw $7, %xmm1, %edi
1397 ; AVX512BW-NEXT: vpextrw $5, %xmm1, %r8d
1398 ; AVX512BW-NEXT: vpextrw $3, %xmm1, %r9d
1399 ; AVX512BW-NEXT: vpextrw $1, %xmm1, %r10d
1400 ; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1
1401 ; AVX512BW-NEXT: vpextrw $7, %xmm1, %r11d
1402 ; AVX512BW-NEXT: vpextrw $5, %xmm1, %ebx
1403 ; AVX512BW-NEXT: vpextrw $3, %xmm1, %ebp
1404 ; AVX512BW-NEXT: vpextrw $1, %xmm1, %r14d
1405 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1406 ; AVX512BW-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1407 ; AVX512BW-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1408 ; AVX512BW-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1409 ; AVX512BW-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1410 ; AVX512BW-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1411 ; AVX512BW-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1412 ; AVX512BW-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1413 ; AVX512BW-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1414 ; AVX512BW-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1415 ; AVX512BW-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1416 ; AVX512BW-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1417 ; AVX512BW-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1418 ; AVX512BW-NEXT: popq %rbx
1419 ; AVX512BW-NEXT: popq %r14
1420 ; AVX512BW-NEXT: popq %rbp
1421 ; AVX512BW-NEXT: vzeroupper
1422 ; AVX512BW-NEXT: retq
1423 ;
1424 ; AVX512BWVL-ONLY-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1425 ; AVX512BWVL-ONLY: # %bb.0:
1426 ; AVX512BWVL-ONLY-NEXT: pushq %rbp
1427 ; AVX512BWVL-ONLY-NEXT: pushq %r14
1428 ; AVX512BWVL-ONLY-NEXT: pushq %rbx
1429 ; AVX512BWVL-ONLY-NEXT: vextracti32x4 $3, %zmm0, %xmm1
1430 ; AVX512BWVL-ONLY-NEXT: vpextrw $7, %xmm1, %eax
1431 ; AVX512BWVL-ONLY-NEXT: vpextrw $5, %xmm1, %ecx
1432 ; AVX512BWVL-ONLY-NEXT: vpextrw $3, %xmm1, %edx
1433 ; AVX512BWVL-ONLY-NEXT: vpextrw $1, %xmm1, %esi
1434 ; AVX512BWVL-ONLY-NEXT: vextracti32x4 $2, %zmm0, %xmm1
1435 ; AVX512BWVL-ONLY-NEXT: vpextrw $7, %xmm1, %edi
1436 ; AVX512BWVL-ONLY-NEXT: vpextrw $5, %xmm1, %r8d
1437 ; AVX512BWVL-ONLY-NEXT: vpextrw $3, %xmm1, %r9d
1438 ; AVX512BWVL-ONLY-NEXT: vpextrw $1, %xmm1, %r10d
1439 ; AVX512BWVL-ONLY-NEXT: vextracti128 $1, %ymm0, %xmm1
1440 ; AVX512BWVL-ONLY-NEXT: vpextrw $7, %xmm1, %r11d
1441 ; AVX512BWVL-ONLY-NEXT: vpextrw $5, %xmm1, %ebx
1442 ; AVX512BWVL-ONLY-NEXT: vpextrw $3, %xmm1, %ebp
1443 ; AVX512BWVL-ONLY-NEXT: vpextrw $1, %xmm1, %r14d
1444 ; AVX512BWVL-ONLY-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[2,6,10,14,u,u,u,u,u,u,u,u,u,u,u,u]
1445 ; AVX512BWVL-ONLY-NEXT: vpinsrb $4, %r14d, %xmm0, %xmm0
1446 ; AVX512BWVL-ONLY-NEXT: vpinsrb $5, %ebp, %xmm0, %xmm0
1447 ; AVX512BWVL-ONLY-NEXT: vpinsrb $6, %ebx, %xmm0, %xmm0
1448 ; AVX512BWVL-ONLY-NEXT: vpinsrb $7, %r11d, %xmm0, %xmm0
1449 ; AVX512BWVL-ONLY-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0
1450 ; AVX512BWVL-ONLY-NEXT: vpinsrb $9, %r9d, %xmm0, %xmm0
1451 ; AVX512BWVL-ONLY-NEXT: vpinsrb $10, %r8d, %xmm0, %xmm0
1452 ; AVX512BWVL-ONLY-NEXT: vpinsrb $11, %edi, %xmm0, %xmm0
1453 ; AVX512BWVL-ONLY-NEXT: vpinsrb $12, %esi, %xmm0, %xmm0
1454 ; AVX512BWVL-ONLY-NEXT: vpinsrb $13, %edx, %xmm0, %xmm0
1455 ; AVX512BWVL-ONLY-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1456 ; AVX512BWVL-ONLY-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1457 ; AVX512BWVL-ONLY-NEXT: popq %rbx
1458 ; AVX512BWVL-ONLY-NEXT: popq %r14
1459 ; AVX512BWVL-ONLY-NEXT: popq %rbp
1460 ; AVX512BWVL-ONLY-NEXT: vzeroupper
1461 ; AVX512BWVL-ONLY-NEXT: retq
1462 ;
1463 ; AVX512VBMI-FAST-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1464 ; AVX512VBMI-FAST: # %bb.0:
1465 ; AVX512VBMI-FAST-NEXT: vmovdqa {{.*#+}} xmm1 = [2,6,10,14,18,22,26,30,34,38,42,46,50,54,58,62]
1466 ; AVX512VBMI-FAST-NEXT: vpermb %zmm0, %zmm1, %zmm0
1467 ; AVX512VBMI-FAST-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0
1468 ; AVX512VBMI-FAST-NEXT: vzeroupper
1469 ; AVX512VBMI-FAST-NEXT: retq
1470 ;
1471 ; AVX512VBMI-SLOW-LABEL: oddelts_v32i16_trunc_v16i16_to_v16i8:
1472 ; AVX512VBMI-SLOW: # %bb.0:
1473 ; AVX512VBMI-SLOW-NEXT: vmovdqa {{.*#+}} xmm1 = [2,6,10,14,18,22,26,30,34,38,42,46,50,u,u,u]
1474 ; AVX512VBMI-SLOW-NEXT: vpermb %zmm0, %zmm1, %zmm1
1475 ; AVX512VBMI-SLOW-NEXT: vextracti32x4 $3, %zmm0, %xmm0
1476 ; AVX512VBMI-SLOW-NEXT: vpextrw $7, %xmm0, %eax
1477 ; AVX512VBMI-SLOW-NEXT: vpextrw $5, %xmm0, %ecx
1478 ; AVX512VBMI-SLOW-NEXT: vpextrw $3, %xmm0, %edx
1479 ; AVX512VBMI-SLOW-NEXT: vpinsrb $13, %edx, %xmm1, %xmm0
1480 ; AVX512VBMI-SLOW-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0
1481 ; AVX512VBMI-SLOW-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0
1482 ; AVX512VBMI-SLOW-NEXT: vzeroupper
1483 ; AVX512VBMI-SLOW-NEXT: retq
1484 %n0 = shufflevector <32 x i16> %n2, <32 x i16> poison, <16 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15, i32 17, i32 19, i32 21, i32 23, i32 25, i32 27, i32 29, i32 31>
1485 %n1 = trunc <16 x i16> %n0 to <16 x i8>
1486 ret <16 x i8> %n1
1487 }
1488 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
1489 ; AVX512VBMI: {{.*}}