1 ; REQUIRES: aarch64-registered-target
2 ; RUN: opt < %s -codegenprepare -mtriple=arm64-apple-ios -S | FileCheck %s
3 ; RUN: opt < %s -codegenprepare -mtriple=arm64-apple-ios -S --try-experimental-debuginfo-iterators | FileCheck %s
5 @first_ones = external global [65536 x i8]
7 define i32 @fct19(i64 %arg1) #0 !dbg !6 {
10 %x.sroa.1.0.extract.shift = lshr i64 %arg1, 16, !dbg !35
11 %x.sroa.1.0.extract.trunc = trunc i64 %x.sroa.1.0.extract.shift to i16, !dbg !36
13 %x.sroa.3.0.extract.shift = lshr i64 %arg1, 32, !dbg !37
14 call void @llvm.dbg.value(metadata i64 %x.sroa.3.0.extract.shift, metadata !13, metadata !DIExpression()), !dbg !37
15 ; CHECK: #dbg_value(i64 %arg1, {{.*}}, !DIExpression(DW_OP_constu, 32, DW_OP_shr, DW_OP_stack_value), [[shift2_loc:![0-9]+]]
17 %x.sroa.5.0.extract.shift = lshr i64 %arg1, 48, !dbg !38
18 %tobool = icmp eq i64 %x.sroa.5.0.extract.shift, 0, !dbg !39
19 br i1 %tobool, label %if.end, label %if.then, !dbg !40
21 if.then: ; preds = %entry
22 %arrayidx3 = getelementptr inbounds [65536 x i8], ptr @first_ones, i64 0, i64 %x.sroa.5.0.extract.shift, !dbg !41
23 %0 = load i8, ptr %arrayidx3, align 1, !dbg !42
24 %conv = zext i8 %0 to i32, !dbg !43
25 br label %return, !dbg !44
27 if.end: ; preds = %entry
28 ; CHECK-LABEL: if.end:
29 ; CHECK-NEXT: lshr i64 %arg1, 32, !dbg [[shift2_loc]]
30 %x.sroa.3.0.extract.trunc = trunc i64 %x.sroa.3.0.extract.shift to i16, !dbg !45
31 %tobool6 = icmp eq i16 %x.sroa.3.0.extract.trunc, 0, !dbg !46
32 br i1 %tobool6, label %if.end13, label %if.then7, !dbg !47
34 if.then7: ; preds = %if.end
35 %idxprom10 = and i64 %x.sroa.3.0.extract.shift, 65535, !dbg !48
36 %arrayidx11 = getelementptr inbounds [65536 x i8], ptr @first_ones, i64 0, i64 %idxprom10, !dbg !49
37 %1 = load i8, ptr %arrayidx11, align 1, !dbg !50
38 %conv12 = zext i8 %1 to i32, !dbg !51
39 %add = add nsw i32 %conv12, 16, !dbg !52
40 br label %return, !dbg !53
42 if.end13: ; preds = %if.end
43 ; CHECK-LABEL: if.end13:
44 ; CHECK-NEXT: [[shift1:%.*]] = lshr i64 %arg1, 16, !dbg [[shift1_loc:![0-9]+]]
45 ; CHECK-NEXT: trunc i64 [[shift1]] to i16, !dbg [[trunc1_loc:![0-9]+]]
46 %tobool16 = icmp eq i16 %x.sroa.1.0.extract.trunc, 0, !dbg !54
47 br i1 %tobool16, label %return, label %if.then17, !dbg !55
49 if.then17: ; preds = %if.end13
50 %idxprom20 = and i64 %x.sroa.1.0.extract.shift, 65535, !dbg !56
51 %arrayidx21 = getelementptr inbounds [65536 x i8], ptr @first_ones, i64 0, i64 %idxprom20, !dbg !57
52 %2 = load i8, ptr %arrayidx21, align 1, !dbg !58
53 %conv22 = zext i8 %2 to i32, !dbg !59
54 %add23 = add nsw i32 %conv22, 32, !dbg !60
55 br label %return, !dbg !61
57 return: ; preds = %if.then17, %if.end13, %if.then7, %if.then
58 %retval.0 = phi i32 [ %conv, %if.then ], [ %add, %if.then7 ], [ %add23, %if.then17 ], [ 64, %if.end13 ], !dbg !62
59 ret i32 %retval.0, !dbg !63
62 ; CodeGenPrepare was erasing the unused lshr instruction, but then further
63 ; processing the instruction after it was freed. If this bug is still present,
64 ; this test will always crash in an LLVM built with ASAN enabled, and may
65 ; crash even if ASAN is not enabled.
67 define i32 @shift_unused(i32 %a) {
68 ; CHECK-LABEL: @shift_unused(
70 ; CHECK-NEXT: ret i32 [[A:%.*]]
79 ; CHECK: [[shift1_loc]] = !DILocation(line: 1
80 ; CHECK: [[trunc1_loc]] = !DILocation(line: 2
81 ; CHECK: [[shift2_loc]] = !DILocation(line: 3
83 declare void @llvm.dbg.value(metadata, metadata, metadata) #1
85 attributes #0 = { nounwind readonly ssp }
86 attributes #1 = { nounwind readnone speculatable }
89 !llvm.module.flags = !{!5}
91 !0 = distinct !DICompileUnit(language: DW_LANG_C, file: !1, producer: "debugify", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !2)
92 !1 = !DIFile(filename: "sink-shift-and-trunc.ll", directory: "/")
94 !5 = !{i32 2, !"Debug Info Version", i32 3}
95 !6 = distinct !DISubprogram(name: "fct19", linkageName: "fct19", scope: null, file: !1, line: 1, type: !7, isLocal: false, isDefinition: true, scopeLine: 1, isOptimized: true, unit: !0, retainedNodes: !8)
96 !7 = !DISubroutineType(types: !2)
98 !10 = !DIBasicType(name: "ty64", size: 64, encoding: DW_ATE_unsigned)
99 !13 = !DILocalVariable(name: "3", scope: !6, file: !1, line: 3, type: !10)
100 !35 = !DILocation(line: 1, column: 1, scope: !6)
101 !36 = !DILocation(line: 2, column: 1, scope: !6)
102 !37 = !DILocation(line: 3, column: 1, scope: !6)
103 !38 = !DILocation(line: 4, column: 1, scope: !6)
104 !39 = !DILocation(line: 5, column: 1, scope: !6)
105 !40 = !DILocation(line: 6, column: 1, scope: !6)
106 !41 = !DILocation(line: 7, column: 1, scope: !6)
107 !42 = !DILocation(line: 8, column: 1, scope: !6)
108 !43 = !DILocation(line: 9, column: 1, scope: !6)
109 !44 = !DILocation(line: 10, column: 1, scope: !6)
110 !45 = !DILocation(line: 11, column: 1, scope: !6)
111 !46 = !DILocation(line: 12, column: 1, scope: !6)
112 !47 = !DILocation(line: 13, column: 1, scope: !6)
113 !48 = !DILocation(line: 14, column: 1, scope: !6)
114 !49 = !DILocation(line: 15, column: 1, scope: !6)
115 !50 = !DILocation(line: 16, column: 1, scope: !6)
116 !51 = !DILocation(line: 17, column: 1, scope: !6)
117 !52 = !DILocation(line: 18, column: 1, scope: !6)
118 !53 = !DILocation(line: 19, column: 1, scope: !6)
119 !54 = !DILocation(line: 20, column: 1, scope: !6)
120 !55 = !DILocation(line: 21, column: 1, scope: !6)
121 !56 = !DILocation(line: 22, column: 1, scope: !6)
122 !57 = !DILocation(line: 23, column: 1, scope: !6)
123 !58 = !DILocation(line: 24, column: 1, scope: !6)
124 !59 = !DILocation(line: 25, column: 1, scope: !6)
125 !60 = !DILocation(line: 26, column: 1, scope: !6)
126 !61 = !DILocation(line: 27, column: 1, scope: !6)
127 !62 = !DILocation(line: 28, column: 1, scope: !6)
128 !63 = !DILocation(line: 29, column: 1, scope: !6)