1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -passes=loop-vectorize -force-vector-interleave=3 -force-vector-width=2 -S | FileCheck %s
4 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
6 ; Make sure the loop is vectorized and unrolled under -Os without folding its
7 ; tail based on its trip-count being provably divisible by chosen VFxIC.
9 define dso_local void @constTC(ptr noalias nocapture %A) optsize {
10 ; CHECK-LABEL: @constTC(
12 ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
14 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
16 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
17 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[INDEX]], 0
18 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i32, ptr [[A:%.*]], i32 [[TMP0]]
19 ; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 0
20 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 2
21 ; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds i32, ptr [[TMP3]], i32 4
22 ; CHECK-NEXT: store <2 x i32> splat (i32 13), ptr [[TMP6]], align 1
23 ; CHECK-NEXT: store <2 x i32> splat (i32 13), ptr [[TMP7]], align 1
24 ; CHECK-NEXT: store <2 x i32> splat (i32 13), ptr [[TMP8]], align 1
25 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 6
26 ; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i32 [[INDEX_NEXT]], 1800
27 ; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
28 ; CHECK: middle.block:
29 ; CHECK-NEXT: br i1 true, label [[EXIT:%.*]], label [[SCALAR_PH]]
31 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1800, [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ]
32 ; CHECK-NEXT: br label [[LOOP:%.*]]
34 ; CHECK-NEXT: [[RIV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[RIVPLUS1:%.*]], [[LOOP]] ]
35 ; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 [[RIV]]
36 ; CHECK-NEXT: store i32 13, ptr [[ARRAYIDX]], align 1
37 ; CHECK-NEXT: [[RIVPLUS1]] = add nuw nsw i32 [[RIV]], 1
38 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[RIVPLUS1]], 1800
39 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
41 ; CHECK-NEXT: ret void
47 %riv = phi i32 [ 0, %entry ], [ %rivPlus1, %loop ]
48 %arrayidx = getelementptr inbounds i32, ptr %A, i32 %riv
49 store i32 13, ptr %arrayidx, align 1
50 %rivPlus1 = add nuw nsw i32 %riv, 1
51 %cond = icmp eq i32 %rivPlus1, 1800
52 br i1 %cond, label %exit, label %loop