1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -passes=loop-vectorize -force-vector-width=2 -force-vector-interleave=1 -S %s | FileCheck %s
4 target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128-ni:1-p:16:16:16:16"
6 declare void @init(ptr nocapture nofree)
9 ; Test where offset relative to alloca is negative and we shouldn't
10 ; treat predicated loads as being always dereferenceable.
11 define i8 @test_negative_off(i16 %len, ptr %test_base) {
12 ; CHECK-LABEL: @test_negative_off(
14 ; CHECK-NEXT: [[ALLOCA:%.*]] = alloca [64638 x i8], align 1
15 ; CHECK-NEXT: call void @init(ptr [[ALLOCA]])
16 ; CHECK-NEXT: br i1 false, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
18 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
20 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_LOAD_CONTINUE2:%.*]] ]
21 ; CHECK-NEXT: [[VEC_PHI:%.*]] = phi <2 x i8> [ zeroinitializer, [[VECTOR_PH]] ], [ [[TMP18:%.*]], [[PRED_LOAD_CONTINUE2]] ]
22 ; CHECK-NEXT: [[DOTCAST:%.*]] = trunc i32 [[INDEX]] to i16
23 ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i16 -1000, [[DOTCAST]]
24 ; CHECK-NEXT: [[TMP0:%.*]] = add i16 [[OFFSET_IDX]], 0
25 ; CHECK-NEXT: [[TMP1:%.*]] = add i16 [[OFFSET_IDX]], 1
26 ; CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE:%.*]], i16 [[TMP0]]
27 ; CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i16 [[TMP1]]
28 ; CHECK-NEXT: [[TMP4:%.*]] = load i1, ptr [[TMP2]], align 1
29 ; CHECK-NEXT: [[TMP5:%.*]] = load i1, ptr [[TMP3]], align 1
30 ; CHECK-NEXT: [[TMP6:%.*]] = insertelement <2 x i1> poison, i1 [[TMP4]], i32 0
31 ; CHECK-NEXT: [[TMP7:%.*]] = insertelement <2 x i1> [[TMP6]], i1 [[TMP5]], i32 1
32 ; CHECK-NEXT: br i1 [[TMP4]], label [[PRED_LOAD_IF:%.*]], label [[PRED_LOAD_CONTINUE:%.*]]
33 ; CHECK: pred.load.if:
34 ; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i8, ptr [[ALLOCA]], i16 [[TMP0]]
35 ; CHECK-NEXT: [[TMP10:%.*]] = load i8, ptr [[TMP9]], align 1
36 ; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i8> poison, i8 [[TMP10]], i32 0
37 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE]]
38 ; CHECK: pred.load.continue:
39 ; CHECK-NEXT: [[TMP12:%.*]] = phi <2 x i8> [ poison, [[VECTOR_BODY]] ], [ [[TMP11]], [[PRED_LOAD_IF]] ]
40 ; CHECK-NEXT: br i1 [[TMP5]], label [[PRED_LOAD_IF1:%.*]], label [[PRED_LOAD_CONTINUE2]]
41 ; CHECK: pred.load.if1:
42 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr i8, ptr [[ALLOCA]], i16 [[TMP1]]
43 ; CHECK-NEXT: [[TMP15:%.*]] = load i8, ptr [[TMP14]], align 1
44 ; CHECK-NEXT: [[TMP16:%.*]] = insertelement <2 x i8> [[TMP12]], i8 [[TMP15]], i32 1
45 ; CHECK-NEXT: br label [[PRED_LOAD_CONTINUE2]]
46 ; CHECK: pred.load.continue2:
47 ; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i8> [ [[TMP12]], [[PRED_LOAD_CONTINUE]] ], [ [[TMP16]], [[PRED_LOAD_IF1]] ]
48 ; CHECK-NEXT: [[PREDPHI:%.*]] = select <2 x i1> [[TMP7]], <2 x i8> [[TMP17]], <2 x i8> zeroinitializer
49 ; CHECK-NEXT: [[TMP18]] = add <2 x i8> [[VEC_PHI]], [[PREDPHI]]
50 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
51 ; CHECK-NEXT: [[TMP19:%.*]] = icmp eq i32 [[INDEX_NEXT]], 12
52 ; CHECK-NEXT: br i1 [[TMP19]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]]
53 ; CHECK: middle.block:
54 ; CHECK-NEXT: [[TMP20:%.*]] = call i8 @llvm.vector.reduce.add.v2i8(<2 x i8> [[TMP18]])
55 ; CHECK-NEXT: br i1 true, label [[LOOP_EXIT:%.*]], label [[SCALAR_PH]]
57 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i16 [ -988, [[MIDDLE_BLOCK]] ], [ -1000, [[ENTRY:%.*]] ]
58 ; CHECK-NEXT: [[BC_MERGE_RDX:%.*]] = phi i8 [ [[TMP20]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY]] ]
59 ; CHECK-NEXT: br label [[LOOP:%.*]]
61 ; CHECK-NEXT: [[IV:%.*]] = phi i16 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LATCH:%.*]] ]
62 ; CHECK-NEXT: [[ACCUM:%.*]] = phi i8 [ [[BC_MERGE_RDX]], [[SCALAR_PH]] ], [ [[ACCUM_NEXT:%.*]], [[LATCH]] ]
63 ; CHECK-NEXT: [[IV_NEXT]] = add i16 [[IV]], 1
64 ; CHECK-NEXT: [[TEST_ADDR:%.*]] = getelementptr inbounds i1, ptr [[TEST_BASE]], i16 [[IV]]
65 ; CHECK-NEXT: [[EARLYCND:%.*]] = load i1, ptr [[TEST_ADDR]], align 1
66 ; CHECK-NEXT: br i1 [[EARLYCND]], label [[PRED:%.*]], label [[LATCH]]
68 ; CHECK-NEXT: [[ADDR:%.*]] = getelementptr i8, ptr [[ALLOCA]], i16 [[IV]]
69 ; CHECK-NEXT: [[VAL:%.*]] = load i8, ptr [[ADDR]], align 1
70 ; CHECK-NEXT: br label [[LATCH]]
72 ; CHECK-NEXT: [[VAL_PHI:%.*]] = phi i8 [ 0, [[LOOP]] ], [ [[VAL]], [[PRED]] ]
73 ; CHECK-NEXT: [[ACCUM_NEXT]] = add i8 [[ACCUM]], [[VAL_PHI]]
74 ; CHECK-NEXT: [[EXIT:%.*]] = icmp ugt i16 [[IV]], -990
75 ; CHECK-NEXT: br i1 [[EXIT]], label [[LOOP_EXIT]], label [[LOOP]], !llvm.loop [[LOOP3:![0-9]+]]
77 ; CHECK-NEXT: [[ACCUM_NEXT_LCSSA:%.*]] = phi i8 [ [[ACCUM_NEXT]], [[LATCH]] ], [ [[TMP20]], [[MIDDLE_BLOCK]] ]
78 ; CHECK-NEXT: ret i8 [[ACCUM_NEXT_LCSSA]]
81 %alloca = alloca [64638 x i8]
82 call void @init(ptr %alloca)
85 %iv = phi i16 [ -1000, %entry ], [ %iv.next, %latch ]
86 %accum = phi i8 [ 0, %entry ], [ %accum.next, %latch ]
87 %iv.next = add i16 %iv, 1
88 %test_addr = getelementptr inbounds i1, ptr %test_base, i16 %iv
89 %earlycnd = load i1, ptr %test_addr
90 br i1 %earlycnd, label %pred, label %latch
92 %addr = getelementptr i8, ptr %alloca, i16 %iv
93 %val = load i8, ptr %addr
96 %val.phi = phi i8 [ 0, %loop ], [ %val, %pred ]
97 %accum.next = add i8 %accum, %val.phi
98 %exit = icmp ugt i16 %iv, -990
99 br i1 %exit, label %loop_exit, label %loop