1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -passes=loop-vectorize -force-vector-width=2 < %s | FileCheck %s
4 define void @test_ptr_iv_no_inbounds(ptr %p1.start, ptr %p2.start, ptr %p1.end) {
5 ; CHECK-LABEL: @test_ptr_iv_no_inbounds(
7 ; CHECK-NEXT: [[P1_START7:%.*]] = ptrtoint ptr [[P1_START:%.*]] to i64
8 ; CHECK-NEXT: [[P1_END6:%.*]] = ptrtoint ptr [[P1_END:%.*]] to i64
9 ; CHECK-NEXT: [[P1_START4:%.*]] = ptrtoint ptr [[P1_START]] to i64
10 ; CHECK-NEXT: [[P1_END3:%.*]] = ptrtoint ptr [[P1_END]] to i64
11 ; CHECK-NEXT: [[P1_START2:%.*]] = ptrtoint ptr [[P1_START]] to i64
12 ; CHECK-NEXT: [[P1_END1:%.*]] = ptrtoint ptr [[P1_END]] to i64
13 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[P1_END6]], -4
14 ; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[P1_START7]]
15 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 2
16 ; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
17 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2
18 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
19 ; CHECK: vector.scevcheck:
20 ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[P1_END1]] to i2
21 ; CHECK-NEXT: [[TMP5:%.*]] = trunc i64 [[P1_START2]] to i2
22 ; CHECK-NEXT: [[TMP6:%.*]] = sub i2 [[TMP4]], [[TMP5]]
23 ; CHECK-NEXT: [[TMP7:%.*]] = zext i2 [[TMP6]] to i64
24 ; CHECK-NEXT: [[IDENT_CHECK:%.*]] = icmp ne i64 [[TMP7]], 0
25 ; CHECK-NEXT: br i1 [[IDENT_CHECK]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
26 ; CHECK: vector.memcheck:
27 ; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[P1_END3]], -4
28 ; CHECK-NEXT: [[TMP9:%.*]] = sub i64 [[TMP8]], [[P1_START4]]
29 ; CHECK-NEXT: [[TMP10:%.*]] = lshr i64 [[TMP9]], 2
30 ; CHECK-NEXT: [[TMP11:%.*]] = shl nuw i64 [[TMP10]], 2
31 ; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[TMP11]], 4
32 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[P1_START]], i64 [[TMP12]]
33 ; CHECK-NEXT: [[SCEVGEP5:%.*]] = getelementptr i8, ptr [[P2_START:%.*]], i64 [[TMP12]]
34 ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[P1_START]], [[SCEVGEP5]]
35 ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[P2_START]], [[SCEVGEP]]
36 ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
37 ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
39 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2
40 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
41 ; CHECK-NEXT: [[TMP13:%.*]] = mul i64 [[N_VEC]], 4
42 ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[P1_START]], i64 [[TMP13]]
43 ; CHECK-NEXT: [[TMP14:%.*]] = mul i64 [[N_VEC]], 4
44 ; CHECK-NEXT: [[IND_END8:%.*]] = getelementptr i8, ptr [[P2_START]], i64 [[TMP14]]
45 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
47 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
48 ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4
49 ; CHECK-NEXT: [[TMP15:%.*]] = add i64 [[OFFSET_IDX]], 0
50 ; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[P1_START]], i64 [[TMP15]]
51 ; CHECK-NEXT: [[OFFSET_IDX10:%.*]] = mul i64 [[INDEX]], 4
52 ; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[OFFSET_IDX10]], 0
53 ; CHECK-NEXT: [[NEXT_GEP11:%.*]] = getelementptr i8, ptr [[P2_START]], i64 [[TMP16]]
54 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr float, ptr [[NEXT_GEP]], i32 0
55 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP17]], align 4, !alias.scope [[META0:![0-9]+]], !noalias [[META3:![0-9]+]]
56 ; CHECK-NEXT: [[TMP18:%.*]] = getelementptr float, ptr [[NEXT_GEP11]], i32 0
57 ; CHECK-NEXT: [[WIDE_LOAD12:%.*]] = load <2 x float>, ptr [[TMP18]], align 4, !alias.scope [[META3]]
58 ; CHECK-NEXT: [[TMP19:%.*]] = fadd <2 x float> [[WIDE_LOAD]], [[WIDE_LOAD12]]
59 ; CHECK-NEXT: store <2 x float> [[TMP19]], ptr [[TMP17]], align 4, !alias.scope [[META0]], !noalias [[META3]]
60 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
61 ; CHECK-NEXT: [[TMP20:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
62 ; CHECK-NEXT: br i1 [[TMP20]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
63 ; CHECK: middle.block:
64 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
65 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
67 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[P1_START]], [[VECTOR_MEMCHECK]] ], [ [[P1_START]], [[VECTOR_SCEVCHECK]] ], [ [[P1_START]], [[ENTRY:%.*]] ]
68 ; CHECK-NEXT: [[BC_RESUME_VAL9:%.*]] = phi ptr [ [[IND_END8]], [[MIDDLE_BLOCK]] ], [ [[P2_START]], [[VECTOR_MEMCHECK]] ], [ [[P2_START]], [[VECTOR_SCEVCHECK]] ], [ [[P2_START]], [[ENTRY]] ]
69 ; CHECK-NEXT: br label [[LOOP:%.*]]
71 ; CHECK-NEXT: [[P1:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[P1_NEXT:%.*]], [[LOOP]] ]
72 ; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[BC_RESUME_VAL9]], [[SCALAR_PH]] ], [ [[P2_NEXT:%.*]], [[LOOP]] ]
73 ; CHECK-NEXT: [[P1_VAL:%.*]] = load float, ptr [[P1]], align 4
74 ; CHECK-NEXT: [[P2_VAL:%.*]] = load float, ptr [[P2]], align 4
75 ; CHECK-NEXT: [[SUM:%.*]] = fadd float [[P1_VAL]], [[P2_VAL]]
76 ; CHECK-NEXT: store float [[SUM]], ptr [[P1]], align 4
77 ; CHECK-NEXT: [[P1_NEXT]] = getelementptr float, ptr [[P1]], i64 1
78 ; CHECK-NEXT: [[P2_NEXT]] = getelementptr float, ptr [[P2]], i64 1
79 ; CHECK-NEXT: [[C:%.*]] = icmp ne ptr [[P1_NEXT]], [[P1_END]]
80 ; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP8:![0-9]+]]
82 ; CHECK-NEXT: ret void
88 %p1 = phi ptr [ %p1.start, %entry ], [ %p1.next, %loop ]
89 %p2 = phi ptr [ %p2.start, %entry ], [ %p2.next, %loop ]
90 %p1.val = load float, ptr %p1
91 %p2.val = load float, ptr %p2
92 %sum = fadd float %p1.val, %p2.val
93 store float %sum, ptr %p1
94 %p1.next = getelementptr float, ptr %p1, i64 1
95 %p2.next = getelementptr float, ptr %p2, i64 1
96 %c = icmp ne ptr %p1.next, %p1.end
97 br i1 %c, label %loop, label %exit
103 define void @test_ptr_iv_with_inbounds(ptr %p1.start, ptr %p2.start, ptr %p1.end) {
104 ; CHECK-LABEL: @test_ptr_iv_with_inbounds(
106 ; CHECK-NEXT: [[P1_START5:%.*]] = ptrtoint ptr [[P1_START:%.*]] to i64
107 ; CHECK-NEXT: [[P1_END4:%.*]] = ptrtoint ptr [[P1_END:%.*]] to i64
108 ; CHECK-NEXT: [[P1_START2:%.*]] = ptrtoint ptr [[P1_START]] to i64
109 ; CHECK-NEXT: [[P1_END1:%.*]] = ptrtoint ptr [[P1_END]] to i64
110 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[P1_END4]], -4
111 ; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[P1_START5]]
112 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 2
113 ; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
114 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2
115 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]]
116 ; CHECK: vector.memcheck:
117 ; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[P1_END1]], -4
118 ; CHECK-NEXT: [[TMP5:%.*]] = sub i64 [[TMP4]], [[P1_START2]]
119 ; CHECK-NEXT: [[TMP6:%.*]] = lshr i64 [[TMP5]], 2
120 ; CHECK-NEXT: [[TMP7:%.*]] = shl nuw i64 [[TMP6]], 2
121 ; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 4
122 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[P1_START]], i64 [[TMP8]]
123 ; CHECK-NEXT: [[SCEVGEP3:%.*]] = getelementptr i8, ptr [[P2_START:%.*]], i64 [[TMP8]]
124 ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[P1_START]], [[SCEVGEP3]]
125 ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[P2_START]], [[SCEVGEP]]
126 ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
127 ; CHECK-NEXT: br i1 [[FOUND_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
129 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2
130 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
131 ; CHECK-NEXT: [[TMP9:%.*]] = mul i64 [[N_VEC]], 4
132 ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[P1_START]], i64 [[TMP9]]
133 ; CHECK-NEXT: [[TMP10:%.*]] = mul i64 [[N_VEC]], 4
134 ; CHECK-NEXT: [[IND_END6:%.*]] = getelementptr i8, ptr [[P2_START]], i64 [[TMP10]]
135 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
136 ; CHECK: vector.body:
137 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
138 ; CHECK-NEXT: [[OFFSET_IDX:%.*]] = mul i64 [[INDEX]], 4
139 ; CHECK-NEXT: [[TMP11:%.*]] = add i64 [[OFFSET_IDX]], 0
140 ; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[P1_START]], i64 [[TMP11]]
141 ; CHECK-NEXT: [[OFFSET_IDX8:%.*]] = mul i64 [[INDEX]], 4
142 ; CHECK-NEXT: [[TMP12:%.*]] = add i64 [[OFFSET_IDX8]], 0
143 ; CHECK-NEXT: [[NEXT_GEP9:%.*]] = getelementptr i8, ptr [[P2_START]], i64 [[TMP12]]
144 ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr float, ptr [[NEXT_GEP]], i32 0
145 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x float>, ptr [[TMP13]], align 4, !alias.scope [[META9:![0-9]+]], !noalias [[META12:![0-9]+]]
146 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr float, ptr [[NEXT_GEP9]], i32 0
147 ; CHECK-NEXT: [[WIDE_LOAD10:%.*]] = load <2 x float>, ptr [[TMP14]], align 4, !alias.scope [[META12]]
148 ; CHECK-NEXT: [[TMP15:%.*]] = fadd <2 x float> [[WIDE_LOAD]], [[WIDE_LOAD10]]
149 ; CHECK-NEXT: store <2 x float> [[TMP15]], ptr [[TMP13]], align 4, !alias.scope [[META9]], !noalias [[META12]]
150 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
151 ; CHECK-NEXT: [[TMP16:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
152 ; CHECK-NEXT: br i1 [[TMP16]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP14:![0-9]+]]
153 ; CHECK: middle.block:
154 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
155 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
157 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[P1_START]], [[VECTOR_MEMCHECK]] ], [ [[P1_START]], [[ENTRY:%.*]] ]
158 ; CHECK-NEXT: [[BC_RESUME_VAL7:%.*]] = phi ptr [ [[IND_END6]], [[MIDDLE_BLOCK]] ], [ [[P2_START]], [[VECTOR_MEMCHECK]] ], [ [[P2_START]], [[ENTRY]] ]
159 ; CHECK-NEXT: br label [[LOOP:%.*]]
161 ; CHECK-NEXT: [[P1:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[P1_NEXT:%.*]], [[LOOP]] ]
162 ; CHECK-NEXT: [[P2:%.*]] = phi ptr [ [[BC_RESUME_VAL7]], [[SCALAR_PH]] ], [ [[P2_NEXT:%.*]], [[LOOP]] ]
163 ; CHECK-NEXT: [[P1_VAL:%.*]] = load float, ptr [[P1]], align 4
164 ; CHECK-NEXT: [[P2_VAL:%.*]] = load float, ptr [[P2]], align 4
165 ; CHECK-NEXT: [[SUM:%.*]] = fadd float [[P1_VAL]], [[P2_VAL]]
166 ; CHECK-NEXT: store float [[SUM]], ptr [[P1]], align 4
167 ; CHECK-NEXT: [[P1_NEXT]] = getelementptr inbounds float, ptr [[P1]], i64 1
168 ; CHECK-NEXT: [[P2_NEXT]] = getelementptr inbounds float, ptr [[P2]], i64 1
169 ; CHECK-NEXT: [[C:%.*]] = icmp ne ptr [[P1_NEXT]], [[P1_END]]
170 ; CHECK-NEXT: br i1 [[C]], label [[LOOP]], label [[EXIT]], !llvm.loop [[LOOP15:![0-9]+]]
172 ; CHECK-NEXT: ret void
178 %p1 = phi ptr [ %p1.start, %entry ], [ %p1.next, %loop ]
179 %p2 = phi ptr [ %p2.start, %entry ], [ %p2.next, %loop ]
180 %p1.val = load float, ptr %p1
181 %p2.val = load float, ptr %p2
182 %sum = fadd float %p1.val, %p2.val
183 store float %sum, ptr %p1
184 %p1.next = getelementptr inbounds float, ptr %p1, i64 1
185 %p2.next = getelementptr inbounds float, ptr %p2, i64 1
186 %c = icmp ne ptr %p1.next, %p1.end
187 br i1 %c, label %loop, label %exit
193 define void @store_pointer_induction(ptr %start, ptr %end) {
194 ; CHECK-LABEL: @store_pointer_induction(
196 ; CHECK-NEXT: [[START2:%.*]] = ptrtoint ptr [[START:%.*]] to i64
197 ; CHECK-NEXT: [[END1:%.*]] = ptrtoint ptr [[END:%.*]] to i64
198 ; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[END1]], -8
199 ; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[START2]]
200 ; CHECK-NEXT: [[TMP2:%.*]] = lshr i64 [[TMP1]], 3
201 ; CHECK-NEXT: [[TMP3:%.*]] = add nuw nsw i64 [[TMP2]], 1
202 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP3]], 2
203 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
205 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 [[TMP3]], 2
206 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 [[TMP3]], [[N_MOD_VF]]
207 ; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[N_VEC]], 8
208 ; CHECK-NEXT: [[IND_END:%.*]] = getelementptr i8, ptr [[START]], i64 [[TMP4]]
209 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
210 ; CHECK: vector.body:
211 ; CHECK-NEXT: [[POINTER_PHI:%.*]] = phi ptr [ [[START]], [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[VECTOR_BODY]] ]
212 ; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
213 ; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[POINTER_PHI]], <2 x i64> <i64 0, i64 8>
214 ; CHECK-NEXT: [[TMP6:%.*]] = extractelement <2 x ptr> [[TMP5]], i32 0
215 ; CHECK-NEXT: [[TMP7:%.*]] = getelementptr ptr, ptr [[TMP6]], i32 0
216 ; CHECK-NEXT: store <2 x ptr> [[TMP5]], ptr [[TMP7]], align 4
217 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
218 ; CHECK-NEXT: [[PTR_IND]] = getelementptr i8, ptr [[POINTER_PHI]], i64 16
219 ; CHECK-NEXT: [[TMP8:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
220 ; CHECK-NEXT: br i1 [[TMP8]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP16:![0-9]+]]
221 ; CHECK: middle.block:
222 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP3]], [[N_VEC]]
223 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
225 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi ptr [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ [[START]], [[ENTRY:%.*]] ]
226 ; CHECK-NEXT: br label [[LOOP:%.*]]
228 ; CHECK-NEXT: [[IV:%.*]] = phi ptr [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
229 ; CHECK-NEXT: store ptr [[IV]], ptr [[IV]], align 4
230 ; CHECK-NEXT: [[IV_NEXT]] = getelementptr inbounds ptr, ptr [[IV]], i32 1
231 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq ptr [[IV_NEXT]], [[END]]
232 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP17:![0-9]+]]
234 ; CHECK-NEXT: ret void
240 %iv = phi ptr [ %start, %entry ], [ %iv.next, %loop ]
241 store ptr %iv, ptr %iv, align 4
242 %iv.next = getelementptr inbounds ptr, ptr %iv, i32 1
243 %exitcond = icmp eq ptr %iv.next, %end
244 br i1 %exitcond, label %exit, label %loop