llvm/lib/CodeGen/MachineSSAContext.cpp

   1 //===- MachineSSAContext.cpp ------------------------------------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 /// \file
   9 ///
  10 /// This file defines a specialization of the GenericSSAContext<X>
  11 /// template class for Machine IR.
  12 ///
  13 //===----------------------------------------------------------------------===//
  14
  15 #include "llvm/CodeGen/MachineSSAContext.h"
  16 #include "llvm/CodeGen/MachineBasicBlock.h"
  17 #include "llvm/CodeGen/MachineFunction.h"
  18 #include "llvm/CodeGen/MachineInstr.h"
  19 #include "llvm/CodeGen/MachineRegisterInfo.h"
  20 #include "llvm/Support/raw_ostream.h"
  21
  22 using namespace llvm;
  23
  24 const Register MachineSSAContext::ValueRefNull{};
  25
  26 void MachineSSAContext::setFunction(MachineFunction &Fn) {
  27   MF = &Fn;
  28   RegInfo = &MF->getRegInfo();
  29 }
  30
  31 MachineBasicBlock *MachineSSAContext::getEntryBlock(MachineFunction &F) {
  32   return &F.front();
  33 }
  34
  35 void MachineSSAContext::appendBlockTerms(
  36     SmallVectorImpl<const MachineInstr *> &terms,
  37     const MachineBasicBlock &block) {
  38   for (auto &T : block.terminators())
  39     terms.push_back(&T);
  40 }
  41
  42 void MachineSSAContext::appendBlockDefs(SmallVectorImpl<Register> &defs,
  43                                         const MachineBasicBlock &block) {
  44   for (const MachineInstr &instr : block.instrs()) {
  45     for (const MachineOperand &op : instr.all_defs())
  46       defs.push_back(op.getReg());
  47   }
  48 }
  49
  50 /// Get the defining block of a value.
  51 MachineBasicBlock *MachineSSAContext::getDefBlock(Register value) const {
  52   if (!value)
  53     return nullptr;
  54   return RegInfo->getVRegDef(value)->getParent();
  55 }
  56
  57 bool MachineSSAContext::isConstantOrUndefValuePhi(const MachineInstr &Phi) {
  58   return Phi.isConstantValuePHI();
  59 }
  60
  61 Printable MachineSSAContext::print(const MachineBasicBlock *Block) const {
  62   if (!Block)
  63     return Printable([](raw_ostream &Out) { Out << "<nullptr>"; });
  64   return Printable([Block](raw_ostream &Out) { Block->printName(Out); });
  65 }
  66
  67 Printable MachineSSAContext::print(const MachineInstr *I) const {
  68   return Printable([I](raw_ostream &Out) { I->print(Out); });
  69 }
  70
  71 Printable MachineSSAContext::print(Register Value) const {
  72   auto *MRI = RegInfo;
  73   return Printable([MRI, Value](raw_ostream &Out) {
  74     Out << printReg(Value, MRI->getTargetRegisterInfo(), 0, MRI);
  75
  76     if (Value) {
  77       // Try to print the definition.
  78       if (auto *Instr = MRI->getUniqueVRegDef(Value)) {
  79         Out << ": ";
  80         Instr->print(Out);
  81       }
  82     }
  83   });
  84 }