lld/test/ELF/aarch64-long-thunk-converge.s

   1 // REQUIRES: aarch64
   2 // RUN: rm -rf %t && split-file %s %t
   3 // RUN: llvm-mc -triple aarch64-none-elf -filetype=obj -o %t/a.o %t/a.s
   4 // RUN: ld.lld --shared %t/a.o -T %t/a.t -o %t/a
   5 // RUN: llvm-objdump --no-show-raw-insn -d --start-address=0x7001004 --stop-address=0x7001010 %t/a | FileCheck %s
   6 // RUN: llvm-objdump --no-show-raw-insn -d --start-address=0x11001008 --stop-address=0x11001014 %t/a | FileCheck --check-prefix=CHECK2 %s
   7 // RUN: rm -f %t/a
   8 /// This test shows that once a long-range thunk has been generated it
   9 /// cannot be written as a short-range thunk. This prevents oscillations
  10 /// in size that can prevent convergence.
  11 /// In pass 0 bl foo requires a long-range thunk to reach foo. The thunk for
  12 /// bar increases the address of foo so that ic can be reaced by bl foo with a
  13 /// a single b instruction.
  14 /// In pass 2 we expect the the long-range thunk to remain long.
  15
  16 // CHECK-LABEL: <__AArch64ADRPThunk_>:
  17 // CHECK-NEXT: 7001004: adrp    x16, 0x11001000
  18 // CHECK-NEXT:          add     x16, x16, #0x14
  19 // CHECK-NEXT:          br      x16
  20
  21 // CHECK2-LABEL: <__AArch64ADRPThunk_>:
  22 // CHECK2-NEXT: 11001008: adrp    x16, 0x9001000
  23 // CHECK2-NEXT:           add     x16, x16, #0x10
  24 // CHECK2-NEXT:           br      x16
  25
  26
  27 //--- a.t
  28 SECTIONS {
  29   .foo 0x1000 : { *(.foo.*) }
  30   .bar 0x11001000 : { *(.bar.*) }
  31 }
  32
  33 //--- a.s
  34 .section .foo.1,"ax",%progbits,unique,1
  35 bl bar
  36
  37 .section .foo.2,"ax",%progbits,unique,1
  38 .space 0x7000000
  39
  40 .section .foo.3,"ax",%progbits,unique,1
  41 .space 0x2000000
  42
  43 .section .foo.4,"ax",%progbits,unique,1
  44 foo:
  45 nop
  46
  47 .section .bar.1,"ax",%progbits,unique,1
  48 nop
  49 nop
  50 .section .bar.2,"ax",%progbits,unique,1
  51 bar:
  52 bl foo
  53 .space 0x8000000