2 // RUN
: llvm-mc
-filetype
=obj
-triple
=aarch64
%s
-o
%t.o
3 // RUN
: ld.lld
--image-base
=0x10000000 %t.o
-o
%t
4 // RUN
: llvm-objdump
-d
-z
--no-show-raw-insn
%t | FileCheck
%s
6 // Check that the ARM
64-bit ABI rules for undefined weak symbols are applied.
7 // Branch instructions are resolved to the next instruction. Undefined
8 // Symbols in relative are resolved to the place so S
- P
+ A = A.
9 // We place the image-base at
0x10000000 to test that
a range extensions thunk
27 // R_AARCH64_ADR_PREL_LO21
29 // R_AARCH64_ADR_PREL_PG_HI21
31 // R_AARCH64_LD_PREL_LO19
45 // CHECK
: Disassembly of section
.text:
47 // CHECK-NEXT
: 0000000010010120 <_start
>:
48 // CHECK-NEXT
: 10010120: b 0x10010124
49 // CHECK-NEXT
: 10010124: bl 0x10010128
50 // CHECK-NEXT
: 10010128: b.eq
0x1001012c
51 // CHECK-NEXT
: 1001012c
: cbz x1
, 0x10010130
52 // CHECK-NEXT
: 10010130: adr x0
, 0x10010130
53 // CHECK-NEXT
: 10010134: adrp x0
, 0x10010000
54 // CHECK-NEXT
: 10010138: ldr x8
, 0x10010138
55 // CHECK
: 1001013c
: 00 00 00 00 .word 0x00000000
56 // CHECK-NEXT
: 10010140: 00 00 00 00 .word 0x00000000
57 // CHECK-NEXT
: 10010144: 00 00 00 00 .word 0x00000000
58 // CHECK-NEXT
: 10010148: 00 00 00 00 .word 0x00000000
59 // CHECK-NEXT
: 1001014c
: 00 00 .short 0x0000
60 // CHECK-LABEL
: <bl_undefweak2
>:
61 // CHECK-NEXT
: bl {{.*}} <bl_undefweak2+0x4>