lld/test/ELF/arm-adr-long.s

   1 // REQUIRES: arm
   2 // RUN: split-file %s %t
   3 // RUN: llvm-mc --triple=armv7a-none-eabi --arm-add-build-attributes -filetype=obj -o %t.o %t/asm
   4 // RUN: ld.lld --script %t/lds %t.o -o %t2
   5 // RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --triple=armv7a-none-eabi %t2 | FileCheck %s
   6
   7 /// Test the long range encoding of R_ARM_ALU_PC_Gx sequences. We can encode an 8-bit
   8 /// immediate rotated right by an even 4-bit field.
   9
  10 //--- lds
  11 SECTIONS {
  12     .text.0 0x0100000 : AT(0x0100000) { *(.text.0) }
  13     .text.1 0x0800000 : AT(0x0800000) { *(.text.1) }
  14     .text.2 0xf0f0000 : AT(0xf0f0000) { *(.text.2) }
  15 }
  16
  17 //--- asm
  18  .section .text.0, "ax", %progbits
  19 dat1:
  20  .word 0
  21
  22  .section .text.1, "ax", %progbits
  23  .global _start
  24  .type _start, %function
  25 _start:
  26  .inst 0xe24f0008 // sub r0, pc, #8
  27  .inst 0xe2400004 // sub r0, r0, #4
  28  .reloc 0, R_ARM_ALU_PC_G0_NC, dat1
  29  .reloc 4, R_ARM_ALU_PC_G1, dat1
  30
  31  .inst 0xe24f1008 // sub r1, pc, #8
  32  .inst 0xe2411004 // sub r1, r1, #4
  33  .inst 0xe2411000 // sub r1, r1, #0
  34  .reloc 8, R_ARM_ALU_PC_G0_NC, dat2
  35  .reloc 12, R_ARM_ALU_PC_G1_NC, dat2
  36  .reloc 16, R_ARM_ALU_PC_G2, dat2
  37
  38  .inst 0xe24f0008 // sub r0, pc, #8
  39  .inst 0xe2400004 // sub r0, r0, #4
  40  .inst 0xe2400000 // sub r0, r0, #0
  41  .reloc 20, R_ARM_ALU_PC_G0_NC, dat1
  42  .reloc 24, R_ARM_ALU_PC_G1_NC, dat1
  43  .reloc 28, R_ARM_ALU_PC_G2, dat1
  44
  45  .inst 0xe24f0008 // sub r0, pc, #8
  46  .inst 0xe2400004 // sub r0, r0, #4
  47  .inst 0xe5900000 // ldr r0, [r0, #0]
  48  .reloc 32, R_ARM_ALU_PC_G0_NC, dat2
  49  .reloc 36, R_ARM_ALU_PC_G1_NC, dat2
  50  .reloc 40, R_ARM_LDR_PC_G2, dat2
  51
  52  .inst 0xe24f0008 // sub r0, pc, #8
  53  .inst 0xe5100004 // ldr r0, [r0, #-4]
  54  .reloc 44, R_ARM_ALU_PC_G0_NC, dat1
  55  .reloc 48, R_ARM_LDR_PC_G1, dat1
  56
  57  .inst 0xe24f0008 // sub r0, pc, #8
  58  .inst 0xe2400004 // sub r0, r0, #4
  59  .inst 0xe5900000 // ldr r0, [r0, #0]
  60  .reloc 52, R_ARM_ALU_PC_G0_NC, dat1
  61  .reloc 56, R_ARM_ALU_PC_G1_NC, dat1
  62  .reloc 60, R_ARM_LDR_PC_G2, dat1
  63
  64  .inst 0xe24f0008 // sub r0, pc, #8
  65  .inst 0xe14000d4 // ldrd r0, [r0, #-4]
  66  .reloc 64, R_ARM_ALU_PC_G0_NC, dat1
  67  .reloc 68, R_ARM_LDRS_PC_G1, dat1
  68
  69  .section .text.2, "ax", %progbits
  70 dat2:
  71  .word 0
  72
  73 // CHECK:      00100000 <dat1>:
  74 // CHECK-NEXT:   100000: andeq   r0, r0, r0
  75
  76 // CHECK:      00800000 <_start>:
  77 // CHECK-NEXT:   800000: sub     r0, pc, #112, #16
  78 // CHECK-NEXT:   800004: sub     r0, r0, #8
  79
  80 // CHECK-NEXT:   800008: add     r1, pc, #232, #12
  81 // CHECK-NEXT:   80000c: add     r1, r1, #978944
  82 // CHECK-NEXT:   800010: add     r1, r1, #4080
  83
  84 // CHECK-NEXT:   800014: sub     r0, pc, #112, #16
  85 // CHECK-NEXT:   800018: sub     r0, r0, #28
  86 // CHECK-NEXT:   80001c: sub     r0, r0, #0
  87
  88 // CHECK-NEXT:   800020: add     r0, pc, #232, #12
  89 // CHECK-NEXT:   800024: add     r0, r0, #978944
  90 // CHECK-NEXT:   800028: ldr     r0, [r0, #4056]
  91
  92 // CHECK-NEXT:   80002c: sub     r0, pc, #112, #16
  93 // CHECK-NEXT:   800030: ldr     r0, [r0, #-52]
  94
  95 // CHECK-NEXT:   800034: sub     r0, pc, #112, #16
  96 // CHECK-NEXT:   800038: sub     r0, r0, #60
  97 // CHECK-NEXT:   80003c: ldr     r0, [r0, #-0]
  98
  99 // CHECK-NEXT:   800040: sub     r0, pc, #112, #16
 100 // CHECK-NEXT:   800044: ldrd    r0, r1, [r0, #-72]
 101
 102 // CHECK:      0f0f0000 <dat2>:
 103 // CHECK-NEXT:  f0f0000: andeq   r0, r0, r0