1 //===--- ARM.h - Declare ARM target feature support -------------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file declares ARM TargetInfo objects.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H
14 #define LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H
16 #include "OSTargets.h"
17 #include "clang/Basic/TargetInfo.h"
18 #include "clang/Basic/TargetOptions.h"
19 #include "llvm/Support/Compiler.h"
20 #include "llvm/TargetParser/ARMTargetParser.h"
21 #include "llvm/TargetParser/ARMTargetParserCommon.h"
22 #include "llvm/TargetParser/Triple.h"
27 class LLVM_LIBRARY_VISIBILITY ARMTargetInfo
: public TargetInfo
{
28 // Possible FPU choices.
42 // Possible HWDiv features.
43 enum HWDivMode
{ HWDivThumb
= (1 << 0), HWDivARM
= (1 << 1) };
45 static bool FPUModeIsVFP(FPUMode Mode
) {
46 return Mode
& (VFP2FPU
| VFP3FPU
| VFP4FPU
| NeonFPU
| FPARMV8
);
49 static const TargetInfo::GCCRegAlias GCCRegAliases
[];
50 static const char *const GCCRegNames
[];
57 enum { FP_Default
, FP_VFP
, FP_Neon
} FPMath
;
59 llvm::ARM::ISAKind ArchISA
;
60 llvm::ARM::ArchKind ArchKind
= llvm::ARM::ArchKind::ARMV4T
;
61 llvm::ARM::ProfileKind ArchProfile
;
70 // Initialized via features.
71 unsigned SoftFloat
: 1;
72 unsigned SoftFloatABI
: 1;
79 unsigned Unaligned
: 1;
81 unsigned HasMatMul
: 1;
82 unsigned FPRegsDisabled
: 1;
87 LDREX_B
= (1 << 0), /// byte (8-bit)
88 LDREX_H
= (1 << 1), /// half (16-bit)
89 LDREX_W
= (1 << 2), /// word (32-bit)
90 LDREX_D
= (1 << 3), /// double (64-bit)
95 // ACLE 6.5.1 Hardware floating point
97 HW_FP_HP
= (1 << 1), /// half (16-bit)
98 HW_FP_SP
= (1 << 2), /// single (32-bit)
99 HW_FP_DP
= (1 << 3), /// double (64-bit)
104 void setABIAPCS(bool IsAAPCS16
);
107 void setArchInfo(llvm::ARM::ArchKind Kind
);
111 bool isThumb() const;
112 bool supportsThumb() const;
113 bool supportsThumb2() const;
115 bool hasMVEFloat() const;
118 StringRef
getCPUAttr() const;
119 StringRef
getCPUProfile() const;
122 ARMTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
124 StringRef
getABI() const override
;
125 bool setABI(const std::string
&Name
) override
;
127 bool isBranchProtectionSupportedArch(StringRef Arch
) const override
;
128 bool validateBranchProtection(StringRef Spec
, StringRef Arch
,
129 BranchProtectionInfo
&BPI
,
130 StringRef
&Err
) const override
;
132 // FIXME: This should be based on Arch attributes, not CPU names.
134 initFeatureMap(llvm::StringMap
<bool> &Features
, DiagnosticsEngine
&Diags
,
136 const std::vector
<std::string
> &FeaturesVec
) const override
;
138 bool isValidFeatureName(StringRef Feature
) const override
{
139 // We pass soft-float-abi in as a -target-feature, but the backend figures
140 // this out through other means.
141 return Feature
!= "soft-float-abi";
144 bool handleTargetFeatures(std::vector
<std::string
> &Features
,
145 DiagnosticsEngine
&Diags
) override
;
147 bool hasFeature(StringRef Feature
) const override
;
149 bool hasBFloat16Type() const override
;
151 bool isValidCPUName(StringRef Name
) const override
;
152 void fillValidCPUList(SmallVectorImpl
<StringRef
> &Values
) const override
;
154 bool setCPU(const std::string
&Name
) override
;
156 bool setFPMath(StringRef Name
) override
;
158 bool useFP16ConversionIntrinsics() const override
{
162 void getTargetDefinesARMV81A(const LangOptions
&Opts
,
163 MacroBuilder
&Builder
) const;
164 void getTargetDefinesARMV82A(const LangOptions
&Opts
,
165 MacroBuilder
&Builder
) const;
166 void getTargetDefinesARMV83A(const LangOptions
&Opts
,
167 MacroBuilder
&Builder
) const;
168 void getTargetDefines(const LangOptions
&Opts
,
169 MacroBuilder
&Builder
) const override
;
171 ArrayRef
<Builtin::Info
> getTargetBuiltins() const override
;
173 bool isCLZForZeroUndef() const override
;
174 BuiltinVaListKind
getBuiltinVaListKind() const override
;
176 ArrayRef
<const char *> getGCCRegNames() const override
;
177 ArrayRef
<TargetInfo::GCCRegAlias
> getGCCRegAliases() const override
;
178 bool validateAsmConstraint(const char *&Name
,
179 TargetInfo::ConstraintInfo
&Info
) const override
;
180 std::string
convertConstraint(const char *&Constraint
) const override
;
182 validateConstraintModifier(StringRef Constraint
, char Modifier
, unsigned Size
,
183 std::string
&SuggestedModifier
) const override
;
184 const char *getClobbers() const override
;
186 StringRef
getConstraintRegister(StringRef Constraint
,
187 StringRef Expression
) const override
{
191 CallingConvCheckResult
checkCallingConvention(CallingConv CC
) const override
;
193 int getEHDataRegisterNumber(unsigned RegNo
) const override
;
195 bool hasSjLjLowering() const override
;
197 bool hasBitIntType() const override
{ return true; }
199 const char *getBFloat16Mangling() const override
{ return "u6__bf16"; };
202 class LLVM_LIBRARY_VISIBILITY ARMleTargetInfo
: public ARMTargetInfo
{
204 ARMleTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
205 void getTargetDefines(const LangOptions
&Opts
,
206 MacroBuilder
&Builder
) const override
;
209 class LLVM_LIBRARY_VISIBILITY ARMbeTargetInfo
: public ARMTargetInfo
{
211 ARMbeTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
212 void getTargetDefines(const LangOptions
&Opts
,
213 MacroBuilder
&Builder
) const override
;
216 class LLVM_LIBRARY_VISIBILITY WindowsARMTargetInfo
217 : public WindowsTargetInfo
<ARMleTargetInfo
> {
218 const llvm::Triple Triple
;
221 WindowsARMTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
223 void getVisualStudioDefines(const LangOptions
&Opts
,
224 MacroBuilder
&Builder
) const;
226 BuiltinVaListKind
getBuiltinVaListKind() const override
;
228 CallingConvCheckResult
checkCallingConvention(CallingConv CC
) const override
;
231 // Windows ARM + Itanium C++ ABI Target
232 class LLVM_LIBRARY_VISIBILITY ItaniumWindowsARMleTargetInfo
233 : public WindowsARMTargetInfo
{
235 ItaniumWindowsARMleTargetInfo(const llvm::Triple
&Triple
,
236 const TargetOptions
&Opts
);
238 void getTargetDefines(const LangOptions
&Opts
,
239 MacroBuilder
&Builder
) const override
;
242 // Windows ARM, MS (C++) ABI
243 class LLVM_LIBRARY_VISIBILITY MicrosoftARMleTargetInfo
244 : public WindowsARMTargetInfo
{
246 MicrosoftARMleTargetInfo(const llvm::Triple
&Triple
,
247 const TargetOptions
&Opts
);
249 void getTargetDefines(const LangOptions
&Opts
,
250 MacroBuilder
&Builder
) const override
;
254 class LLVM_LIBRARY_VISIBILITY MinGWARMTargetInfo
: public WindowsARMTargetInfo
{
256 MinGWARMTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
258 void getTargetDefines(const LangOptions
&Opts
,
259 MacroBuilder
&Builder
) const override
;
263 class LLVM_LIBRARY_VISIBILITY CygwinARMTargetInfo
: public ARMleTargetInfo
{
265 CygwinARMTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
267 void getTargetDefines(const LangOptions
&Opts
,
268 MacroBuilder
&Builder
) const override
;
271 class LLVM_LIBRARY_VISIBILITY DarwinARMTargetInfo
272 : public DarwinTargetInfo
<ARMleTargetInfo
> {
274 void getOSDefines(const LangOptions
&Opts
, const llvm::Triple
&Triple
,
275 MacroBuilder
&Builder
) const override
;
278 DarwinARMTargetInfo(const llvm::Triple
&Triple
, const TargetOptions
&Opts
);
281 // 32-bit RenderScript is armv7 with width and align of 'long' set to 8-bytes
282 class LLVM_LIBRARY_VISIBILITY RenderScript32TargetInfo
283 : public ARMleTargetInfo
{
285 RenderScript32TargetInfo(const llvm::Triple
&Triple
,
286 const TargetOptions
&Opts
);
288 void getTargetDefines(const LangOptions
&Opts
,
289 MacroBuilder
&Builder
) const override
;
292 } // namespace targets
295 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_ARM_H