clang/lib/Basic/Targets/RISCV.h

   1 //===--- RISCV.h - Declare RISCV target feature support ---------*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file declares RISCV TargetInfo objects.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
  14 #define LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H
  15
  16 #include "clang/Basic/TargetInfo.h"
  17 #include "clang/Basic/TargetOptions.h"
  18 #include "llvm/Support/Compiler.h"
  19 #include "llvm/Support/RISCVISAInfo.h"
  20 #include "llvm/TargetParser/Triple.h"
  21 #include <optional>
  22
  23 namespace clang {
  24 namespace targets {
  25
  26 // RISC-V Target
  27 class RISCVTargetInfo : public TargetInfo {
  28 protected:
  29   std::string ABI, CPU;
  30   std::unique_ptr<llvm::RISCVISAInfo> ISAInfo;
  31
  32 public:
  33   RISCVTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
  34       : TargetInfo(Triple) {
  35     LongDoubleWidth = 128;
  36     LongDoubleAlign = 128;
  37     LongDoubleFormat = &llvm::APFloat::IEEEquad();
  38     SuitableAlign = 128;
  39     WCharType = SignedInt;
  40     WIntType = UnsignedInt;
  41     HasRISCVVTypes = true;
  42     MCountName = "_mcount";
  43     HasFloat16 = true;
  44   }
  45
  46   bool setCPU(const std::string &Name) override {
  47     if (!isValidCPUName(Name))
  48       return false;
  49     CPU = Name;
  50     return true;
  51   }
  52
  53   StringRef getABI() const override { return ABI; }
  54   void getTargetDefines(const LangOptions &Opts,
  55                         MacroBuilder &Builder) const override;
  56
  57   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
  58
  59   BuiltinVaListKind getBuiltinVaListKind() const override {
  60     return TargetInfo::VoidPtrBuiltinVaList;
  61   }
  62
  63   const char *getClobbers() const override { return ""; }
  64
  65   StringRef getConstraintRegister(StringRef Constraint,
  66                                   StringRef Expression) const override {
  67     return Expression;
  68   }
  69
  70   ArrayRef<const char *> getGCCRegNames() const override;
  71
  72   int getEHDataRegisterNumber(unsigned RegNo) const override {
  73     if (RegNo == 0)
  74       return 10;
  75     else if (RegNo == 1)
  76       return 11;
  77     else
  78       return -1;
  79   }
  80
  81   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
  82
  83   bool validateAsmConstraint(const char *&Name,
  84                              TargetInfo::ConstraintInfo &Info) const override;
  85
  86   std::string convertConstraint(const char *&Constraint) const override;
  87
  88   bool
  89   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
  90                  StringRef CPU,
  91                  const std::vector<std::string> &FeaturesVec) const override;
  92
  93   std::optional<std::pair<unsigned, unsigned>>
  94   getVScaleRange(const LangOptions &LangOpts) const override;
  95
  96   bool hasFeature(StringRef Feature) const override;
  97
  98   bool handleTargetFeatures(std::vector<std::string> &Features,
  99                             DiagnosticsEngine &Diags) override;
 100
 101   bool hasBitIntType() const override { return true; }
 102
 103   bool useFP16ConversionIntrinsics() const override {
 104     return false;
 105   }
 106
 107   bool isValidCPUName(StringRef Name) const override;
 108   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
 109   bool isValidTuneCPUName(StringRef Name) const override;
 110   void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override;
 111 };
 112 class LLVM_LIBRARY_VISIBILITY RISCV32TargetInfo : public RISCVTargetInfo {
 113 public:
 114   RISCV32TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
 115       : RISCVTargetInfo(Triple, Opts) {
 116     IntPtrType = SignedInt;
 117     PtrDiffType = SignedInt;
 118     SizeType = UnsignedInt;
 119     resetDataLayout("e-m:e-p:32:32-i64:64-n32-S128");
 120   }
 121
 122   bool setABI(const std::string &Name) override {
 123     if (Name == "ilp32" || Name == "ilp32f" || Name == "ilp32d") {
 124       ABI = Name;
 125       return true;
 126     }
 127     return false;
 128   }
 129
 130   void setMaxAtomicWidth() override {
 131     MaxAtomicPromoteWidth = 128;
 132
 133     if (ISAInfo->hasExtension("a"))
 134       MaxAtomicInlineWidth = 32;
 135   }
 136 };
 137 class LLVM_LIBRARY_VISIBILITY RISCV64TargetInfo : public RISCVTargetInfo {
 138 public:
 139   RISCV64TargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
 140       : RISCVTargetInfo(Triple, Opts) {
 141     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
 142     IntMaxType = Int64Type = SignedLong;
 143     resetDataLayout("e-m:e-p:64:64-i64:64-i128:128-n32:64-S128");
 144   }
 145
 146   bool setABI(const std::string &Name) override {
 147     if (Name == "lp64" || Name == "lp64f" || Name == "lp64d") {
 148       ABI = Name;
 149       return true;
 150     }
 151     return false;
 152   }
 153
 154   void setMaxAtomicWidth() override {
 155     MaxAtomicPromoteWidth = 128;
 156
 157     if (ISAInfo->hasExtension("a"))
 158       MaxAtomicInlineWidth = 64;
 159   }
 160 };
 161 } // namespace targets
 162 } // namespace clang
 163
 164 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_RISCV_H