clang/test/CodeGen/PowerPC/builtins-ppc-int128.c

   1 // REQUIRES: powerpc-registered-target
   2 // RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
   3 // RUN:   -triple powerpc64-unknown-unknown -target-cpu pwr8 \
   4 // RUN:   -emit-llvm %s -o - -U__XL_COMPAT_ALTIVEC__ | FileCheck %s
   5 // RUN: %clang_cc1 -flax-vector-conversions=none -target-feature +altivec -target-feature +vsx \
   6 // RUN:   -triple powerpc64le-unknown-unknown -target-cpu pwr8 \
   7 // RUN:   -emit-llvm %s -o - -U__XL_COMPAT_ALTIVEC__ | \
   8 // RUN:   FileCheck %s -check-prefix=CHECK-LE
   9 #include <altivec.h>
  10
  11 vector signed __int128 res_vslll;
  12 unsigned long long aull[2] = { 1L, 2L };
  13
  14 void testVectorInt128Pack(){
  15 // CHECK-LABEL: testVectorInt128Pack
  16 // CHECK-LABEL-LE: testVectorInt128Pack
  17   res_vslll = __builtin_pack_vector_int128(aull[0], aull[1]);
  18 // CHECK: %[[V1:[0-9]+]] = insertelement <2 x i64> poison, i64 %{{[0-9]+}}, i64 0
  19 // CHECK-NEXT: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 1
  20
  21 // CHECK-LE: %[[V1:[0-9]+]] = insertelement <2 x i64> poison, i64 %{{[0-9]+}}, i64 1
  22 // CHECK-NEXT-LE: %[[V2:[0-9]+]] = insertelement <2 x i64> %[[V1]], i64 %{{[0-9]+}}, i64 0
  23 // CHECK-NEXT-LE:  bitcast <2 x i64> %[[V2]] to <1 x i128>
  24
  25   __builtin_unpack_vector_int128(res_vslll, 0);
  26 // CHECK:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
  27 // CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
  28
  29 // CHECK-LE:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
  30 // CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
  31
  32   __builtin_unpack_vector_int128(res_vslll, 1);
  33 // CHECK:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
  34 // CHECK-NEXT: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 1
  35
  36 // CHECK-LE:  %[[V1:[0-9]+]] = bitcast <1 x i128> %{{[0-9]+}} to <2 x i64>
  37 // CHECK-NEXT-LE: %{{[0-9]+}} = extractelement <2 x i64> %[[V1]], i32 0
  38 }
  39