clang/test/CodeGen/PowerPC/builtins-ppc-quadword-noi128.c

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
   2 // REQUIRES: powerpc-registered-target
   3 // RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
   4 // RUN:   -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck \
   5 // RUN:   %s -check-prefix=CHECK-LE
   6 // RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
   7 // RUN:   -triple powerpc64-aix-unknown -emit-llvm %s -o - | FileCheck \
   8 // RUN:   %s -check-prefix=CHECK-AIX
   9 // RUN: %clang_cc1 -flax-vector-conversions=none -O2 -target-feature +altivec -target-feature +power8-vector \
  10 // RUN:   -triple powerpc-aix-unknown -emit-llvm %s -o - | FileCheck \
  11 // RUN:   %s -check-prefix=CHECK-AIX
  12 #include <altivec.h>
  13 // CHECK-LE-LABEL: @test_subc(
  14 // CHECK-LE-NEXT:  entry:
  15 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  16 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  17 // CHECK-LE-NEXT:    [[TMP2:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]])
  18 // CHECK-LE-NEXT:    [[TMP3:%.*]] = bitcast <1 x i128> [[TMP2]] to <16 x i8>
  19 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP3]]
  20 //
  21 // CHECK-AIX-LABEL: @test_subc(
  22 // CHECK-AIX-NEXT:  entry:
  23 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  24 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  25 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubcuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]])
  26 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = bitcast <1 x i128> [[TMP2]] to <16 x i8>
  27 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP3]]
  28 //
  29 vector unsigned char test_subc(vector unsigned char a, vector unsigned char b) {
  30   return vec_subc_u128(a, b);
  31 }
  32 // CHECK-LE-LABEL: @test_subec(
  33 // CHECK-LE-NEXT:  entry:
  34 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  35 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  36 // CHECK-LE-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
  37 // CHECK-LE-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
  38 // CHECK-LE-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
  39 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP4]]
  40 //
  41 // CHECK-AIX-LABEL: @test_subec(
  42 // CHECK-AIX-NEXT:  entry:
  43 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  44 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  45 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
  46 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubecuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
  47 // CHECK-AIX-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
  48 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP4]]
  49 //
  50 vector unsigned char test_subec(vector unsigned char a, vector unsigned char b,
  51                                 vector unsigned char c) {
  52   return vec_subec_u128(a, b, c);
  53 }
  54 // CHECK-LE-LABEL: @test_sube(
  55 // CHECK-LE-NEXT:  entry:
  56 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  57 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  58 // CHECK-LE-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
  59 // CHECK-LE-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
  60 // CHECK-LE-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
  61 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP4]]
  62 //
  63 // CHECK-AIX-LABEL: @test_sube(
  64 // CHECK-AIX-NEXT:  entry:
  65 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  66 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  67 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
  68 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vsubeuqm(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
  69 // CHECK-AIX-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
  70 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP4]]
  71 //
  72 vector unsigned char test_sube(vector unsigned char a, vector unsigned char b,
  73                                vector unsigned char c) {
  74   return vec_sube_u128(a, b, c);
  75 }
  76 // CHECK-LE-LABEL: @test_sub(
  77 // CHECK-LE-NEXT:  entry:
  78 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  79 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
  80 // CHECK-LE-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  81 // CHECK-LE-NEXT:    [[TMP3:%.*]] = add <1 x i128> [[TMP0]], [[TMP1]]
  82 // CHECK-LE-NEXT:    [[VSUBUQM_I:%.*]] = sub <1 x i128> [[TMP2]], [[TMP3]]
  83 // CHECK-LE-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[VSUBUQM_I]] to <16 x i8>
  84 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP4]]
  85 //
  86 // CHECK-AIX-LABEL: @test_sub(
  87 // CHECK-AIX-NEXT:  entry:
  88 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
  89 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
  90 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
  91 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = add <1 x i128> [[TMP0]], [[TMP1]]
  92 // CHECK-AIX-NEXT:    [[VSUBUQM_I:%.*]] = sub <1 x i128> [[TMP2]], [[TMP3]]
  93 // CHECK-AIX-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[VSUBUQM_I]] to <16 x i8>
  94 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP4]]
  95 //
  96 vector unsigned char test_sub(vector unsigned char a, vector unsigned char b,
  97                               vector unsigned char c) {
  98   return vec_sub_u128(a, vec_add_u128(b, c));
  99 }
 100 // CHECK-LE-LABEL: @test_addc(
 101 // CHECK-LE-NEXT:  entry:
 102 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 103 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 104 // CHECK-LE-NEXT:    [[TMP2:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]])
 105 // CHECK-LE-NEXT:    [[TMP3:%.*]] = bitcast <1 x i128> [[TMP2]] to <16 x i8>
 106 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP3]]
 107 //
 108 // CHECK-AIX-LABEL: @test_addc(
 109 // CHECK-AIX-NEXT:  entry:
 110 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 111 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 112 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddcuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]])
 113 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = bitcast <1 x i128> [[TMP2]] to <16 x i8>
 114 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP3]]
 115 //
 116 vector unsigned char test_addc(vector unsigned char a, vector unsigned char b) {
 117   return vec_addc_u128(a, b);
 118 }
 119 // CHECK-LE-LABEL: @test_addec(
 120 // CHECK-LE-NEXT:  entry:
 121 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 122 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 123 // CHECK-LE-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
 124 // CHECK-LE-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
 125 // CHECK-LE-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
 126 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP4]]
 127 //
 128 // CHECK-AIX-LABEL: @test_addec(
 129 // CHECK-AIX-NEXT:  entry:
 130 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 131 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 132 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
 133 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddecuq(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
 134 // CHECK-AIX-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
 135 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP4]]
 136 //
 137 vector unsigned char test_addec(vector unsigned char a, vector unsigned char b,
 138                                 vector unsigned char c) {
 139   return vec_addec_u128(a, b, c);
 140 }
 141 // CHECK-LE-LABEL: @test_adde(
 142 // CHECK-LE-NEXT:  entry:
 143 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 144 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 145 // CHECK-LE-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
 146 // CHECK-LE-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
 147 // CHECK-LE-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
 148 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP4]]
 149 //
 150 // CHECK-AIX-LABEL: @test_adde(
 151 // CHECK-AIX-NEXT:  entry:
 152 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 153 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 154 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = bitcast <16 x i8> [[C:%.*]] to <1 x i128>
 155 // CHECK-AIX-NEXT:    [[TMP3:%.*]] = tail call <1 x i128> @llvm.ppc.altivec.vaddeuqm(<1 x i128> [[TMP0]], <1 x i128> [[TMP1]], <1 x i128> [[TMP2]])
 156 // CHECK-AIX-NEXT:    [[TMP4:%.*]] = bitcast <1 x i128> [[TMP3]] to <16 x i8>
 157 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP4]]
 158 //
 159 vector unsigned char test_adde(vector unsigned char a, vector unsigned char b,
 160                                vector unsigned char c) {
 161   return vec_adde_u128(a, b, c);
 162 }
 163 // CHECK-LE-LABEL: @test_add(
 164 // CHECK-LE-NEXT:  entry:
 165 // CHECK-LE-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 166 // CHECK-LE-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 167 // CHECK-LE-NEXT:    [[VADDUQM_I:%.*]] = add <1 x i128> [[TMP1]], [[TMP0]]
 168 // CHECK-LE-NEXT:    [[TMP2:%.*]] = bitcast <1 x i128> [[VADDUQM_I]] to <16 x i8>
 169 // CHECK-LE-NEXT:    ret <16 x i8> [[TMP2]]
 170 //
 171 // CHECK-AIX-LABEL: @test_add(
 172 // CHECK-AIX-NEXT:  entry:
 173 // CHECK-AIX-NEXT:    [[TMP0:%.*]] = bitcast <16 x i8> [[A:%.*]] to <1 x i128>
 174 // CHECK-AIX-NEXT:    [[TMP1:%.*]] = bitcast <16 x i8> [[B:%.*]] to <1 x i128>
 175 // CHECK-AIX-NEXT:    [[VADDUQM_I:%.*]] = add <1 x i128> [[TMP1]], [[TMP0]]
 176 // CHECK-AIX-NEXT:    [[TMP2:%.*]] = bitcast <1 x i128> [[VADDUQM_I]] to <16 x i8>
 177 // CHECK-AIX-NEXT:    ret <16 x i8> [[TMP2]]
 178 //
 179 vector unsigned char test_add(vector unsigned char a, vector unsigned char b) {
 180   return vec_add_u128(a, b);
 181 }