clang/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.c

   1 // RUN: %clang_cc1 -triple powerpc64-unknown-linux-gnu -emit-llvm %s \
   2 // RUN:   -target-cpu pwr7 -o - | FileCheck %s
   3 // RUN: %clang_cc1 -triple powerpc64le-unknown-linux-gnu -emit-llvm %s \
   4 // RUN:   -target-cpu pwr8 -o - | FileCheck %s
   5 // RUN: %clang_cc1 -triple powerpc64-unknown-aix -emit-llvm %s \
   6 // RUN:   -target-cpu pwr7 -o - | FileCheck %s
   7 // RUN: %clang_cc1 -triple powerpc-unknown-aix -emit-llvm %s \
   8 // RUN:   -target-cpu pwr7 -o - | FileCheck %s
   9
  10 // CHECK-LABEL: @mtfsb0(
  11 // CHECK:         call void @llvm.ppc.mtfsb0(i32 10)
  12 // CHECK-NEXT:    ret void
  13 //
  14 void mtfsb0 (void) {
  15   __mtfsb0 (10);
  16 }
  17
  18 // CHECK-LABEL: @mtfsb1(
  19 // CHECK:         call void @llvm.ppc.mtfsb1(i32 0)
  20 // CHECK-NEXT:    ret void
  21 //
  22 void mtfsb1 (void) {
  23   __mtfsb1 (0);
  24 }
  25
  26 // CHECK-LABEL: @mtfsf(
  27 // CHECK:         [[TMP0:%.*]] = uitofp i32 %{{.*}} to double
  28 // CHECK-NEXT:    call void @llvm.ppc.mtfsf(i32 8, double [[TMP0]])
  29 // CHECK-NEXT:    ret void
  30 //
  31 void mtfsf (unsigned int ui) {
  32   __mtfsf (8, ui);
  33 }
  34
  35 // CHECK-LABEL: @mtfsfi(
  36 // CHECK:         call void @llvm.ppc.mtfsfi(i32 7, i32 15)
  37 // CHECK-NEXT:    ret void
  38 //
  39 void mtfsfi (void) {
  40   __mtfsfi (7, 15);
  41 }
  42
  43 // CHECK-LABEL: @fmsub(
  44 // CHECK:         [[D_ADDR:%.*]] = alloca double, align 8
  45 // CHECK-NEXT:    store double [[D:%.*]], ptr [[D_ADDR]], align 8
  46 // CHECK-NEXT:    [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8
  47 // CHECK-NEXT:    [[TMP1:%.*]] = load double, ptr [[D_ADDR]], align 8
  48 // CHECK-NEXT:    [[TMP2:%.*]] = load double, ptr [[D_ADDR]], align 8
  49 // CHECK-NEXT:    [[TMP3:%.*]] = call double @llvm.ppc.fmsub(double [[TMP0]], double [[TMP1]], double [[TMP2]])
  50 // CHECK-NEXT:    ret double [[TMP3]]
  51 //
  52 double fmsub (double d) {
  53   return __fmsub (d, d, d);
  54 }
  55
  56 // CHECK-LABEL: @fmsubs(
  57 // CHECK:         [[F_ADDR:%.*]] = alloca float, align 4
  58 // CHECK-NEXT:    store float [[F:%.*]], ptr [[F_ADDR]], align 4
  59 // CHECK-NEXT:    [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 4
  60 // CHECK-NEXT:    [[TMP1:%.*]] = load float, ptr [[F_ADDR]], align 4
  61 // CHECK-NEXT:    [[TMP2:%.*]] = load float, ptr [[F_ADDR]], align 4
  62 // CHECK-NEXT:    [[TMP3:%.*]] = call float @llvm.ppc.fmsubs(float [[TMP0]], float [[TMP1]], float [[TMP2]])
  63 // CHECK-NEXT:    ret float [[TMP3]]
  64 //
  65 float fmsubs (float f) {
  66   return __fmsubs (f, f, f);
  67 }
  68
  69 // CHECK-LABEL: @fnmadd(
  70 // CHECK:         [[D_ADDR:%.*]] = alloca double, align 8
  71 // CHECK-NEXT:    store double [[D:%.*]], ptr [[D_ADDR]], align 8
  72 // CHECK-NEXT:    [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8
  73 // CHECK-NEXT:    [[TMP1:%.*]] = load double, ptr [[D_ADDR]], align 8
  74 // CHECK-NEXT:    [[TMP2:%.*]] = load double, ptr [[D_ADDR]], align 8
  75 // CHECK-NEXT:    [[TMP3:%.*]] = call double @llvm.ppc.fnmadd(double [[TMP0]], double [[TMP1]], double [[TMP2]])
  76 // CHECK-NEXT:    ret double [[TMP3]]
  77 //
  78 double fnmadd (double d) {
  79   return __fnmadd (d, d, d);
  80 }
  81
  82 // CHECK-LABEL: @fnmadds(
  83 // CHECK:         [[F_ADDR:%.*]] = alloca float, align 4
  84 // CHECK-NEXT:    store float [[F:%.*]], ptr [[F_ADDR]], align 4
  85 // CHECK-NEXT:    [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 4
  86 // CHECK-NEXT:    [[TMP1:%.*]] = load float, ptr [[F_ADDR]], align 4
  87 // CHECK-NEXT:    [[TMP2:%.*]] = load float, ptr [[F_ADDR]], align 4
  88 // CHECK-NEXT:    [[TMP3:%.*]] = call float @llvm.ppc.fnmadds(float [[TMP0]], float [[TMP1]], float [[TMP2]])
  89 // CHECK-NEXT:    ret float [[TMP3]]
  90 //
  91 float fnmadds (float f) {
  92   return __fnmadds (f, f, f);
  93 }
  94
  95 // CHECK-LABEL: @fnmsub(
  96 // CHECK:         [[D_ADDR:%.*]] = alloca double, align 8
  97 // CHECK-NEXT:    store double [[D:%.*]], ptr [[D_ADDR]], align 8
  98 // CHECK-NEXT:    [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8
  99 // CHECK-NEXT:    [[TMP1:%.*]] = load double, ptr [[D_ADDR]], align 8
 100 // CHECK-NEXT:    [[TMP2:%.*]] = load double, ptr [[D_ADDR]], align 8
 101 // CHECK-NEXT:    [[TMP3:%.*]] = call double @llvm.ppc.fnmsub.f64(double [[TMP0]], double [[TMP1]], double [[TMP2]])
 102 // CHECK-NEXT:    ret double [[TMP3]]
 103 //
 104 double fnmsub (double d) {
 105   return __fnmsub (d, d, d);
 106 }
 107
 108 // CHECK-LABEL: @fnmsubs(
 109 // CHECK:         [[F_ADDR:%.*]] = alloca float, align 4
 110 // CHECK-NEXT:    store float [[F:%.*]], ptr [[F_ADDR]], align 4
 111 // CHECK-NEXT:    [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 4
 112 // CHECK-NEXT:    [[TMP1:%.*]] = load float, ptr [[F_ADDR]], align 4
 113 // CHECK-NEXT:    [[TMP2:%.*]] = load float, ptr [[F_ADDR]], align 4
 114 // CHECK-NEXT:    [[TMP3:%.*]] = call float @llvm.ppc.fnmsub.f32(float [[TMP0]], float [[TMP1]], float [[TMP2]])
 115 // CHECK-NEXT:    ret float [[TMP3]]
 116 //
 117 float fnmsubs (float f) {
 118   return __fnmsubs (f, f, f);
 119 }
 120
 121 // CHECK-LABEL: @fre(
 122 // CHECK:         [[D_ADDR:%.*]] = alloca double, align 8
 123 // CHECK-NEXT:    store double [[D:%.*]], ptr [[D_ADDR]], align 8
 124 // CHECK-NEXT:    [[TMP0:%.*]] = load double, ptr [[D_ADDR]], align 8
 125 // CHECK-NEXT:    [[TMP1:%.*]] = call double @llvm.ppc.fre(double [[TMP0]])
 126 // CHECK-NEXT:    ret double [[TMP1]]
 127 //
 128 double fre (double d) {
 129   return __fre (d);
 130 }
 131
 132 // CHECK-LABEL: @fres(
 133 // CHECK:         [[F_ADDR:%.*]] = alloca float, align 4
 134 // CHECK-NEXT:    store float [[F:%.*]], ptr [[F_ADDR]], align 4
 135 // CHECK-NEXT:    [[TMP0:%.*]] = load float, ptr [[F_ADDR]], align 4
 136 // CHECK-NEXT:    [[TMP1:%.*]] = call float @llvm.ppc.fres(float [[TMP0]])
 137 // CHECK-NEXT:    ret float [[TMP1]]
 138 //
 139 float fres (float f) {
 140   return __fres (f);
 141 }