clang/test/CodeGen/arm-asm.c

   1 // REQUIRES: arm-registered-target
   2 // RUN: %clang_cc1 -triple thumb %s -emit-llvm -o - | FileCheck %s
   3 int t1() {
   4     static float k = 1.0f;
   5     // CHECK: flds s15
   6     __asm__ volatile ("flds s15, %[k] \n" :: [k] "Uv" (k) : "s15");
   7     return 0;
   8 }
   9
  10 // CHECK-LABEL: @even_reg_constraint_Te
  11 int even_reg_constraint_Te(void) {
  12   int acc = 0;
  13   // CHECK: vaddv{{.*\^Te}}
  14   asm("vaddv.s8 %0, Q0"
  15       : "+Te" (acc));
  16   return acc;
  17 }
  18
  19 // CHECK-LABEL: @odd_reg_constraint_To
  20 int odd_reg_constraint_To(void) {
  21   int eacc = 0, oacc = 0;
  22   // CHECK: vaddlv{{.*\^To}}
  23   asm("vaddlv.s8 %0, %1, Q0"
  24       : "+Te" (eacc), "+To" (oacc));
  25   return oacc;
  26 }