1 // RUN: %clang_cc1 -triple thumbv8-linux-gnueabihf -target-cpu cortex-a57 \
2 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
3 // RUN: opt -S -passes=mem2reg | FileCheck -check-prefixes=CHECK,CHECK-A32 %s
4 // RUN: %clang_cc1 -triple arm64-linux-gnueabihf -target-feature +neon \
5 // RUN: -ffreestanding -disable-O0-optnone -emit-llvm %s -o - | \
6 // RUN: opt -S -passes=mem2reg | FileCheck -check-prefixes=CHECK,CHECK-A64 %s
8 // REQUIRES: aarch64-registered-target || arm-registered-target
12 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrnda_f32(<2 x float> noundef %a)
13 // CHECK-A32: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrinta.v2f32(<2 x float> %a)
14 // CHECK-A64: [[VRNDA_V1_I:%.*]] = call <2 x float> @llvm.round.v2f32(<2 x float> %a)
15 // CHECK: ret <2 x float> [[VRNDA_V1_I]]
16 float32x2_t
test_vrnda_f32(float32x2_t a
) {
20 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndaq_f32(<4 x float> noundef %a)
21 // CHECK-A32: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrinta.v4f32(<4 x float> %a)
22 // CHECK-A64: [[VRNDAQ_V1_I:%.*]] = call <4 x float> @llvm.round.v4f32(<4 x float> %a)
23 // CHECK: ret <4 x float> [[VRNDAQ_V1_I]]
24 float32x4_t
test_vrndaq_f32(float32x4_t a
) {
28 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrndm_f32(<2 x float> noundef %a)
29 // CHECK-A32: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintm.v2f32(<2 x float> %a)
30 // CHECK-A64: [[VRNDM_V1_I:%.*]] = call <2 x float> @llvm.floor.v2f32(<2 x float> %a)
31 // CHECK: ret <2 x float> [[VRNDM_V1_I]]
32 float32x2_t
test_vrndm_f32(float32x2_t a
) {
36 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndmq_f32(<4 x float> noundef %a)
37 // CHECK-A32: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintm.v4f32(<4 x float> %a)
38 // CHECK-A64: [[VRNDMQ_V1_I:%.*]] = call <4 x float> @llvm.floor.v4f32(<4 x float> %a)
39 // CHECK: ret <4 x float> [[VRNDMQ_V1_I]]
40 float32x4_t
test_vrndmq_f32(float32x4_t a
) {
44 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrndn_f32(<2 x float> noundef %a)
45 // CHECK-A32: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintn.v2f32(<2 x float> %a)
46 // CHECK-A64: [[VRNDN_V1_I:%.*]] = call <2 x float> @llvm.roundeven.v2f32(<2 x float> %a)
47 // CHECK: ret <2 x float> [[VRNDN_V1_I]]
48 float32x2_t
test_vrndn_f32(float32x2_t a
) {
52 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndnq_f32(<4 x float> noundef %a)
53 // CHECK-A32: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintn.v4f32(<4 x float> %a)
54 // CHECK-A64: [[VRNDNQ_V1_I:%.*]] = call <4 x float> @llvm.roundeven.v4f32(<4 x float> %a)
55 // CHECK: ret <4 x float> [[VRNDNQ_V1_I]]
56 float32x4_t
test_vrndnq_f32(float32x4_t a
) {
60 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrndp_f32(<2 x float> noundef %a)
61 // CHECK-A32: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintp.v2f32(<2 x float> %a)
62 // CHECK-A64: [[VRNDP_V1_I:%.*]] = call <2 x float> @llvm.ceil.v2f32(<2 x float> %a)
63 // CHECK: ret <2 x float> [[VRNDP_V1_I]]
64 float32x2_t
test_vrndp_f32(float32x2_t a
) {
68 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndpq_f32(<4 x float> noundef %a)
69 // CHECK-A32: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintp.v4f32(<4 x float> %a)
70 // CHECK-A64: [[VRNDPQ_V1_I:%.*]] = call <4 x float> @llvm.ceil.v4f32(<4 x float> %a)
71 // CHECK: ret <4 x float> [[VRNDPQ_V1_I]]
72 float32x4_t
test_vrndpq_f32(float32x4_t a
) {
76 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrndx_f32(<2 x float> noundef %a)
77 // CHECK-A32: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintx.v2f32(<2 x float> %a)
78 // CHECK-A64: [[VRNDX_V1_I:%.*]] = call <2 x float> @llvm.rint.v2f32(<2 x float> %a)
79 // CHECK: ret <2 x float> [[VRNDX_V1_I]]
80 float32x2_t
test_vrndx_f32(float32x2_t a
) {
84 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndxq_f32(<4 x float> noundef %a)
85 // CHECK-A32: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintx.v4f32(<4 x float> %a)
86 // CHECK-A64: [[VRNDXQ_V1_I:%.*]] = call <4 x float> @llvm.rint.v4f32(<4 x float> %a)
87 // CHECK: ret <4 x float> [[VRNDXQ_V1_I]]
88 float32x4_t
test_vrndxq_f32(float32x4_t a
) {
92 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrnd_f32(<2 x float> noundef %a)
93 // CHECK-A32: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.arm.neon.vrintz.v2f32(<2 x float> %a)
94 // CHECK-A64: [[VRND_V1_I:%.*]] = call <2 x float> @llvm.trunc.v2f32(<2 x float> %a)
95 // CHECK: ret <2 x float> [[VRND_V1_I]]
96 float32x2_t
test_vrnd_f32(float32x2_t a
) {
100 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndq_f32(<4 x float> noundef %a)
101 // CHECK-A32: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.arm.neon.vrintz.v4f32(<4 x float> %a)
102 // CHECK-A64: [[VRNDQ_V1_I:%.*]] = call <4 x float> @llvm.trunc.v4f32(<4 x float> %a)
103 // CHECK: ret <4 x float> [[VRNDQ_V1_I]]
104 float32x4_t
test_vrndq_f32(float32x4_t a
) {
108 // CHECK-LABEL: define{{.*}} float @test_vrndns_f32(float noundef %a)
109 // CHECK-A32: [[VRNDN_I:%.*]] = call float @llvm.arm.neon.vrintn.f32(float %a)
110 // CHECK-A64: [[VRNDN_I:%.*]] = call float @llvm.roundeven.f32(float %a)
111 // CHECK: ret float [[VRNDN_I]]
112 float32_t
test_vrndns_f32(float32_t a
) {
113 return vrndns_f32(a
);
116 // CHECK-LABEL: define{{.*}} <2 x float> @test_vrndi_f32(<2 x float> noundef %a)
117 // CHECK: [[TMP0:%.*]] = bitcast <2 x float> %a to <8 x i8>
118 // CHECK: [[VRNDI1_I:%.*]] = call <2 x float> @llvm.nearbyint.v2f32(<2 x float> %a)
119 // CHECK: ret <2 x float> [[VRNDI1_I]]
120 float32x2_t
test_vrndi_f32(float32x2_t a
) {
124 // CHECK-LABEL: define{{.*}} <4 x float> @test_vrndiq_f32(<4 x float> noundef %a)
125 // CHECK: [[TMP0:%.*]] = bitcast <4 x float> %a to <16 x i8>
126 // CHECK: [[VRNDI1_I:%.*]] = call <4 x float> @llvm.nearbyint.v4f32(<4 x float> %a)
127 // CHECK: ret <4 x float> [[VRNDI1_I]]
128 float32x4_t
test_vrndiq_f32(float32x4_t a
) {
129 return vrndiq_f32(a
);