clang/test/Sema/aarch64-special-register.c

   1 // RUN: %clang_cc1 -ffreestanding -fsyntax-only -verify -triple aarch64 %s
   2
   3 void string_literal(unsigned v) {
   4   __builtin_arm_wsr(0, v); // expected-error {{expression is not a string literal}}
   5 }
   6
   7 void wsr_1(unsigned v) {
   8   __builtin_arm_wsr("sysreg", v);
   9 }
  10
  11 void wsrp_1(void *v) {
  12   __builtin_arm_wsrp("sysreg", v);
  13 }
  14
  15 void wsr64_1(unsigned long v) {
  16   __builtin_arm_wsr64("sysreg", v);
  17 }
  18
  19 void wsr128_1(__uint128_t v) {
  20   __builtin_arm_wsr128("sysreg", v);
  21 }
  22
  23 unsigned rsr_1(void) {
  24   return __builtin_arm_rsr("sysreg");
  25 }
  26
  27 void *rsrp_1(void) {
  28   return __builtin_arm_rsrp("sysreg");
  29 }
  30
  31 unsigned long rsr64_1(void) {
  32   return __builtin_arm_rsr64("sysreg");
  33 }
  34
  35 __uint128_t rsr128_1(void) {
  36   return __builtin_arm_rsr128("sysreg");
  37 }
  38
  39 void wsr_2(unsigned v) {
  40   __builtin_arm_wsr("0:1:2:3:4", v);
  41 }
  42
  43 void wsrp_2(void *v) {
  44   __builtin_arm_wsrp("0:1:2:3:4", v);
  45 }
  46
  47 void wsr64_2(unsigned long v) {
  48   __builtin_arm_wsr64("0:1:2:3:4", v);
  49 }
  50
  51 unsigned rsr_2(void) {
  52   return __builtin_arm_rsr("0:1:15:15:4");
  53 }
  54
  55 void *rsrp_2(void) {
  56   return __builtin_arm_rsrp("0:1:2:3:4");
  57 }
  58
  59 unsigned long rsr64_2(void) {
  60   return __builtin_arm_rsr64("0:1:15:15:4");
  61 }
  62
  63 __uint128_t rsr128_2(void) {
  64   return __builtin_arm_rsr128("0:1:15:15:4");
  65 }
  66
  67 void wsr_3(unsigned v) {
  68   __builtin_arm_wsr("0:1:2", v); //expected-error {{invalid special register for builtin}}
  69 }
  70
  71 void wsrp_3(void *v) {
  72   __builtin_arm_wsrp("0:1:2", v); //expected-error {{invalid special register for builtin}}
  73 }
  74
  75 void wsr64_3(unsigned long v) {
  76   __builtin_arm_wsr64("0:1:2", v); //expected-error {{invalid special register for builtin}}
  77 }
  78
  79 void wsr128_3(__uint128_t v) {
  80   __builtin_arm_wsr128("0:1:2", v); //expected-error {{invalid special register for builtin}}
  81 }
  82
  83 unsigned rsr_3(void) {
  84   return __builtin_arm_rsr("0:1:2"); //expected-error {{invalid special register for builtin}}
  85 }
  86
  87 unsigned rsr_4(void) {
  88   return __builtin_arm_rsr("0:1:2:3:8"); //expected-error {{invalid special register for builtin}}
  89 }
  90
  91 unsigned rsr_5(void) {
  92   return __builtin_arm_rsr("0:8:1:2:3"); //expected-error {{invalid special register for builtin}}
  93 }
  94
  95 unsigned rsr_6(void) {
  96   return __builtin_arm_rsr("0:1:16:16:2"); //expected-error {{invalid special register for builtin}}
  97 }
  98
  99 void *rsrp_3(void) {
 100   return __builtin_arm_rsrp("0:1:2"); //expected-error {{invalid special register for builtin}}
 101 }
 102
 103 unsigned long rsr64_3(void) {
 104   return __builtin_arm_rsr64("0:1:2"); //expected-error {{invalid special register for builtin}}
 105 }
 106
 107 unsigned long rsr64_4(void) {
 108   return __builtin_arm_rsr64("0:1:2:3:8"); //expected-error {{invalid special register for builtin}}
 109 }
 110
 111 unsigned long rsr64_5(void) {
 112   return __builtin_arm_rsr64("0:8:2:3:4"); //expected-error {{invalid special register for builtin}}
 113 }
 114
 115 unsigned long rsr64_6(void) {
 116   return __builtin_arm_rsr64("0:1:16:16:2"); //expected-error {{invalid special register for builtin}}
 117 }
 118
 119 __uint128_t rsr128_3(void) {
 120   return __builtin_arm_rsr128("0:1:2"); //expected-error {{invalid special register for builtin}}
 121 }
 122
 123 __uint128_t rsr128_4(void) {
 124   return __builtin_arm_rsr128("0:1:2:3:8"); //expected-error {{invalid special register for builtin}}
 125 }
 126
 127 __uint128_t rsr128_5(void) {
 128   return __builtin_arm_rsr128("0:8:2:3:4"); //expected-error {{invalid special register for builtin}}
 129 }
 130
 131 __uint128_t rsr128_6(void) {
 132   return __builtin_arm_rsr128("0:1:16:16:2"); //expected-error {{invalid special register for builtin}}
 133 }
 134
 135 void wsr_4(void) {
 136   __builtin_arm_wsr("spsel", 15);
 137   __builtin_arm_wsr("daifclr", 15);
 138   __builtin_arm_wsr("daifset", 15);
 139   __builtin_arm_wsr("pan", 15);
 140   __builtin_arm_wsr("uao", 15);
 141   __builtin_arm_wsr("dit", 15);
 142   __builtin_arm_wsr("ssbs", 15);
 143   __builtin_arm_wsr("tco", 15);
 144
 145   __builtin_arm_wsr("allint", 1);
 146   __builtin_arm_wsr("pm", 1);
 147 }
 148
 149 void wsr64_4(void) {
 150   __builtin_arm_wsr("spsel", 15);
 151   __builtin_arm_wsr("daifclr", 15);
 152   __builtin_arm_wsr("daifset", 15);
 153   __builtin_arm_wsr("pan", 15);
 154   __builtin_arm_wsr("uao", 15);
 155   __builtin_arm_wsr("dit", 15);
 156   __builtin_arm_wsr("ssbs", 15);
 157   __builtin_arm_wsr("tco", 15);
 158
 159   __builtin_arm_wsr("allint", 1);
 160   __builtin_arm_wsr("pm", 1);
 161 }
 162
 163 void wsr_5(unsigned v) {
 164   __builtin_arm_wsr("spsel", v); // expected-error {{must be a constant integer}}
 165   __builtin_arm_wsr("daifclr", v); // expected-error {{must be a constant integer}}
 166   __builtin_arm_wsr("daifset", v); // expected-error {{must be a constant integer}}
 167   __builtin_arm_wsr("pan", v); // expected-error {{must be a constant integer}}
 168   __builtin_arm_wsr("uao", v); // expected-error {{must be a constant integer}}
 169   __builtin_arm_wsr("dit", v); // expected-error {{must be a constant integer}}
 170   __builtin_arm_wsr("ssbs", v); // expected-error {{must be a constant integer}}
 171   __builtin_arm_wsr("tco", v); // expected-error {{must be a constant integer}}
 172   __builtin_arm_wsr("allint", v); // expected-error {{must be a constant integer}}
 173   __builtin_arm_wsr("pm", v); // expected-error {{must be a constant integer}}
 174 }
 175
 176 void wsr64_5(unsigned long v) {
 177   __builtin_arm_wsr64("spsel", v); // expected-error {{must be a constant integer}}
 178   __builtin_arm_wsr64("daifclr", v); // expected-error {{must be a constant integer}}
 179   __builtin_arm_wsr64("daifset", v); // expected-error {{must be a constant integer}}
 180   __builtin_arm_wsr64("pan", v); // expected-error {{must be a constant integer}}
 181   __builtin_arm_wsr64("uao", v); // expected-error {{must be a constant integer}}
 182   __builtin_arm_wsr64("dit", v); // expected-error {{must be a constant integer}}
 183   __builtin_arm_wsr64("ssbs", v); // expected-error {{must be a constant integer}}
 184   __builtin_arm_wsr64("tco", v); // expected-error {{must be a constant integer}}
 185   __builtin_arm_wsr64("allint", v); // expected-error {{must be a constant integer}}
 186   __builtin_arm_wsr64("pm", v); // expected-error {{must be a constant integer}}
 187 }
 188
 189 void wsr_6(void) {
 190   __builtin_arm_wsr("spsel", 16); // expected-error {{outside the valid range}}
 191   __builtin_arm_wsr("daifclr", 16); // expected-error {{outside the valid range}}
 192   __builtin_arm_wsr("daifset", 16); // expected-error {{outside the valid range}}
 193   __builtin_arm_wsr("pan", 16); // expected-error {{outside the valid range}}
 194   __builtin_arm_wsr("uao", 16); // expected-error {{outside the valid range}}
 195   __builtin_arm_wsr("dit", 16); // expected-error {{outside the valid range}}
 196   __builtin_arm_wsr("ssbs", 16); // expected-error {{outside the valid range}}
 197   __builtin_arm_wsr("tco", 16); // expected-error {{outside the valid range}}
 198
 199   __builtin_arm_wsr("allint", 2); // expected-error {{outside the valid range}}
 200   __builtin_arm_wsr("pm", 2); // expected-error {{outside the valid range}}
 201 }
 202
 203 void wsr64_6(void) {
 204   __builtin_arm_wsr64("spsel", 16); // expected-error {{outside the valid range}}
 205   __builtin_arm_wsr64("daifclr", 16); // expected-error {{outside the valid range}}
 206   __builtin_arm_wsr64("daifset", 16); // expected-error {{outside the valid range}}
 207   __builtin_arm_wsr64("pan", 16); // expected-error {{outside the valid range}}
 208   __builtin_arm_wsr64("uao", 16); // expected-error {{outside the valid range}}
 209   __builtin_arm_wsr64("dit", 16); // expected-error {{outside the valid range}}
 210   __builtin_arm_wsr64("ssbs", 16); // expected-error {{outside the valid range}}
 211   __builtin_arm_wsr64("tco", 16); // expected-error {{outside the valid range}}
 212
 213   __builtin_arm_wsr64("allint", 2); // expected-error {{outside the valid range}}
 214   __builtin_arm_wsr64("pm", 2); // expected-error {{outside the valid range}}
 215 }