[clang] Handle __declspec() attributes in using
[llvm-project.git] / compiler-rt / lib / builtins / hexagon / moddi3.S
blobd4246b61bdc3aa75a146180f264f87fb35f9987b
1 //===----------------------Hexagon builtin routine ------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9         .macro FUNCTION_BEGIN name
10         .text
11         .p2align 5
12         .globl \name
13         .type  \name, @function
14 \name:
15         .endm
17         .macro FUNCTION_END name
18         .size  \name, . - \name
19         .endm
22 FUNCTION_BEGIN __hexagon_moddi3
23         {
24                 p3 = tstbit(r1,#31)
25         }
26         {
27                 r1:0 = abs(r1:0)
28                 r3:2 = abs(r3:2)
29         }
30         {
31                 r6 = cl0(r1:0)              // count leading 0's of dividend (numerator)
32                 r7 = cl0(r3:2)              // count leading 0's of divisor (denominator)
33                 r5:4 = r3:2                 // divisor moved into working registers
34                 r3:2 = r1:0                 // dividend is the initial remainder, r3:2 contains remainder
35         }
36         {
37                 r10 = sub(r7,r6)            // left shift count for bit & divisor
38                 r1:0 = #0                   // initialize quotient to 0
39                 r15:14 = #1                 // initialize bit to 1
40         }
41         {
42                 r11 = add(r10,#1)           // loop count is 1 more than shift count
43                 r13:12 = lsl(r5:4,r10)      // shift divisor msb into same bit position as dividend msb
44                 r15:14 = lsl(r15:14,r10)    // shift the bit left by same amount as divisor
45         }
46         {
47                 p0 = cmp.gtu(r5:4,r3:2)     // check if divisor > dividend
48                 loop0(1f,r11)               // register loop
49         }
50         {
51                 if (p0) jump .hexagon_moddi3_return          // if divisor > dividend, we're done, so return
52         }
53         .falign
55         {
56                 p0 = cmp.gtu(r13:12,r3:2)   // set predicate reg if shifted divisor > current remainder
57         }
58         {
59                 r7:6 = sub(r3:2, r13:12)    // subtract shifted divisor from current remainder
60                 r9:8 = add(r1:0, r15:14)    // save current quotient to temp (r9:8)
61         }
62         {
63                 r1:0 = vmux(p0, r1:0, r9:8) // choose either current quotient or new quotient (r9:8)
64                 r3:2 = vmux(p0, r3:2, r7:6) // choose either current remainder or new remainder (r7:6)
65         }
66         {
67                 r15:14 = lsr(r15:14, #1)    // shift bit right by 1 for next iteration
68                 r13:12 = lsr(r13:12, #1)    // shift "shifted divisor" right by 1 for next iteration
69         }:endloop0
71 .hexagon_moddi3_return:
72         {
73                 r1:0 = neg(r3:2)
74         }
75         {
76                 r1:0 = vmux(p3,r1:0,r3:2)
77                 jumpr r31
78         }
79 FUNCTION_END __hexagon_moddi3
81   .globl __qdsp_moddi3
82   .set   __qdsp_moddi3, __hexagon_moddi3