[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx1030_vdata_e016a1.rst
blobfe9ab98b8db5a4d3b897366fe78002c2c52c3b8d
1 ..
2     **************************************************
3     *                                                *
4     *   Automatically generated file, do not edit!   *
5     *                                                *
6     **************************************************
8 .. _amdgpu_synid_gfx1030_vdata_e016a1:
10 vdata
11 =====
13 Instruction input.
15 *Size:* 4 dwords.
17 *Operands:* :ref:`v<amdgpu_synid_v>`