llvm/docs/AMDGPU/gfx10_vaddr_9aeece.rst

   1 ..
   2     **************************************************
   3     *                                                *
   4     *   Automatically generated file, do not edit!   *
   5     *                                                *
   6     **************************************************
   7
   8 .. _amdgpu_synid_gfx10_vaddr_9aeece:
   9
  10 vaddr
  11 =====
  12
  13 A 64-bit flat global address or a 32-bit offset depending on addressing mode:
  14
  15 * Address = :ref:`vaddr<amdgpu_synid_gfx10_vaddr_9aeece>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid_gfx10_vaddr_9aeece>` is a 64-bit address. This mode is indicated by :ref:`saddr<amdgpu_synid_gfx10_saddr_beaa25>` set to :ref:`off<amdgpu_synid_off>`.
  16 * Address = :ref:`saddr<amdgpu_synid_gfx10_saddr_beaa25>` + :ref:`vaddr<amdgpu_synid_gfx10_vaddr_9aeece>` + :ref:`offset12s<amdgpu_synid_flat_offset12s>`. :ref:`vaddr<amdgpu_synid_gfx10_vaddr_9aeece>` is a 32-bit offset. This mode is used when :ref:`saddr<amdgpu_synid_gfx10_saddr_beaa25>` is not :ref:`off<amdgpu_synid_off>`.
  17
  18 *Size:* 1 or 2 dwords.
  19
  20 *Operands:* :ref:`v<amdgpu_synid_v>`