[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx10_vdst_dd8a32.rst
blob5d10df415430955b8a3cbbd83dab3801ba85353b
1 ..
2     **************************************************
3     *                                                *
4     *   Automatically generated file, do not edit!   *
5     *                                                *
6     **************************************************
8 .. _amdgpu_synid_gfx10_vdst_dd8a32:
10 vdst
11 ====
13 Instruction output: data read from a memory buffer.
15 *Size:* 4 dwords.
17 *Operands:* :ref:`v<amdgpu_synid_v>`