[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx11_src_7af462.rst
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8 .. _amdgpu_synid_gfx11_src_7af462:
10 src
11 ===
13 Instruction input.
15 *Size:* 4 dwords if wavefront size is 64, otherwise 8 dwords.
17 *Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`iconst<amdgpu_synid_iconst>`, :ref:`fconst<amdgpu_synid_fconst>`