[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx8_vaddr_f20ee4.rst
blobb018b012542d681b8fabb7e71662bfdddc68ea97
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8 .. _amdgpu_synid_gfx8_vaddr_f20ee4:
10 vaddr
11 =====
13 An offset from the start of GDS/LDS memory.
15 *Size:* 1 dword.
17 *Operands:* :ref:`v<amdgpu_synid_v>`