[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx8_vdst_709347.rst
blobb1522fd4c0001590d31778e4d10c77135d7b3ee4
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8 .. _amdgpu_synid_gfx8_vdst_709347:
10 vdst
11 ====
13 Instruction output: data read from a memory buffer.
15 *Size:* 1 dword.
17 *Operands:* :ref:`v<amdgpu_synid_v>`