[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx8_vdst_de9309.rst
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10 vdst
11 ====
13 Instruction output: data read from a memory buffer and converted to 16-bit format.
15 *Size:* depends on GFX8 GPU revision and :ref:`tfe<amdgpu_synid_tfe>`:
17 * 3 dwords for GFX8.0. This H/W supports no packing.
18 * 2 dwords for GFX8.1+. This H/W supports data packing.
19 * :ref:`tfe<amdgpu_synid_tfe>` adds 1 dword if specified.
21 *Operands:* :ref:`v<amdgpu_synid_v>`