[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx90a_dst.rst
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8 .. _amdgpu_synid_gfx90a_dst:
10 dst
11 ===
13 This is an input operand. It may optionally serve as a destination if :ref:`glc<amdgpu_synid_glc>` is specified.