[RISCV] Refactor predicates for rvv intrinsic patterns.

[llvm-project.git] / llvm / docs / AMDGPU / gfx940_imm16_0533c2.rst

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.. _amdgpu_synid_gfx940_imm16_0533c2:

imm16
=====

An :ref:`integer_number<amdgpu_synid_integer_number>` or an :ref:`absolute_expression<amdgpu_synid_absolute_expression>`. The value must be in the range from -32768 to 65535.