[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx940_saddr_22dbc1.rst
blobb97ad24dd791b19a2f7a4295d551543d320cbbce
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8 .. _amdgpu_synid_gfx940_saddr_22dbc1:
10 saddr
11 =====
13 An optional 32-bit flat scratch offset. Must be specified as :ref:`off<amdgpu_synid_off>` if not used.
15 * Offset = [:ref:`vaddr<amdgpu_synid_gfx940_vaddr_6ab80d>`] + [:ref:`saddr<amdgpu_synid_gfx940_saddr_22dbc1>`] + :ref:`offset13s<amdgpu_synid_flat_offset13s>`.
17 *Size:* 1 dword.
19 *Operands:* :ref:`s<amdgpu_synid_s>`, :ref:`flat_scratch<amdgpu_synid_flat_scratch>`, :ref:`xnack_mask<amdgpu_synid_xnack_mask>`, :ref:`vcc<amdgpu_synid_vcc>`, :ref:`ttmp<amdgpu_synid_ttmp>`, :ref:`off<amdgpu_synid_off>`