[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx940_vcc.rst
blobb82480731d30bd7e3432f53fe7248bf9e54c37bf
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8 .. _amdgpu_synid_gfx940_vcc:
10 vcc
11 ===
13 Vector condition code.
15 *Size:* 2 dwords.
17 *Operands:* :ref:`vcc<amdgpu_synid_vcc>`