[RISCV] Refactor predicates for rvv intrinsic patterns.
[llvm-project.git] / llvm / docs / AMDGPU / gfx940_vdata_314509.rst
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8 .. _amdgpu_synid_gfx940_vdata_314509:
10 vdata
11 =====
13 Input data for an atomic instruction.
15 Optionally, this operand may be used to store output data:
17 * If :ref:`sc0<amdgpu_synid_sc0>` is specified, gets the memory value before the operation.
19 *Size:* 1 dword.
21 *Operands:* :ref:`v<amdgpu_synid_v>`, :ref:`a<amdgpu_synid_a>`