llvm/lib/Target/Xtensa/XtensaISelLowering.h

   1 //===- XtensaISelLowering.h - Xtensa DAG Lowering Interface -----*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file defines the interfaces that Xtensa uses to lower LLVM code into a
  10 // selection DAG.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef LLVM_LIB_TARGET_XTENSA_XTENSAISELLOWERING_H
  15 #define LLVM_LIB_TARGET_XTENSA_XTENSAISELLOWERING_H
  16
  17 #include "llvm/CodeGen/CallingConvLower.h"
  18 #include "llvm/CodeGen/SelectionDAG.h"
  19 #include "llvm/CodeGen/TargetLowering.h"
  20
  21 namespace llvm {
  22
  23 namespace XtensaISD {
  24 enum {
  25   FIRST_NUMBER = ISD::BUILTIN_OP_END,
  26   BR_JT,
  27
  28   // Calls a function.  Operand 0 is the chain operand and operand 1
  29   // is the target address.  The arguments start at operand 2.
  30   // There is an optional glue operand at the end.
  31   CALL,
  32
  33   // Wraps a TargetGlobalAddress that should be loaded using PC-relative
  34   // accesses.  Operand 0 is the address.
  35   PCREL_WRAPPER,
  36   RET,
  37
  38   // Select with condition operator - This selects between a true value and
  39   // a false value (ops #2 and #3) based on the boolean result of comparing
  40   // the lhs and rhs (ops #0 and #1) of a conditional expression with the
  41   // condition code in op #4
  42   SELECT_CC,
  43 };
  44 }
  45
  46 class XtensaSubtarget;
  47
  48 class XtensaTargetLowering : public TargetLowering {
  49 public:
  50   explicit XtensaTargetLowering(const TargetMachine &TM,
  51                                 const XtensaSubtarget &STI);
  52
  53   EVT getSetCCResultType(const DataLayout &, LLVMContext &,
  54                          EVT VT) const override {
  55     if (!VT.isVector())
  56       return MVT::i32;
  57     return VT.changeVectorElementTypeToInteger();
  58   }
  59
  60   bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const override;
  61
  62   const char *getTargetNodeName(unsigned Opcode) const override;
  63
  64   SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const override;
  65
  66   SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv,
  67                                bool isVarArg,
  68                                const SmallVectorImpl<ISD::InputArg> &Ins,
  69                                const SDLoc &DL, SelectionDAG &DAG,
  70                                SmallVectorImpl<SDValue> &InVals) const override;
  71
  72   SDValue LowerCall(CallLoweringInfo &CLI,
  73                     SmallVectorImpl<SDValue> &InVals) const override;
  74
  75   bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
  76                       bool isVarArg,
  77                       const SmallVectorImpl<ISD::OutputArg> &Outs,
  78                       LLVMContext &Context) const override;
  79
  80   SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
  81                       const SmallVectorImpl<ISD::OutputArg> &Outs,
  82                       const SmallVectorImpl<SDValue> &OutVals, const SDLoc &DL,
  83                       SelectionDAG &DAG) const override;
  84
  85   const XtensaSubtarget &getSubtarget() const { return Subtarget; }
  86
  87   MachineBasicBlock *
  88   EmitInstrWithCustomInserter(MachineInstr &MI,
  89                               MachineBasicBlock *BB) const override;
  90
  91 private:
  92   const XtensaSubtarget &Subtarget;
  93
  94   SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
  95
  96   SDValue LowerImmediate(SDValue Op, SelectionDAG &DAG) const;
  97
  98   SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
  99
 100   SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
 101
 102   SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
 103
 104   SDValue LowerConstantPool(ConstantPoolSDNode *CP, SelectionDAG &DAG) const;
 105
 106   SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
 107
 108   SDValue LowerDYNAMIC_STACKALLOC(SDValue Op, SelectionDAG &DAG) const;
 109
 110   SDValue LowerSTACKSAVE(SDValue Op, SelectionDAG &DAG) const;
 111
 112   SDValue LowerSTACKRESTORE(SDValue Op, SelectionDAG &DAG) const;
 113
 114   SDValue getAddrPCRel(SDValue Op, SelectionDAG &DAG) const;
 115
 116   CCAssignFn *CCAssignFnForCall(CallingConv::ID CC, bool IsVarArg) const;
 117
 118   MachineBasicBlock *emitSelectCC(MachineInstr &MI,
 119                                   MachineBasicBlock *BB) const;
 120 };
 121
 122 } // end namespace llvm
 123
 124 #endif /* LLVM_LIB_TARGET_XTENSA_XTENSAISELLOWERING_H */