1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -march=amdgcn -mcpu=gfx803 -run-pass simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s
4 # Register coalescer is going to eliminate %2:sgpr_32 = COPY %1.sub0 from bb.1
5 # by joining %2 and %1.sub0 into %0.sub0 register. Check that when this happen
6 # the implicit intialization of %0.sub0 in the bb.2 have undef flag
7 # for the MIR to be valid.
10 name: coalescing_makes_lane_undefined
11 tracksRegLiveness: true
13 ; CHECK-LABEL: name: coalescing_makes_lane_undefined
15 ; CHECK-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)
17 ; CHECK-NEXT: S_CBRANCH_SCC0 %bb.2, implicit undef $scc
20 ; CHECK-NEXT: successors: %bb.3(0x80000000)
22 ; CHECK-NEXT: undef %0.sub0:sgpr_64 = S_MOV_B32 1
23 ; CHECK-NEXT: %0.sub1:sgpr_64 = S_MOV_B32 2
24 ; CHECK-NEXT: S_BRANCH %bb.3
27 ; CHECK-NEXT: successors: %bb.3(0x80000000)
29 ; CHECK-NEXT: undef %0.sub0:sgpr_64 = IMPLICIT_DEF
32 ; CHECK-NEXT: S_NOP 0, implicit %0.sub0
33 ; CHECK-NEXT: S_NOP 0, implicit %0
35 successors: %bb.1, %bb.2
36 S_CBRANCH_SCC0 %bb.2, implicit undef $scc
40 undef %1.sub0:sgpr_64 = S_MOV_B32 1
41 %1.sub1:sgpr_64 = S_MOV_B32 2
42 %2:sgpr_32 = COPY %1.sub0 ; copy to be joined
47 %2:sgpr_32 = IMPLICIT_DEF
48 undef %1.sub0:sgpr_64 = IMPLICIT_DEF
49 %1.sub1:sgpr_64 = IMPLICIT_DEF
52 S_NOP 0, implicit killed %2
53 S_NOP 0, implicit killed %1