llvm/test/CodeGen/AMDGPU/regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-coalescing -run-pass=simple-register-coalescing -verify-machineinstrs -o - %s | FileCheck %s
   3
   4 # Bug 39602: Avoid "Couldn't join subrange" error when clearing valid
   5 # lanes on an implicit_def that later cannot be erased.
   6
   7 ---
   8 name: lost_valid_lanes_maybe_erasable_implicit_def
   9 tracksRegLiveness: true
  10 body:             |
  11   ; CHECK-LABEL: name: lost_valid_lanes_maybe_erasable_implicit_def
  12   ; CHECK: bb.0:
  13   ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  14   ; CHECK-NEXT: {{  $}}
  15   ; CHECK-NEXT:   undef %0.sub1:sreg_64 = IMPLICIT_DEF
  16   ; CHECK-NEXT: {{  $}}
  17   ; CHECK-NEXT: bb.1:
  18   ; CHECK-NEXT:   %0.sub0:sreg_64 = S_MOV_B32 0
  19   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY %0
  20   ; CHECK-NEXT:   dead %0.sub1:sreg_64 = COPY %0.sub0
  21   ; CHECK-NEXT:   S_ENDPGM 0, implicit [[COPY]].sub1
  22   bb.0:
  23     successors: %bb.1
  24     undef %0.sub1:sreg_64 = IMPLICIT_DEF
  25
  26   bb.1:
  27     %0.sub0:sreg_64 = S_MOV_B32 0
  28     %1:sreg_64 = COPY %0:sreg_64
  29     dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
  30     S_ENDPGM 0, implicit %1.sub1:sreg_64
  31
  32 ...
  33 ---
  34 # Same as previous, except with a real value instead of
  35 # IMPLICIT_DEF. These should both be handled the same way.
  36
  37 name:  lost_valid_lanes_real_value
  38 tracksRegLiveness: true
  39 body:             |
  40   ; CHECK-LABEL: name: lost_valid_lanes_real_value
  41   ; CHECK: bb.0:
  42   ; CHECK-NEXT:   successors: %bb.1(0x80000000)
  43   ; CHECK-NEXT: {{  $}}
  44   ; CHECK-NEXT:   undef %0.sub1:sreg_64 = S_MOV_B32 -1
  45   ; CHECK-NEXT: {{  $}}
  46   ; CHECK-NEXT: bb.1:
  47   ; CHECK-NEXT:   %0.sub0:sreg_64 = S_MOV_B32 0
  48   ; CHECK-NEXT:   [[COPY:%[0-9]+]]:sreg_64 = COPY %0
  49   ; CHECK-NEXT:   dead %0.sub1:sreg_64 = COPY %0.sub0
  50   ; CHECK-NEXT:   S_ENDPGM 0, implicit [[COPY]].sub1
  51   bb.0:
  52     successors: %bb.1
  53     undef %0.sub1:sreg_64 = S_MOV_B32 -1
  54
  55   bb.1:
  56     %0.sub0:sreg_64 = S_MOV_B32 0
  57     %1:sreg_64 = COPY %0:sreg_64
  58     dead %0.sub1:sreg_64 = COPY %0.sub0:sreg_64
  59     S_ENDPGM 0, implicit %1.sub1:sreg_64
  60
  61 ...