1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -O0 -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
4 ; The first 64 SGPR spills can go to a VGPR, but there isn't a second
5 ; so some spills must be to memory. The last 16 element spill runs out of lanes at the 15th element.
7 define amdgpu_kernel void @partial_no_vgprs_last_sgpr_spill(i32 addrspace(1)* %out, i32 %in) #1 {
8 ; GCN-LABEL: partial_no_vgprs_last_sgpr_spill:
10 ; GCN-NEXT: s_add_u32 s0, s0, s7
11 ; GCN-NEXT: s_addc_u32 s1, s1, 0
12 ; GCN-NEXT: s_load_dword s4, s[4:5], 0x2
13 ; GCN-NEXT: ;;#ASMSTART
15 ; GCN-NEXT: ;;#ASMSTART
17 ; GCN-NEXT: ;;#ASMSTART
19 ; GCN-NEXT: ;;#ASMSTART
21 ; GCN-NEXT: ;;#ASMSTART
23 ; GCN-NEXT: ;;#ASMSTART
24 ; GCN-NEXT: ; def s[8:23]
26 ; GCN-NEXT: v_writelane_b32 v23, s8, 0
27 ; GCN-NEXT: v_writelane_b32 v23, s9, 1
28 ; GCN-NEXT: v_writelane_b32 v23, s10, 2
29 ; GCN-NEXT: v_writelane_b32 v23, s11, 3
30 ; GCN-NEXT: v_writelane_b32 v23, s12, 4
31 ; GCN-NEXT: v_writelane_b32 v23, s13, 5
32 ; GCN-NEXT: v_writelane_b32 v23, s14, 6
33 ; GCN-NEXT: v_writelane_b32 v23, s15, 7
34 ; GCN-NEXT: v_writelane_b32 v23, s16, 8
35 ; GCN-NEXT: v_writelane_b32 v23, s17, 9
36 ; GCN-NEXT: v_writelane_b32 v23, s18, 10
37 ; GCN-NEXT: v_writelane_b32 v23, s19, 11
38 ; GCN-NEXT: v_writelane_b32 v23, s20, 12
39 ; GCN-NEXT: v_writelane_b32 v23, s21, 13
40 ; GCN-NEXT: v_writelane_b32 v23, s22, 14
41 ; GCN-NEXT: v_writelane_b32 v23, s23, 15
42 ; GCN-NEXT: ;;#ASMSTART
43 ; GCN-NEXT: ; def s[8:23]
45 ; GCN-NEXT: v_writelane_b32 v23, s8, 16
46 ; GCN-NEXT: v_writelane_b32 v23, s9, 17
47 ; GCN-NEXT: v_writelane_b32 v23, s10, 18
48 ; GCN-NEXT: v_writelane_b32 v23, s11, 19
49 ; GCN-NEXT: v_writelane_b32 v23, s12, 20
50 ; GCN-NEXT: v_writelane_b32 v23, s13, 21
51 ; GCN-NEXT: v_writelane_b32 v23, s14, 22
52 ; GCN-NEXT: v_writelane_b32 v23, s15, 23
53 ; GCN-NEXT: v_writelane_b32 v23, s16, 24
54 ; GCN-NEXT: v_writelane_b32 v23, s17, 25
55 ; GCN-NEXT: v_writelane_b32 v23, s18, 26
56 ; GCN-NEXT: v_writelane_b32 v23, s19, 27
57 ; GCN-NEXT: v_writelane_b32 v23, s20, 28
58 ; GCN-NEXT: v_writelane_b32 v23, s21, 29
59 ; GCN-NEXT: v_writelane_b32 v23, s22, 30
60 ; GCN-NEXT: v_writelane_b32 v23, s23, 31
61 ; GCN-NEXT: ;;#ASMSTART
62 ; GCN-NEXT: ; def s[8:23]
64 ; GCN-NEXT: v_writelane_b32 v23, s8, 32
65 ; GCN-NEXT: v_writelane_b32 v23, s9, 33
66 ; GCN-NEXT: v_writelane_b32 v23, s10, 34
67 ; GCN-NEXT: v_writelane_b32 v23, s11, 35
68 ; GCN-NEXT: v_writelane_b32 v23, s12, 36
69 ; GCN-NEXT: v_writelane_b32 v23, s13, 37
70 ; GCN-NEXT: v_writelane_b32 v23, s14, 38
71 ; GCN-NEXT: v_writelane_b32 v23, s15, 39
72 ; GCN-NEXT: v_writelane_b32 v23, s16, 40
73 ; GCN-NEXT: v_writelane_b32 v23, s17, 41
74 ; GCN-NEXT: v_writelane_b32 v23, s18, 42
75 ; GCN-NEXT: v_writelane_b32 v23, s19, 43
76 ; GCN-NEXT: v_writelane_b32 v23, s20, 44
77 ; GCN-NEXT: v_writelane_b32 v23, s21, 45
78 ; GCN-NEXT: v_writelane_b32 v23, s22, 46
79 ; GCN-NEXT: v_writelane_b32 v23, s23, 47
80 ; GCN-NEXT: ;;#ASMSTART
81 ; GCN-NEXT: ; def s[8:23]
83 ; GCN-NEXT: v_writelane_b32 v23, s8, 48
84 ; GCN-NEXT: v_writelane_b32 v23, s9, 49
85 ; GCN-NEXT: v_writelane_b32 v23, s10, 50
86 ; GCN-NEXT: v_writelane_b32 v23, s11, 51
87 ; GCN-NEXT: v_writelane_b32 v23, s12, 52
88 ; GCN-NEXT: v_writelane_b32 v23, s13, 53
89 ; GCN-NEXT: v_writelane_b32 v23, s14, 54
90 ; GCN-NEXT: v_writelane_b32 v23, s15, 55
91 ; GCN-NEXT: v_writelane_b32 v23, s16, 56
92 ; GCN-NEXT: v_writelane_b32 v23, s17, 57
93 ; GCN-NEXT: v_writelane_b32 v23, s18, 58
94 ; GCN-NEXT: v_writelane_b32 v23, s19, 59
95 ; GCN-NEXT: v_writelane_b32 v23, s20, 60
96 ; GCN-NEXT: v_writelane_b32 v23, s21, 61
97 ; GCN-NEXT: v_writelane_b32 v23, s22, 62
98 ; GCN-NEXT: v_writelane_b32 v23, s23, 63
99 ; GCN-NEXT: ;;#ASMSTART
100 ; GCN-NEXT: ; def s[6:7]
101 ; GCN-NEXT: ;;#ASMEND
102 ; GCN-NEXT: s_mov_b64 s[8:9], exec
103 ; GCN-NEXT: s_mov_b64 exec, 3
104 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
105 ; GCN-NEXT: v_writelane_b32 v0, s6, 0
106 ; GCN-NEXT: v_writelane_b32 v0, s7, 1
107 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:4 ; 4-byte Folded Spill
108 ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0
109 ; GCN-NEXT: s_waitcnt vmcnt(0)
110 ; GCN-NEXT: s_mov_b64 exec, s[8:9]
111 ; GCN-NEXT: s_mov_b32 s5, 0
112 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
113 ; GCN-NEXT: s_cmp_lg_u32 s4, s5
114 ; GCN-NEXT: s_cbranch_scc1 .LBB0_2
115 ; GCN-NEXT: ; %bb.1: ; %bb0
116 ; GCN-NEXT: v_readlane_b32 s4, v23, 0
117 ; GCN-NEXT: v_readlane_b32 s5, v23, 1
118 ; GCN-NEXT: v_readlane_b32 s6, v23, 2
119 ; GCN-NEXT: v_readlane_b32 s7, v23, 3
120 ; GCN-NEXT: v_readlane_b32 s8, v23, 4
121 ; GCN-NEXT: v_readlane_b32 s9, v23, 5
122 ; GCN-NEXT: v_readlane_b32 s10, v23, 6
123 ; GCN-NEXT: v_readlane_b32 s11, v23, 7
124 ; GCN-NEXT: v_readlane_b32 s12, v23, 8
125 ; GCN-NEXT: v_readlane_b32 s13, v23, 9
126 ; GCN-NEXT: v_readlane_b32 s14, v23, 10
127 ; GCN-NEXT: v_readlane_b32 s15, v23, 11
128 ; GCN-NEXT: v_readlane_b32 s16, v23, 12
129 ; GCN-NEXT: v_readlane_b32 s17, v23, 13
130 ; GCN-NEXT: v_readlane_b32 s18, v23, 14
131 ; GCN-NEXT: v_readlane_b32 s19, v23, 15
132 ; GCN-NEXT: ;;#ASMSTART
133 ; GCN-NEXT: ; use s[4:19]
134 ; GCN-NEXT: ;;#ASMEND
135 ; GCN-NEXT: v_readlane_b32 s4, v23, 16
136 ; GCN-NEXT: v_readlane_b32 s5, v23, 17
137 ; GCN-NEXT: v_readlane_b32 s6, v23, 18
138 ; GCN-NEXT: v_readlane_b32 s7, v23, 19
139 ; GCN-NEXT: v_readlane_b32 s8, v23, 20
140 ; GCN-NEXT: v_readlane_b32 s9, v23, 21
141 ; GCN-NEXT: v_readlane_b32 s10, v23, 22
142 ; GCN-NEXT: v_readlane_b32 s11, v23, 23
143 ; GCN-NEXT: v_readlane_b32 s12, v23, 24
144 ; GCN-NEXT: v_readlane_b32 s13, v23, 25
145 ; GCN-NEXT: v_readlane_b32 s14, v23, 26
146 ; GCN-NEXT: v_readlane_b32 s15, v23, 27
147 ; GCN-NEXT: v_readlane_b32 s16, v23, 28
148 ; GCN-NEXT: v_readlane_b32 s17, v23, 29
149 ; GCN-NEXT: v_readlane_b32 s18, v23, 30
150 ; GCN-NEXT: v_readlane_b32 s19, v23, 31
151 ; GCN-NEXT: ;;#ASMSTART
152 ; GCN-NEXT: ; use s[4:19]
153 ; GCN-NEXT: ;;#ASMEND
154 ; GCN-NEXT: v_readlane_b32 s4, v23, 32
155 ; GCN-NEXT: v_readlane_b32 s5, v23, 33
156 ; GCN-NEXT: v_readlane_b32 s6, v23, 34
157 ; GCN-NEXT: v_readlane_b32 s7, v23, 35
158 ; GCN-NEXT: v_readlane_b32 s8, v23, 36
159 ; GCN-NEXT: v_readlane_b32 s9, v23, 37
160 ; GCN-NEXT: v_readlane_b32 s10, v23, 38
161 ; GCN-NEXT: v_readlane_b32 s11, v23, 39
162 ; GCN-NEXT: v_readlane_b32 s12, v23, 40
163 ; GCN-NEXT: v_readlane_b32 s13, v23, 41
164 ; GCN-NEXT: v_readlane_b32 s14, v23, 42
165 ; GCN-NEXT: v_readlane_b32 s15, v23, 43
166 ; GCN-NEXT: v_readlane_b32 s16, v23, 44
167 ; GCN-NEXT: v_readlane_b32 s17, v23, 45
168 ; GCN-NEXT: v_readlane_b32 s18, v23, 46
169 ; GCN-NEXT: v_readlane_b32 s19, v23, 47
170 ; GCN-NEXT: ;;#ASMSTART
171 ; GCN-NEXT: ; use s[4:19]
172 ; GCN-NEXT: ;;#ASMEND
173 ; GCN-NEXT: v_readlane_b32 s8, v23, 48
174 ; GCN-NEXT: v_readlane_b32 s9, v23, 49
175 ; GCN-NEXT: v_readlane_b32 s10, v23, 50
176 ; GCN-NEXT: v_readlane_b32 s11, v23, 51
177 ; GCN-NEXT: v_readlane_b32 s12, v23, 52
178 ; GCN-NEXT: v_readlane_b32 s13, v23, 53
179 ; GCN-NEXT: v_readlane_b32 s14, v23, 54
180 ; GCN-NEXT: v_readlane_b32 s15, v23, 55
181 ; GCN-NEXT: v_readlane_b32 s16, v23, 56
182 ; GCN-NEXT: v_readlane_b32 s17, v23, 57
183 ; GCN-NEXT: v_readlane_b32 s18, v23, 58
184 ; GCN-NEXT: v_readlane_b32 s19, v23, 59
185 ; GCN-NEXT: v_readlane_b32 s20, v23, 60
186 ; GCN-NEXT: v_readlane_b32 s21, v23, 61
187 ; GCN-NEXT: v_readlane_b32 s22, v23, 62
188 ; GCN-NEXT: v_readlane_b32 s23, v23, 63
189 ; GCN-NEXT: s_mov_b64 s[6:7], exec
190 ; GCN-NEXT: s_mov_b64 exec, 3
191 ; GCN-NEXT: buffer_store_dword v0, off, s[0:3], 0
192 ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0 offset:4 ; 4-byte Folded Reload
193 ; GCN-NEXT: s_waitcnt vmcnt(0)
194 ; GCN-NEXT: v_readlane_b32 s4, v0, 0
195 ; GCN-NEXT: v_readlane_b32 s5, v0, 1
196 ; GCN-NEXT: buffer_load_dword v0, off, s[0:3], 0
197 ; GCN-NEXT: s_waitcnt vmcnt(0)
198 ; GCN-NEXT: s_mov_b64 exec, s[6:7]
199 ; GCN-NEXT: ;;#ASMSTART
200 ; GCN-NEXT: ; use s[8:23]
201 ; GCN-NEXT: ;;#ASMEND
202 ; GCN-NEXT: ;;#ASMSTART
203 ; GCN-NEXT: ; use s[4:5]
204 ; GCN-NEXT: ;;#ASMEND
205 ; GCN-NEXT: .LBB0_2: ; %ret
207 call void asm sideeffect "", "~{v[0:7]}" () #0
208 call void asm sideeffect "", "~{v[8:15]}" () #0
209 call void asm sideeffect "", "~{v[16:19]}"() #0
210 call void asm sideeffect "", "~{v[20:21]}"() #0
211 call void asm sideeffect "", "~{v22}"() #0
213 %wide.sgpr0 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
214 %wide.sgpr1 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
215 %wide.sgpr2 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
216 %wide.sgpr3 = call <16 x i32> asm sideeffect "; def $0", "=s" () #0
217 %wide.sgpr4 = call <2 x i32> asm sideeffect "; def $0", "=s" () #0
218 %cmp = icmp eq i32 %in, 0
219 br i1 %cmp, label %bb0, label %ret
222 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr0) #0
223 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr1) #0
224 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr2) #0
225 call void asm sideeffect "; use $0", "s"(<16 x i32> %wide.sgpr3) #0
226 call void asm sideeffect "; use $0", "s"(<2 x i32> %wide.sgpr4) #0
233 attributes #0 = { nounwind }
234 attributes #1 = { nounwind "amdgpu-waves-per-eu"="10,10" }