| blob | a64507ca5861c7198f66ea74a6172800eb2eca6c |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -march=amdgcn -mcpu=gfx900 --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=NOHSA-TRAP-GFX900-V2 %s
3 ; RUN: llc -march=amdgcn -mcpu=gfx900 --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=NOHSA-TRAP-GFX900-V3 %s
4 ; RUN: llc -march=amdgcn -mcpu=gfx900 --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=NOHSA-TRAP-GFX900-V4 %s
5 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX803-V2 %s
6 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX803-V3 %s
7 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx803 --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX803-V4 %s
8 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX900-V2 %s
9 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX900-V3 %s
10 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-TRAP-GFX900-V4 %s
11 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler --amdhsa-code-object-version=2 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-NOTRAP-GFX900-V2 %s
12 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler --amdhsa-code-object-version=3 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-NOTRAP-GFX900-V3 %s
13 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=-trap-handler --amdhsa-code-object-version=4 -verify-machineinstrs < %s | FileCheck --check-prefix=HSA-NOTRAP-GFX900-V4 %s
15 declare void @llvm.trap() #0
16 declare void @llvm.debugtrap() #1
18 define amdgpu_kernel void @trap(i32 addrspace(1)* nocapture readonly %arg0) {
19 ; NOHSA-TRAP-GFX900-V2-LABEL: trap:
20 ; NOHSA-TRAP-GFX900-V2: ; %bb.0:
21 ; NOHSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
22 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
23 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
24 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
25 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
26 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
27 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
28 ;
29 ; NOHSA-TRAP-GFX900-V3-LABEL: trap:
30 ; NOHSA-TRAP-GFX900-V3: ; %bb.0:
31 ; NOHSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
32 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
33 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
34 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
35 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
36 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
37 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
38 ;
39 ; NOHSA-TRAP-GFX900-V4-LABEL: trap:
40 ; NOHSA-TRAP-GFX900-V4: ; %bb.0:
41 ; NOHSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
42 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
43 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
44 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
45 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
46 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
47 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
48 ;
49 ; HSA-TRAP-GFX803-V2-LABEL: trap:
50 ; HSA-TRAP-GFX803-V2: .amd_kernel_code_t
51 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_major = 1
52 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_minor = 2
53 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_kind = 1
54 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_major = 8
55 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_minor = 0
56 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_stepping = 3
57 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_entry_byte_offset = 256
58 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_prefetch_byte_size = 0
59 ; HSA-TRAP-GFX803-V2-NEXT: granulated_workitem_vgpr_count = 0
60 ; HSA-TRAP-GFX803-V2-NEXT: granulated_wavefront_sgpr_count = 0
61 ; HSA-TRAP-GFX803-V2-NEXT: priority = 0
62 ; HSA-TRAP-GFX803-V2-NEXT: float_mode = 240
63 ; HSA-TRAP-GFX803-V2-NEXT: priv = 0
64 ; HSA-TRAP-GFX803-V2-NEXT: enable_dx10_clamp = 1
65 ; HSA-TRAP-GFX803-V2-NEXT: debug_mode = 0
66 ; HSA-TRAP-GFX803-V2-NEXT: enable_ieee_mode = 1
67 ; HSA-TRAP-GFX803-V2-NEXT: enable_wgp_mode = 0
68 ; HSA-TRAP-GFX803-V2-NEXT: enable_mem_ordered = 0
69 ; HSA-TRAP-GFX803-V2-NEXT: enable_fwd_progress = 0
70 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
71 ; HSA-TRAP-GFX803-V2-NEXT: user_sgpr_count = 8
72 ; HSA-TRAP-GFX803-V2-NEXT: enable_trap_handler = 0
73 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_x = 1
74 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_y = 0
75 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_z = 0
76 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_info = 0
77 ; HSA-TRAP-GFX803-V2-NEXT: enable_vgpr_workitem_id = 0
78 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception_msb = 0
79 ; HSA-TRAP-GFX803-V2-NEXT: granulated_lds_size = 0
80 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception = 0
81 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_buffer = 1
82 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_ptr = 0
83 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_queue_ptr = 1
84 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
85 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_id = 0
86 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_flat_scratch_init = 0
87 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_size = 0
88 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
89 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
90 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
91 ; HSA-TRAP-GFX803-V2-NEXT: enable_wavefront_size32 = 0
92 ; HSA-TRAP-GFX803-V2-NEXT: enable_ordered_append_gds = 0
93 ; HSA-TRAP-GFX803-V2-NEXT: private_element_size = 1
94 ; HSA-TRAP-GFX803-V2-NEXT: is_ptr64 = 1
95 ; HSA-TRAP-GFX803-V2-NEXT: is_dynamic_callstack = 0
96 ; HSA-TRAP-GFX803-V2-NEXT: is_debug_enabled = 0
97 ; HSA-TRAP-GFX803-V2-NEXT: is_xnack_enabled = 0
98 ; HSA-TRAP-GFX803-V2-NEXT: workitem_private_segment_byte_size = 0
99 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_group_segment_byte_size = 0
100 ; HSA-TRAP-GFX803-V2-NEXT: gds_segment_byte_size = 0
101 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_byte_size = 8
102 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_fbarrier_count = 0
103 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_sgpr_count = 8
104 ; HSA-TRAP-GFX803-V2-NEXT: workitem_vgpr_count = 3
105 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_first = 0
106 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_count = 0
107 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_first = 0
108 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_count = 0
109 ; HSA-TRAP-GFX803-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
110 ; HSA-TRAP-GFX803-V2-NEXT: debug_private_segment_buffer_sgpr = 0
111 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_alignment = 4
112 ; HSA-TRAP-GFX803-V2-NEXT: group_segment_alignment = 4
113 ; HSA-TRAP-GFX803-V2-NEXT: private_segment_alignment = 4
114 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_size = 6
115 ; HSA-TRAP-GFX803-V2-NEXT: call_convention = -1
116 ; HSA-TRAP-GFX803-V2-NEXT: runtime_loader_kernel_symbol = 0
117 ; HSA-TRAP-GFX803-V2-NEXT: .end_amd_kernel_code_t
118 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.0:
119 ; HSA-TRAP-GFX803-V2-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
120 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 1
121 ; HSA-TRAP-GFX803-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
122 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt lgkmcnt(0)
123 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s2
124 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s3
125 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
126 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
127 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 2
128 ;
129 ; HSA-TRAP-GFX803-V3-LABEL: trap:
130 ; HSA-TRAP-GFX803-V3: ; %bb.0:
131 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
132 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 1
133 ; HSA-TRAP-GFX803-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
134 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
135 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s2
136 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s3
137 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
138 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
139 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 2
140 ;
141 ; HSA-TRAP-GFX803-V4-LABEL: trap:
142 ; HSA-TRAP-GFX803-V4: ; %bb.0:
143 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
144 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 1
145 ; HSA-TRAP-GFX803-V4-NEXT: s_mov_b64 s[0:1], s[4:5]
146 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
147 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s2
148 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s3
149 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
150 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
151 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 2
152 ;
153 ; HSA-TRAP-GFX900-V2-LABEL: trap:
154 ; HSA-TRAP-GFX900-V2: .amd_kernel_code_t
155 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_major = 1
156 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
157 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_kind = 1
158 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
159 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
160 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
161 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
162 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
163 ; HSA-TRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
164 ; HSA-TRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
165 ; HSA-TRAP-GFX900-V2-NEXT: priority = 0
166 ; HSA-TRAP-GFX900-V2-NEXT: float_mode = 240
167 ; HSA-TRAP-GFX900-V2-NEXT: priv = 0
168 ; HSA-TRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
169 ; HSA-TRAP-GFX900-V2-NEXT: debug_mode = 0
170 ; HSA-TRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
171 ; HSA-TRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
172 ; HSA-TRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
173 ; HSA-TRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
174 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
175 ; HSA-TRAP-GFX900-V2-NEXT: user_sgpr_count = 8
176 ; HSA-TRAP-GFX900-V2-NEXT: enable_trap_handler = 0
177 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
178 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
179 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
180 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
181 ; HSA-TRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
182 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception_msb = 0
183 ; HSA-TRAP-GFX900-V2-NEXT: granulated_lds_size = 0
184 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception = 0
185 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
186 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
187 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
188 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
189 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
190 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
191 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
192 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
193 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
194 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
195 ; HSA-TRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
196 ; HSA-TRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
197 ; HSA-TRAP-GFX900-V2-NEXT: private_element_size = 1
198 ; HSA-TRAP-GFX900-V2-NEXT: is_ptr64 = 1
199 ; HSA-TRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
200 ; HSA-TRAP-GFX900-V2-NEXT: is_debug_enabled = 0
201 ; HSA-TRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
202 ; HSA-TRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
203 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
204 ; HSA-TRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
205 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
206 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
207 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 8
208 ; HSA-TRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
209 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
210 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
211 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
212 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
213 ; HSA-TRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
214 ; HSA-TRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
215 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
216 ; HSA-TRAP-GFX900-V2-NEXT: group_segment_alignment = 4
217 ; HSA-TRAP-GFX900-V2-NEXT: private_segment_alignment = 4
218 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_size = 6
219 ; HSA-TRAP-GFX900-V2-NEXT: call_convention = -1
220 ; HSA-TRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
221 ; HSA-TRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
222 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.0:
223 ; HSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
224 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
225 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
226 ; HSA-TRAP-GFX900-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
227 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
228 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[2:3]
229 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
230 ; HSA-TRAP-GFX900-V2-NEXT: s_trap 2
231 ;
232 ; HSA-TRAP-GFX900-V3-LABEL: trap:
233 ; HSA-TRAP-GFX900-V3: ; %bb.0:
234 ; HSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[2:3], s[6:7], 0x0
235 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
236 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
237 ; HSA-TRAP-GFX900-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
238 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
239 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[2:3]
240 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
241 ; HSA-TRAP-GFX900-V3-NEXT: s_trap 2
242 ;
243 ; HSA-TRAP-GFX900-V4-LABEL: trap:
244 ; HSA-TRAP-GFX900-V4: ; %bb.0:
245 ; HSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
246 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
247 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
248 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
249 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
250 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
251 ; HSA-TRAP-GFX900-V4-NEXT: s_trap 2
252 ;
253 ; HSA-NOTRAP-GFX900-V2-LABEL: trap:
254 ; HSA-NOTRAP-GFX900-V2: .amd_kernel_code_t
255 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_major = 1
256 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
257 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_kind = 1
258 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
259 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
260 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
261 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
262 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
263 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
264 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
265 ; HSA-NOTRAP-GFX900-V2-NEXT: priority = 0
266 ; HSA-NOTRAP-GFX900-V2-NEXT: float_mode = 240
267 ; HSA-NOTRAP-GFX900-V2-NEXT: priv = 0
268 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
269 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_mode = 0
270 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
271 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
272 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
273 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
274 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
275 ; HSA-NOTRAP-GFX900-V2-NEXT: user_sgpr_count = 8
276 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_trap_handler = 0
277 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
278 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
279 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
280 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
281 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
282 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception_msb = 0
283 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_lds_size = 0
284 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception = 0
285 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
286 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
287 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
288 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
289 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
290 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
291 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
292 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
293 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
294 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
295 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
296 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
297 ; HSA-NOTRAP-GFX900-V2-NEXT: private_element_size = 1
298 ; HSA-NOTRAP-GFX900-V2-NEXT: is_ptr64 = 1
299 ; HSA-NOTRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
300 ; HSA-NOTRAP-GFX900-V2-NEXT: is_debug_enabled = 0
301 ; HSA-NOTRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
302 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
303 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
304 ; HSA-NOTRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
305 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
306 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
307 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 8
308 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
309 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
310 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
311 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
312 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
313 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
314 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
315 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
316 ; HSA-NOTRAP-GFX900-V2-NEXT: group_segment_alignment = 4
317 ; HSA-NOTRAP-GFX900-V2-NEXT: private_segment_alignment = 4
318 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_size = 6
319 ; HSA-NOTRAP-GFX900-V2-NEXT: call_convention = -1
320 ; HSA-NOTRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
321 ; HSA-NOTRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
322 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.0:
323 ; HSA-NOTRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
324 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
325 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
326 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
327 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
328 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
329 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
330 ;
331 ; HSA-NOTRAP-GFX900-V3-LABEL: trap:
332 ; HSA-NOTRAP-GFX900-V3: ; %bb.0:
333 ; HSA-NOTRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
334 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
335 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
336 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
337 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
338 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
339 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
340 ;
341 ; HSA-NOTRAP-GFX900-V4-LABEL: trap:
342 ; HSA-NOTRAP-GFX900-V4: ; %bb.0:
343 ; HSA-NOTRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
344 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
345 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
346 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
347 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
348 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
349 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
350 store volatile i32 1, i32 addrspace(1)* %arg0
351 call void @llvm.trap()
352 unreachable
353 store volatile i32 2, i32 addrspace(1)* %arg0
354 ret void
355 }
357 define amdgpu_kernel void @non_entry_trap(i32 addrspace(1)* nocapture readonly %arg0) local_unnamed_addr {
358 ; NOHSA-TRAP-GFX900-V2-LABEL: non_entry_trap:
359 ; NOHSA-TRAP-GFX900-V2: ; %bb.0: ; %entry
360 ; NOHSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
361 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
362 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
363 ; NOHSA-TRAP-GFX900-V2-NEXT: global_load_dword v1, v0, s[0:1] glc
364 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
365 ; NOHSA-TRAP-GFX900-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
366 ; NOHSA-TRAP-GFX900-V2-NEXT: s_cbranch_vccz .LBB1_2
367 ; NOHSA-TRAP-GFX900-V2-NEXT: ; %bb.1: ; %ret
368 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 3
369 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
370 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
371 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
372 ; NOHSA-TRAP-GFX900-V2-NEXT: .LBB1_2: ; %trap
373 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
374 ;
375 ; NOHSA-TRAP-GFX900-V3-LABEL: non_entry_trap:
376 ; NOHSA-TRAP-GFX900-V3: ; %bb.0: ; %entry
377 ; NOHSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x24
378 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
379 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
380 ; NOHSA-TRAP-GFX900-V3-NEXT: global_load_dword v1, v0, s[0:1] glc
381 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
382 ; NOHSA-TRAP-GFX900-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
383 ; NOHSA-TRAP-GFX900-V3-NEXT: s_cbranch_vccz .LBB1_2
384 ; NOHSA-TRAP-GFX900-V3-NEXT: ; %bb.1: ; %ret
385 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 3
386 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
387 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
388 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
389 ; NOHSA-TRAP-GFX900-V3-NEXT: .LBB1_2: ; %trap
390 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
391 ;
392 ; NOHSA-TRAP-GFX900-V4-LABEL: non_entry_trap:
393 ; NOHSA-TRAP-GFX900-V4: ; %bb.0: ; %entry
394 ; NOHSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
395 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
396 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
397 ; NOHSA-TRAP-GFX900-V4-NEXT: global_load_dword v1, v0, s[0:1] glc
398 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
399 ; NOHSA-TRAP-GFX900-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
400 ; NOHSA-TRAP-GFX900-V4-NEXT: s_cbranch_vccz .LBB1_2
401 ; NOHSA-TRAP-GFX900-V4-NEXT: ; %bb.1: ; %ret
402 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 3
403 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
404 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
405 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
406 ; NOHSA-TRAP-GFX900-V4-NEXT: .LBB1_2: ; %trap
407 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
408 ;
409 ; HSA-TRAP-GFX803-V2-LABEL: non_entry_trap:
410 ; HSA-TRAP-GFX803-V2: .amd_kernel_code_t
411 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_major = 1
412 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_minor = 2
413 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_kind = 1
414 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_major = 8
415 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_minor = 0
416 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_stepping = 3
417 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_entry_byte_offset = 256
418 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_prefetch_byte_size = 0
419 ; HSA-TRAP-GFX803-V2-NEXT: granulated_workitem_vgpr_count = 0
420 ; HSA-TRAP-GFX803-V2-NEXT: granulated_wavefront_sgpr_count = 1
421 ; HSA-TRAP-GFX803-V2-NEXT: priority = 0
422 ; HSA-TRAP-GFX803-V2-NEXT: float_mode = 240
423 ; HSA-TRAP-GFX803-V2-NEXT: priv = 0
424 ; HSA-TRAP-GFX803-V2-NEXT: enable_dx10_clamp = 1
425 ; HSA-TRAP-GFX803-V2-NEXT: debug_mode = 0
426 ; HSA-TRAP-GFX803-V2-NEXT: enable_ieee_mode = 1
427 ; HSA-TRAP-GFX803-V2-NEXT: enable_wgp_mode = 0
428 ; HSA-TRAP-GFX803-V2-NEXT: enable_mem_ordered = 0
429 ; HSA-TRAP-GFX803-V2-NEXT: enable_fwd_progress = 0
430 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
431 ; HSA-TRAP-GFX803-V2-NEXT: user_sgpr_count = 8
432 ; HSA-TRAP-GFX803-V2-NEXT: enable_trap_handler = 0
433 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_x = 1
434 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_y = 0
435 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_z = 0
436 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_info = 0
437 ; HSA-TRAP-GFX803-V2-NEXT: enable_vgpr_workitem_id = 0
438 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception_msb = 0
439 ; HSA-TRAP-GFX803-V2-NEXT: granulated_lds_size = 0
440 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception = 0
441 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_buffer = 1
442 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_ptr = 0
443 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_queue_ptr = 1
444 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
445 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_id = 0
446 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_flat_scratch_init = 0
447 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_size = 0
448 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
449 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
450 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
451 ; HSA-TRAP-GFX803-V2-NEXT: enable_wavefront_size32 = 0
452 ; HSA-TRAP-GFX803-V2-NEXT: enable_ordered_append_gds = 0
453 ; HSA-TRAP-GFX803-V2-NEXT: private_element_size = 1
454 ; HSA-TRAP-GFX803-V2-NEXT: is_ptr64 = 1
455 ; HSA-TRAP-GFX803-V2-NEXT: is_dynamic_callstack = 0
456 ; HSA-TRAP-GFX803-V2-NEXT: is_debug_enabled = 0
457 ; HSA-TRAP-GFX803-V2-NEXT: is_xnack_enabled = 0
458 ; HSA-TRAP-GFX803-V2-NEXT: workitem_private_segment_byte_size = 0
459 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_group_segment_byte_size = 0
460 ; HSA-TRAP-GFX803-V2-NEXT: gds_segment_byte_size = 0
461 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_byte_size = 8
462 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_fbarrier_count = 0
463 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_sgpr_count = 10
464 ; HSA-TRAP-GFX803-V2-NEXT: workitem_vgpr_count = 3
465 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_first = 0
466 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_count = 0
467 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_first = 0
468 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_count = 0
469 ; HSA-TRAP-GFX803-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
470 ; HSA-TRAP-GFX803-V2-NEXT: debug_private_segment_buffer_sgpr = 0
471 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_alignment = 4
472 ; HSA-TRAP-GFX803-V2-NEXT: group_segment_alignment = 4
473 ; HSA-TRAP-GFX803-V2-NEXT: private_segment_alignment = 4
474 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_size = 6
475 ; HSA-TRAP-GFX803-V2-NEXT: call_convention = -1
476 ; HSA-TRAP-GFX803-V2-NEXT: runtime_loader_kernel_symbol = 0
477 ; HSA-TRAP-GFX803-V2-NEXT: .end_amd_kernel_code_t
478 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.0: ; %entry
479 ; HSA-TRAP-GFX803-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
480 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt lgkmcnt(0)
481 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
482 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
483 ; HSA-TRAP-GFX803-V2-NEXT: flat_load_dword v0, v[0:1] glc
484 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
485 ; HSA-TRAP-GFX803-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
486 ; HSA-TRAP-GFX803-V2-NEXT: s_cbranch_vccz .LBB1_2
487 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.1: ; %ret
488 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
489 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 3
490 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
491 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
492 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
493 ; HSA-TRAP-GFX803-V2-NEXT: s_endpgm
494 ; HSA-TRAP-GFX803-V2-NEXT: .LBB1_2: ; %trap
495 ; HSA-TRAP-GFX803-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
496 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 2
497 ;
498 ; HSA-TRAP-GFX803-V3-LABEL: non_entry_trap:
499 ; HSA-TRAP-GFX803-V3: ; %bb.0: ; %entry
500 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
501 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
502 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
503 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
504 ; HSA-TRAP-GFX803-V3-NEXT: flat_load_dword v0, v[0:1] glc
505 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
506 ; HSA-TRAP-GFX803-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
507 ; HSA-TRAP-GFX803-V3-NEXT: s_cbranch_vccz .LBB1_2
508 ; HSA-TRAP-GFX803-V3-NEXT: ; %bb.1: ; %ret
509 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
510 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 3
511 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
512 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
513 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
514 ; HSA-TRAP-GFX803-V3-NEXT: s_endpgm
515 ; HSA-TRAP-GFX803-V3-NEXT: .LBB1_2: ; %trap
516 ; HSA-TRAP-GFX803-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
517 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 2
518 ;
519 ; HSA-TRAP-GFX803-V4-LABEL: non_entry_trap:
520 ; HSA-TRAP-GFX803-V4: ; %bb.0: ; %entry
521 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
522 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
523 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
524 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
525 ; HSA-TRAP-GFX803-V4-NEXT: flat_load_dword v0, v[0:1] glc
526 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
527 ; HSA-TRAP-GFX803-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
528 ; HSA-TRAP-GFX803-V4-NEXT: s_cbranch_vccz .LBB1_2
529 ; HSA-TRAP-GFX803-V4-NEXT: ; %bb.1: ; %ret
530 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
531 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 3
532 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
533 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
534 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
535 ; HSA-TRAP-GFX803-V4-NEXT: s_endpgm
536 ; HSA-TRAP-GFX803-V4-NEXT: .LBB1_2: ; %trap
537 ; HSA-TRAP-GFX803-V4-NEXT: s_mov_b64 s[0:1], s[4:5]
538 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 2
539 ;
540 ; HSA-TRAP-GFX900-V2-LABEL: non_entry_trap:
541 ; HSA-TRAP-GFX900-V2: .amd_kernel_code_t
542 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_major = 1
543 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
544 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_kind = 1
545 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
546 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
547 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
548 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
549 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
550 ; HSA-TRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
551 ; HSA-TRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 1
552 ; HSA-TRAP-GFX900-V2-NEXT: priority = 0
553 ; HSA-TRAP-GFX900-V2-NEXT: float_mode = 240
554 ; HSA-TRAP-GFX900-V2-NEXT: priv = 0
555 ; HSA-TRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
556 ; HSA-TRAP-GFX900-V2-NEXT: debug_mode = 0
557 ; HSA-TRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
558 ; HSA-TRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
559 ; HSA-TRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
560 ; HSA-TRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
561 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
562 ; HSA-TRAP-GFX900-V2-NEXT: user_sgpr_count = 8
563 ; HSA-TRAP-GFX900-V2-NEXT: enable_trap_handler = 0
564 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
565 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
566 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
567 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
568 ; HSA-TRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
569 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception_msb = 0
570 ; HSA-TRAP-GFX900-V2-NEXT: granulated_lds_size = 0
571 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception = 0
572 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
573 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
574 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
575 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
576 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
577 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
578 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
579 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
580 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
581 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
582 ; HSA-TRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
583 ; HSA-TRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
584 ; HSA-TRAP-GFX900-V2-NEXT: private_element_size = 1
585 ; HSA-TRAP-GFX900-V2-NEXT: is_ptr64 = 1
586 ; HSA-TRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
587 ; HSA-TRAP-GFX900-V2-NEXT: is_debug_enabled = 0
588 ; HSA-TRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
589 ; HSA-TRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
590 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
591 ; HSA-TRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
592 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
593 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
594 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 10
595 ; HSA-TRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
596 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
597 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
598 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
599 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
600 ; HSA-TRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
601 ; HSA-TRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
602 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
603 ; HSA-TRAP-GFX900-V2-NEXT: group_segment_alignment = 4
604 ; HSA-TRAP-GFX900-V2-NEXT: private_segment_alignment = 4
605 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_size = 6
606 ; HSA-TRAP-GFX900-V2-NEXT: call_convention = -1
607 ; HSA-TRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
608 ; HSA-TRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
609 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.0: ; %entry
610 ; HSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
611 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
612 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
613 ; HSA-TRAP-GFX900-V2-NEXT: global_load_dword v1, v0, s[0:1] glc
614 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
615 ; HSA-TRAP-GFX900-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
616 ; HSA-TRAP-GFX900-V2-NEXT: s_cbranch_vccz .LBB1_2
617 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.1: ; %ret
618 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 3
619 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
620 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
621 ; HSA-TRAP-GFX900-V2-NEXT: s_endpgm
622 ; HSA-TRAP-GFX900-V2-NEXT: .LBB1_2: ; %trap
623 ; HSA-TRAP-GFX900-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
624 ; HSA-TRAP-GFX900-V2-NEXT: s_trap 2
625 ;
626 ; HSA-TRAP-GFX900-V3-LABEL: non_entry_trap:
627 ; HSA-TRAP-GFX900-V3: ; %bb.0: ; %entry
628 ; HSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
629 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
630 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
631 ; HSA-TRAP-GFX900-V3-NEXT: global_load_dword v1, v0, s[0:1] glc
632 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
633 ; HSA-TRAP-GFX900-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
634 ; HSA-TRAP-GFX900-V3-NEXT: s_cbranch_vccz .LBB1_2
635 ; HSA-TRAP-GFX900-V3-NEXT: ; %bb.1: ; %ret
636 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 3
637 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
638 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
639 ; HSA-TRAP-GFX900-V3-NEXT: s_endpgm
640 ; HSA-TRAP-GFX900-V3-NEXT: .LBB1_2: ; %trap
641 ; HSA-TRAP-GFX900-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
642 ; HSA-TRAP-GFX900-V3-NEXT: s_trap 2
643 ;
644 ; HSA-TRAP-GFX900-V4-LABEL: non_entry_trap:
645 ; HSA-TRAP-GFX900-V4: ; %bb.0: ; %entry
646 ; HSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
647 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
648 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
649 ; HSA-TRAP-GFX900-V4-NEXT: global_load_dword v1, v0, s[0:1] glc
650 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
651 ; HSA-TRAP-GFX900-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
652 ; HSA-TRAP-GFX900-V4-NEXT: s_cbranch_vccz .LBB1_2
653 ; HSA-TRAP-GFX900-V4-NEXT: ; %bb.1: ; %ret
654 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 3
655 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
656 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
657 ; HSA-TRAP-GFX900-V4-NEXT: s_endpgm
658 ; HSA-TRAP-GFX900-V4-NEXT: .LBB1_2: ; %trap
659 ; HSA-TRAP-GFX900-V4-NEXT: s_trap 2
660 ;
661 ; HSA-NOTRAP-GFX900-V2-LABEL: non_entry_trap:
662 ; HSA-NOTRAP-GFX900-V2: .amd_kernel_code_t
663 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_major = 1
664 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
665 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_kind = 1
666 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
667 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
668 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
669 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
670 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
671 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
672 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 1
673 ; HSA-NOTRAP-GFX900-V2-NEXT: priority = 0
674 ; HSA-NOTRAP-GFX900-V2-NEXT: float_mode = 240
675 ; HSA-NOTRAP-GFX900-V2-NEXT: priv = 0
676 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
677 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_mode = 0
678 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
679 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
680 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
681 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
682 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
683 ; HSA-NOTRAP-GFX900-V2-NEXT: user_sgpr_count = 8
684 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_trap_handler = 0
685 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
686 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
687 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
688 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
689 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
690 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception_msb = 0
691 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_lds_size = 0
692 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception = 0
693 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
694 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
695 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 1
696 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
697 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
698 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
699 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
700 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
701 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
702 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
703 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
704 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
705 ; HSA-NOTRAP-GFX900-V2-NEXT: private_element_size = 1
706 ; HSA-NOTRAP-GFX900-V2-NEXT: is_ptr64 = 1
707 ; HSA-NOTRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
708 ; HSA-NOTRAP-GFX900-V2-NEXT: is_debug_enabled = 0
709 ; HSA-NOTRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
710 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
711 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
712 ; HSA-NOTRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
713 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
714 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
715 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 10
716 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_vgpr_count = 2
717 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
718 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
719 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
720 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
721 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
722 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
723 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
724 ; HSA-NOTRAP-GFX900-V2-NEXT: group_segment_alignment = 4
725 ; HSA-NOTRAP-GFX900-V2-NEXT: private_segment_alignment = 4
726 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_size = 6
727 ; HSA-NOTRAP-GFX900-V2-NEXT: call_convention = -1
728 ; HSA-NOTRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
729 ; HSA-NOTRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
730 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.0: ; %entry
731 ; HSA-NOTRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
732 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
733 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
734 ; HSA-NOTRAP-GFX900-V2-NEXT: global_load_dword v1, v0, s[0:1] glc
735 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
736 ; HSA-NOTRAP-GFX900-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
737 ; HSA-NOTRAP-GFX900-V2-NEXT: s_cbranch_vccz .LBB1_2
738 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.1: ; %ret
739 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 3
740 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
741 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
742 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
743 ; HSA-NOTRAP-GFX900-V2-NEXT: .LBB1_2: ; %trap
744 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
745 ;
746 ; HSA-NOTRAP-GFX900-V3-LABEL: non_entry_trap:
747 ; HSA-NOTRAP-GFX900-V3: ; %bb.0: ; %entry
748 ; HSA-NOTRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
749 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
750 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
751 ; HSA-NOTRAP-GFX900-V3-NEXT: global_load_dword v1, v0, s[0:1] glc
752 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
753 ; HSA-NOTRAP-GFX900-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
754 ; HSA-NOTRAP-GFX900-V3-NEXT: s_cbranch_vccz .LBB1_2
755 ; HSA-NOTRAP-GFX900-V3-NEXT: ; %bb.1: ; %ret
756 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 3
757 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
758 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
759 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
760 ; HSA-NOTRAP-GFX900-V3-NEXT: .LBB1_2: ; %trap
761 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
762 ;
763 ; HSA-NOTRAP-GFX900-V4-LABEL: non_entry_trap:
764 ; HSA-NOTRAP-GFX900-V4: ; %bb.0: ; %entry
765 ; HSA-NOTRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
766 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
767 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
768 ; HSA-NOTRAP-GFX900-V4-NEXT: global_load_dword v1, v0, s[0:1] glc
769 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
770 ; HSA-NOTRAP-GFX900-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v1
771 ; HSA-NOTRAP-GFX900-V4-NEXT: s_cbranch_vccz .LBB1_2
772 ; HSA-NOTRAP-GFX900-V4-NEXT: ; %bb.1: ; %ret
773 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 3
774 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
775 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
776 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
777 ; HSA-NOTRAP-GFX900-V4-NEXT: .LBB1_2: ; %trap
778 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
779 entry:
780 %tmp29 = load volatile i32, i32 addrspace(1)* %arg0
781 %cmp = icmp eq i32 %tmp29, -1
782 br i1 %cmp, label %ret, label %trap
784 trap:
785 call void @llvm.trap()
786 unreachable
788 ret:
789 store volatile i32 3, i32 addrspace(1)* %arg0
790 ret void
791 }
793 define amdgpu_kernel void @debugtrap(i32 addrspace(1)* nocapture readonly %arg0) {
794 ; NOHSA-TRAP-GFX900-V2-LABEL: debugtrap:
795 ; NOHSA-TRAP-GFX900-V2: ; %bb.0:
796 ; NOHSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
797 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
798 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
799 ; NOHSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v2, 2
800 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
801 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
802 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
803 ; NOHSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v2, s[0:1]
804 ; NOHSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
805 ; NOHSA-TRAP-GFX900-V2-NEXT: s_endpgm
806 ;
807 ; NOHSA-TRAP-GFX900-V3-LABEL: debugtrap:
808 ; NOHSA-TRAP-GFX900-V3: ; %bb.0:
809 ; NOHSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
810 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
811 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
812 ; NOHSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v2, 2
813 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
814 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
815 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
816 ; NOHSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v2, s[0:1]
817 ; NOHSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
818 ; NOHSA-TRAP-GFX900-V3-NEXT: s_endpgm
819 ;
820 ; NOHSA-TRAP-GFX900-V4-LABEL: debugtrap:
821 ; NOHSA-TRAP-GFX900-V4: ; %bb.0:
822 ; NOHSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
823 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
824 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
825 ; NOHSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v2, 2
826 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
827 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
828 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
829 ; NOHSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v2, s[0:1]
830 ; NOHSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
831 ; NOHSA-TRAP-GFX900-V4-NEXT: s_endpgm
832 ;
833 ; HSA-TRAP-GFX803-V2-LABEL: debugtrap:
834 ; HSA-TRAP-GFX803-V2: .amd_kernel_code_t
835 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_major = 1
836 ; HSA-TRAP-GFX803-V2-NEXT: amd_code_version_minor = 2
837 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_kind = 1
838 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_major = 8
839 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_minor = 0
840 ; HSA-TRAP-GFX803-V2-NEXT: amd_machine_version_stepping = 3
841 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_entry_byte_offset = 256
842 ; HSA-TRAP-GFX803-V2-NEXT: kernel_code_prefetch_byte_size = 0
843 ; HSA-TRAP-GFX803-V2-NEXT: granulated_workitem_vgpr_count = 0
844 ; HSA-TRAP-GFX803-V2-NEXT: granulated_wavefront_sgpr_count = 0
845 ; HSA-TRAP-GFX803-V2-NEXT: priority = 0
846 ; HSA-TRAP-GFX803-V2-NEXT: float_mode = 240
847 ; HSA-TRAP-GFX803-V2-NEXT: priv = 0
848 ; HSA-TRAP-GFX803-V2-NEXT: enable_dx10_clamp = 1
849 ; HSA-TRAP-GFX803-V2-NEXT: debug_mode = 0
850 ; HSA-TRAP-GFX803-V2-NEXT: enable_ieee_mode = 1
851 ; HSA-TRAP-GFX803-V2-NEXT: enable_wgp_mode = 0
852 ; HSA-TRAP-GFX803-V2-NEXT: enable_mem_ordered = 0
853 ; HSA-TRAP-GFX803-V2-NEXT: enable_fwd_progress = 0
854 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
855 ; HSA-TRAP-GFX803-V2-NEXT: user_sgpr_count = 6
856 ; HSA-TRAP-GFX803-V2-NEXT: enable_trap_handler = 0
857 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_x = 1
858 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_y = 0
859 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_id_z = 0
860 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_workgroup_info = 0
861 ; HSA-TRAP-GFX803-V2-NEXT: enable_vgpr_workitem_id = 0
862 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception_msb = 0
863 ; HSA-TRAP-GFX803-V2-NEXT: granulated_lds_size = 0
864 ; HSA-TRAP-GFX803-V2-NEXT: enable_exception = 0
865 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_buffer = 1
866 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_ptr = 0
867 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_queue_ptr = 0
868 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
869 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_dispatch_id = 0
870 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_flat_scratch_init = 0
871 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_private_segment_size = 0
872 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
873 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
874 ; HSA-TRAP-GFX803-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
875 ; HSA-TRAP-GFX803-V2-NEXT: enable_wavefront_size32 = 0
876 ; HSA-TRAP-GFX803-V2-NEXT: enable_ordered_append_gds = 0
877 ; HSA-TRAP-GFX803-V2-NEXT: private_element_size = 1
878 ; HSA-TRAP-GFX803-V2-NEXT: is_ptr64 = 1
879 ; HSA-TRAP-GFX803-V2-NEXT: is_dynamic_callstack = 0
880 ; HSA-TRAP-GFX803-V2-NEXT: is_debug_enabled = 0
881 ; HSA-TRAP-GFX803-V2-NEXT: is_xnack_enabled = 0
882 ; HSA-TRAP-GFX803-V2-NEXT: workitem_private_segment_byte_size = 0
883 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_group_segment_byte_size = 0
884 ; HSA-TRAP-GFX803-V2-NEXT: gds_segment_byte_size = 0
885 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_byte_size = 8
886 ; HSA-TRAP-GFX803-V2-NEXT: workgroup_fbarrier_count = 0
887 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_sgpr_count = 6
888 ; HSA-TRAP-GFX803-V2-NEXT: workitem_vgpr_count = 4
889 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_first = 0
890 ; HSA-TRAP-GFX803-V2-NEXT: reserved_vgpr_count = 0
891 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_first = 0
892 ; HSA-TRAP-GFX803-V2-NEXT: reserved_sgpr_count = 0
893 ; HSA-TRAP-GFX803-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
894 ; HSA-TRAP-GFX803-V2-NEXT: debug_private_segment_buffer_sgpr = 0
895 ; HSA-TRAP-GFX803-V2-NEXT: kernarg_segment_alignment = 4
896 ; HSA-TRAP-GFX803-V2-NEXT: group_segment_alignment = 4
897 ; HSA-TRAP-GFX803-V2-NEXT: private_segment_alignment = 4
898 ; HSA-TRAP-GFX803-V2-NEXT: wavefront_size = 6
899 ; HSA-TRAP-GFX803-V2-NEXT: call_convention = -1
900 ; HSA-TRAP-GFX803-V2-NEXT: runtime_loader_kernel_symbol = 0
901 ; HSA-TRAP-GFX803-V2-NEXT: .end_amd_kernel_code_t
902 ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.0:
903 ; HSA-TRAP-GFX803-V2-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
904 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 1
905 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v3, 2
906 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt lgkmcnt(0)
907 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
908 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
909 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
910 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
911 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 3
912 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v3
913 ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
914 ; HSA-TRAP-GFX803-V2-NEXT: s_endpgm
915 ;
916 ; HSA-TRAP-GFX803-V3-LABEL: debugtrap:
917 ; HSA-TRAP-GFX803-V3: ; %bb.0:
918 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
919 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 1
920 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v3, 2
921 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
922 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
923 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
924 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
925 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
926 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 3
927 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v3
928 ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
929 ; HSA-TRAP-GFX803-V3-NEXT: s_endpgm
930 ;
931 ; HSA-TRAP-GFX803-V4-LABEL: debugtrap:
932 ; HSA-TRAP-GFX803-V4: ; %bb.0:
933 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
934 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 1
935 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v3, 2
936 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
937 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
938 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
939 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
940 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
941 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 3
942 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v3
943 ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
944 ; HSA-TRAP-GFX803-V4-NEXT: s_endpgm
945 ;
946 ; HSA-TRAP-GFX900-V2-LABEL: debugtrap:
947 ; HSA-TRAP-GFX900-V2: .amd_kernel_code_t
948 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_major = 1
949 ; HSA-TRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
950 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_kind = 1
951 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
952 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
953 ; HSA-TRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
954 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
955 ; HSA-TRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
956 ; HSA-TRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
957 ; HSA-TRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
958 ; HSA-TRAP-GFX900-V2-NEXT: priority = 0
959 ; HSA-TRAP-GFX900-V2-NEXT: float_mode = 240
960 ; HSA-TRAP-GFX900-V2-NEXT: priv = 0
961 ; HSA-TRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
962 ; HSA-TRAP-GFX900-V2-NEXT: debug_mode = 0
963 ; HSA-TRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
964 ; HSA-TRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
965 ; HSA-TRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
966 ; HSA-TRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
967 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
968 ; HSA-TRAP-GFX900-V2-NEXT: user_sgpr_count = 6
969 ; HSA-TRAP-GFX900-V2-NEXT: enable_trap_handler = 0
970 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
971 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
972 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
973 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
974 ; HSA-TRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
975 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception_msb = 0
976 ; HSA-TRAP-GFX900-V2-NEXT: granulated_lds_size = 0
977 ; HSA-TRAP-GFX900-V2-NEXT: enable_exception = 0
978 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
979 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
980 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 0
981 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
982 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
983 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
984 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
985 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
986 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
987 ; HSA-TRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
988 ; HSA-TRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
989 ; HSA-TRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
990 ; HSA-TRAP-GFX900-V2-NEXT: private_element_size = 1
991 ; HSA-TRAP-GFX900-V2-NEXT: is_ptr64 = 1
992 ; HSA-TRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
993 ; HSA-TRAP-GFX900-V2-NEXT: is_debug_enabled = 0
994 ; HSA-TRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
995 ; HSA-TRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
996 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
997 ; HSA-TRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
998 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
999 ; HSA-TRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
1000 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 6
1001 ; HSA-TRAP-GFX900-V2-NEXT: workitem_vgpr_count = 3
1002 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
1003 ; HSA-TRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
1004 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
1005 ; HSA-TRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
1006 ; HSA-TRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
1007 ; HSA-TRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
1008 ; HSA-TRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
1009 ; HSA-TRAP-GFX900-V2-NEXT: group_segment_alignment = 4
1010 ; HSA-TRAP-GFX900-V2-NEXT: private_segment_alignment = 4
1011 ; HSA-TRAP-GFX900-V2-NEXT: wavefront_size = 6
1012 ; HSA-TRAP-GFX900-V2-NEXT: call_convention = -1
1013 ; HSA-TRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
1014 ; HSA-TRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
1015 ; HSA-TRAP-GFX900-V2-NEXT: ; %bb.0:
1016 ; HSA-TRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
1017 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
1018 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
1019 ; HSA-TRAP-GFX900-V2-NEXT: v_mov_b32_e32 v2, 2
1020 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
1021 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
1022 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1023 ; HSA-TRAP-GFX900-V2-NEXT: s_trap 3
1024 ; HSA-TRAP-GFX900-V2-NEXT: global_store_dword v0, v2, s[0:1]
1025 ; HSA-TRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1026 ; HSA-TRAP-GFX900-V2-NEXT: s_endpgm
1027 ;
1028 ; HSA-TRAP-GFX900-V3-LABEL: debugtrap:
1029 ; HSA-TRAP-GFX900-V3: ; %bb.0:
1030 ; HSA-TRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
1031 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
1032 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
1033 ; HSA-TRAP-GFX900-V3-NEXT: v_mov_b32_e32 v2, 2
1034 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
1035 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
1036 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1037 ; HSA-TRAP-GFX900-V3-NEXT: s_trap 3
1038 ; HSA-TRAP-GFX900-V3-NEXT: global_store_dword v0, v2, s[0:1]
1039 ; HSA-TRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1040 ; HSA-TRAP-GFX900-V3-NEXT: s_endpgm
1041 ;
1042 ; HSA-TRAP-GFX900-V4-LABEL: debugtrap:
1043 ; HSA-TRAP-GFX900-V4: ; %bb.0:
1044 ; HSA-TRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
1045 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
1046 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
1047 ; HSA-TRAP-GFX900-V4-NEXT: v_mov_b32_e32 v2, 2
1048 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
1049 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
1050 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1051 ; HSA-TRAP-GFX900-V4-NEXT: s_trap 3
1052 ; HSA-TRAP-GFX900-V4-NEXT: global_store_dword v0, v2, s[0:1]
1053 ; HSA-TRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1054 ; HSA-TRAP-GFX900-V4-NEXT: s_endpgm
1055 ;
1056 ; HSA-NOTRAP-GFX900-V2-LABEL: debugtrap:
1057 ; HSA-NOTRAP-GFX900-V2: .amd_kernel_code_t
1058 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_major = 1
1059 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_code_version_minor = 2
1060 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_kind = 1
1061 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_major = 9
1062 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_minor = 0
1063 ; HSA-NOTRAP-GFX900-V2-NEXT: amd_machine_version_stepping = 0
1064 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_entry_byte_offset = 256
1065 ; HSA-NOTRAP-GFX900-V2-NEXT: kernel_code_prefetch_byte_size = 0
1066 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_workitem_vgpr_count = 0
1067 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_wavefront_sgpr_count = 0
1068 ; HSA-NOTRAP-GFX900-V2-NEXT: priority = 0
1069 ; HSA-NOTRAP-GFX900-V2-NEXT: float_mode = 240
1070 ; HSA-NOTRAP-GFX900-V2-NEXT: priv = 0
1071 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_dx10_clamp = 1
1072 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_mode = 0
1073 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ieee_mode = 1
1074 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wgp_mode = 0
1075 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_mem_ordered = 0
1076 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_fwd_progress = 0
1077 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_wave_byte_offset = 0
1078 ; HSA-NOTRAP-GFX900-V2-NEXT: user_sgpr_count = 6
1079 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_trap_handler = 0
1080 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_x = 1
1081 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_y = 0
1082 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_id_z = 0
1083 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_workgroup_info = 0
1084 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_vgpr_workitem_id = 0
1085 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception_msb = 0
1086 ; HSA-NOTRAP-GFX900-V2-NEXT: granulated_lds_size = 0
1087 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_exception = 0
1088 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_buffer = 1
1089 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_ptr = 0
1090 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_queue_ptr = 0
1091 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_kernarg_segment_ptr = 1
1092 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_dispatch_id = 0
1093 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_flat_scratch_init = 0
1094 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_private_segment_size = 0
1095 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_x = 0
1096 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_y = 0
1097 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_sgpr_grid_workgroup_count_z = 0
1098 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_wavefront_size32 = 0
1099 ; HSA-NOTRAP-GFX900-V2-NEXT: enable_ordered_append_gds = 0
1100 ; HSA-NOTRAP-GFX900-V2-NEXT: private_element_size = 1
1101 ; HSA-NOTRAP-GFX900-V2-NEXT: is_ptr64 = 1
1102 ; HSA-NOTRAP-GFX900-V2-NEXT: is_dynamic_callstack = 0
1103 ; HSA-NOTRAP-GFX900-V2-NEXT: is_debug_enabled = 0
1104 ; HSA-NOTRAP-GFX900-V2-NEXT: is_xnack_enabled = 1
1105 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_private_segment_byte_size = 0
1106 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_group_segment_byte_size = 0
1107 ; HSA-NOTRAP-GFX900-V2-NEXT: gds_segment_byte_size = 0
1108 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_byte_size = 8
1109 ; HSA-NOTRAP-GFX900-V2-NEXT: workgroup_fbarrier_count = 0
1110 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_sgpr_count = 6
1111 ; HSA-NOTRAP-GFX900-V2-NEXT: workitem_vgpr_count = 3
1112 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_first = 0
1113 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_vgpr_count = 0
1114 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_first = 0
1115 ; HSA-NOTRAP-GFX900-V2-NEXT: reserved_sgpr_count = 0
1116 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_wavefront_private_segment_offset_sgpr = 0
1117 ; HSA-NOTRAP-GFX900-V2-NEXT: debug_private_segment_buffer_sgpr = 0
1118 ; HSA-NOTRAP-GFX900-V2-NEXT: kernarg_segment_alignment = 4
1119 ; HSA-NOTRAP-GFX900-V2-NEXT: group_segment_alignment = 4
1120 ; HSA-NOTRAP-GFX900-V2-NEXT: private_segment_alignment = 4
1121 ; HSA-NOTRAP-GFX900-V2-NEXT: wavefront_size = 6
1122 ; HSA-NOTRAP-GFX900-V2-NEXT: call_convention = -1
1123 ; HSA-NOTRAP-GFX900-V2-NEXT: runtime_loader_kernel_symbol = 0
1124 ; HSA-NOTRAP-GFX900-V2-NEXT: .end_amd_kernel_code_t
1125 ; HSA-NOTRAP-GFX900-V2-NEXT: ; %bb.0:
1126 ; HSA-NOTRAP-GFX900-V2-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
1127 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v0, 0
1128 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v1, 1
1129 ; HSA-NOTRAP-GFX900-V2-NEXT: v_mov_b32_e32 v2, 2
1130 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt lgkmcnt(0)
1131 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v1, s[0:1]
1132 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1133 ; HSA-NOTRAP-GFX900-V2-NEXT: global_store_dword v0, v2, s[0:1]
1134 ; HSA-NOTRAP-GFX900-V2-NEXT: s_waitcnt vmcnt(0)
1135 ; HSA-NOTRAP-GFX900-V2-NEXT: s_endpgm
1136 ;
1137 ; HSA-NOTRAP-GFX900-V3-LABEL: debugtrap:
1138 ; HSA-NOTRAP-GFX900-V3: ; %bb.0:
1139 ; HSA-NOTRAP-GFX900-V3-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
1140 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v0, 0
1141 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v1, 1
1142 ; HSA-NOTRAP-GFX900-V3-NEXT: v_mov_b32_e32 v2, 2
1143 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt lgkmcnt(0)
1144 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v1, s[0:1]
1145 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1146 ; HSA-NOTRAP-GFX900-V3-NEXT: global_store_dword v0, v2, s[0:1]
1147 ; HSA-NOTRAP-GFX900-V3-NEXT: s_waitcnt vmcnt(0)
1148 ; HSA-NOTRAP-GFX900-V3-NEXT: s_endpgm
1149 ;
1150 ; HSA-NOTRAP-GFX900-V4-LABEL: debugtrap:
1151 ; HSA-NOTRAP-GFX900-V4: ; %bb.0:
1152 ; HSA-NOTRAP-GFX900-V4-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
1153 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v0, 0
1154 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v1, 1
1155 ; HSA-NOTRAP-GFX900-V4-NEXT: v_mov_b32_e32 v2, 2
1156 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt lgkmcnt(0)
1157 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v1, s[0:1]
1158 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1159 ; HSA-NOTRAP-GFX900-V4-NEXT: global_store_dword v0, v2, s[0:1]
1160 ; HSA-NOTRAP-GFX900-V4-NEXT: s_waitcnt vmcnt(0)
1161 ; HSA-NOTRAP-GFX900-V4-NEXT: s_endpgm
1162 store volatile i32 1, i32 addrspace(1)* %arg0
1163 call void @llvm.debugtrap()
1164 store volatile i32 2, i32 addrspace(1)* %arg0
1165 ret void
1166 }
1168 attributes #0 = { nounwind noreturn }
1169 attributes #1 = { nounwind }