1 ; RUN: llc < %s -march=avr -verify-machineinstrs | FileCheck %s
4 ; CHECK-LABEL: shift_i8_i8_speed
5 define i8 @shift_i8_i8_speed(i8 %a, i8 %b) {
7 ; CHECK-NEXT: brmi .LBB0_2
11 ; CHECK-NEXT: brpl .LBB0_1
12 ; CHECK-NEXT: .LBB0_2:
14 %result = shl i8 %a, %b
18 ; Optimize for size (producing slightly smaller code).
19 ; CHECK-LABEL: shift_i8_i8_size
20 define i8 @shift_i8_i8_size(i8 %a, i8 %b) optsize {
23 ; CHECK-NEXT: brmi .LBB1_3
25 ; CHECK-NEXT: rjmp .LBB1_1
26 ; CHECK-NEXT: .LBB1_3:
28 %result = shl i8 %a, %b
32 ; CHECK-LABEL: shift_i16_i16
33 define i16 @shift_i16_i16(i16 %a, i16 %b) {
35 ; CHECK-NEXT: brmi .LBB2_2
36 ; CHECK-NEXT: .LBB2_1:
40 ; CHECK-NEXT: brpl .LBB2_1
41 ; CHECK-NEXT: .LBB2_2:
43 %result = shl i16 %a, %b
47 ; CHECK-LABEL: shift_i64_i64
48 define i64 @shift_i64_i64(i64 %a, i64 %b) {
49 ; CHECK: call __ashldi3
50 %result = shl i64 %a, %b
54 define i8 @lsl_i8_1(i8 %a) {
55 ; CHECK-LABEL: lsl_i8_1:
61 define i8 @lsl_i8_2(i8 %a) {
62 ; CHECK-LABEL: lsl_i8_2:
69 define i8 @lsl_i8_3(i8 %a) {
70 ; CHECK-LABEL: lsl_i8_3:
78 define i8 @lsl_i8_4(i8 %a) {
79 ; CHECK-LABEL: lsl_i8_4:
81 ; CHECK-NEXT: andi r24, -16
86 define i8 @lsl_i8_5(i8 %a) {
87 ; CHECK-LABEL: lsl_i8_5:
89 ; CHECK-NEXT: andi r24, -16
95 define i8 @lsl_i8_6(i8 %a) {
96 ; CHECK-LABEL: lsl_i8_6:
98 ; CHECK-NEXT: andi r24, -16
100 ; CHECK-NEXT: lsl r24
105 define i8 @lsr_i8_1(i8 %a) {
106 ; CHECK-LABEL: lsr_i8_1:
112 define i8 @lsr_i8_2(i8 %a) {
113 ; CHECK-LABEL: lsr_i8_2:
115 ; CHECK-NEXT: lsr r24
120 define i8 @lsr_i8_3(i8 %a) {
121 ; CHECK-LABEL: lsr_i8_3:
123 ; CHECK-NEXT: lsr r24
124 ; CHECK-NEXT: lsr r24
129 define i8 @lsr_i8_4(i8 %a) {
130 ; CHECK-LABEL: lsr_i8_4:
132 ; CHECK-NEXT: andi r24, 15
137 define i8 @lsr_i8_5(i8 %a) {
138 ; CHECK-LABEL: lsr_i8_5:
140 ; CHECK-NEXT: andi r24, 15
141 ; CHECK-NEXT: lsr r24
146 define i8 @lsr_i8_6(i8 %a) {
147 ; CHECK-LABEL: lsr_i8_6:
149 ; CHECK-NEXT: andi r24, 15
150 ; CHECK-NEXT: lsr r24
151 ; CHECK-NEXT: lsr r24
156 define i8 @lsl_i8_7(i8 %a) {
157 ; CHECK-LABEL: lsl_i8_7
159 ; CHECK-NEXT: clr r24
160 ; CHECK-NEXT: ror r24
161 %result = shl i8 %a, 7
165 define i8 @lsr_i8_7(i8 %a) {
166 ; CHECK-LABEL: lsr_i8_7
168 ; CHECK-NEXT: clr r24
169 ; CHECK-NEXT: rol r24
170 %result = lshr i8 %a, 7
174 define i8 @asr_i8_6(i8 %a) {
175 ; CHECK-LABEL: asr_i8_6
177 ; CHECK-NEXT: lsl r24
178 ; CHECK-NEXT: sbc r24, r24
179 ; CHECK-NEXT: bld r24, 0
180 %result = ashr i8 %a, 6
184 define i8 @asr_i8_7(i8 %a) {
185 ; CHECK-LABEL: asr_i8_7
187 ; CHECK-NEXT: sbc r24, r24
188 %result = ashr i8 %a, 7
192 define i16 @lsl_i16_5(i16 %a) {
193 ; CHECK-LABEL: lsl_i16_5
195 ; CHECK-NEXT: swap r24
196 ; CHECK-NEXT: andi r25, 240
197 ; CHECK-NEXT: eor r25, r24
198 ; CHECK-NEXT: andi r24, 240
199 ; CHECK-NEXT: eor r25, r24
200 ; CHECK-NEXT: lsl r24
201 ; CHECK-NEXT: rol r25
203 %result = shl i16 %a, 5
207 define i16 @lsl_i16_6(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f) {
208 ; CHECK-LABEL: lsl_i16_6
209 ; CHECK: mov r24, r14
210 ; CHECK-NEXT: mov r25, r15
211 ; CHECK-NEXT: swap r25
212 ; CHECK-NEXT: swap r24
213 ; CHECK-NEXT: andi r25, 240
214 ; CHECK-NEXT: eor r25, r24
215 ; CHECK-NEXT: andi r24, 240
216 ; CHECK-NEXT: eor r25, r24
217 ; CHECK-NEXT: lsl r24
218 ; CHECK-NEXT: rol r25
219 ; CHECK-NEXT: lsl r24
220 ; CHECK-NEXT: rol r25
222 %result = shl i16 %f, 6
226 define i16 @lsl_i16_9(i16 %a) {
227 ; CHECK-LABEL: lsl_i16_9
228 ; CHECK: mov r25, r24
229 ; CHECK-NEXT: clr r24
230 ; CHECK-NEXT: lsl r25
232 %result = shl i16 %a, 9
236 define i16 @lsl_i16_13(i16 %a) {
237 ; CHECK-LABEL: lsl_i16_13
238 ; CHECK: mov r25, r24
239 ; CHECK-NEXT: swap r25
240 ; CHECK-NEXT: andi r25, 240
241 ; CHECK-NEXT: clr r24
242 ; CHECK-NEXT: lsl r25
244 %result = shl i16 %a, 13
248 define i16 @lsr_i16_5(i16 %a) {
249 ; CHECK-LABEL: lsr_i16_5
251 ; CHECK-NEXT: swap r24
252 ; CHECK-NEXT: andi r24, 15
253 ; CHECK-NEXT: eor r24, r25
254 ; CHECK-NEXT: andi r25, 15
255 ; CHECK-NEXT: eor r24, r25
256 ; CHECK-NEXT: lsr r25
257 ; CHECK-NEXT: ror r24
259 %result = lshr i16 %a, 5
263 define i16 @lsr_i16_6(i16 %a, i16 %b, i16 %c, i16 %d, i16 %e, i16 %f) {
264 ; CHECK-LABEL: lsr_i16_6
265 ; CHECK: mov r24, r14
266 ; CHECK-NEXT: mov r25, r15
267 ; CHECK-NEXT: swap r25
268 ; CHECK-NEXT: swap r24
269 ; CHECK-NEXT: andi r24, 15
270 ; CHECK-NEXT: eor r24, r25
271 ; CHECK-NEXT: andi r25, 15
272 ; CHECK-NEXT: eor r24, r25
273 ; CHECK-NEXT: lsr r25
274 ; CHECK-NEXT: ror r24
275 ; CHECK-NEXT: lsr r25
276 ; CHECK-NEXT: ror r24
278 %result = lshr i16 %f, 6
282 define i16 @lsr_i16_9(i16 %a) {
283 ; CHECK-LABEL: lsr_i16_9
284 ; CHECK: mov r24, r25
285 ; CHECK-NEXT: clr r25
286 ; CHECK-NEXT: lsr r24
288 %result = lshr i16 %a, 9
292 define i16 @lsr_i16_13(i16 %a) {
293 ; CHECK-LABEL: lsr_i16_13
294 ; CHECK: mov r24, r25
295 ; CHECK-NEXT: swap r24
296 ; CHECK-NEXT: andi r24, 15
297 ; CHECK-NEXT: clr r25
298 ; CHECK-NEXT: lsr r24
300 %result = lshr i16 %a, 13
304 define i16 @asr_i16_7(i16 %a) {
305 ; CHECK-LABEL: asr_i16_7
307 ; CHECK-NEXT: mov r24, r25
308 ; CHECK-NEXT: rol r24
309 ; CHECK-NEXT: sbc r25, r25
311 %result = ashr i16 %a, 7
315 define i16 @asr_i16_9(i16 %a) {
316 ; CHECK-LABEL: asr_i16_9
317 ; CHECK: mov r24, r25
318 ; CHECK-NEXT: lsl r25
319 ; CHECK-NEXT: sbc r25, r25
320 ; CHECK-NEXT: asr r24
322 %result = ashr i16 %a, 9
326 define i16 @asr_i16_12(i16 %a) {
327 ; CHECK-LABEL: asr_i16_12
328 ; CHECK: mov r24, r25
329 ; CHECK-NEXT: lsl r25
330 ; CHECK-NEXT: sbc r25, r25
331 ; CHECK-NEXT: asr r24
332 ; CHECK-NEXT: asr r24
333 ; CHECK-NEXT: asr r24
334 ; CHECK-NEXT: asr r24
336 %result = ashr i16 %a, 12
340 define i16 @asr_i16_14(i16 %a) {
341 ; CHECK-LABEL: asr_i16_14
343 ; CHECK-NEXT: sbc r24, r24
344 ; CHECK-NEXT: lsl r25
345 ; CHECK-NEXT: mov r25, r24
346 ; CHECK-NEXT: rol r24
348 %result = ashr i16 %a, 14
352 define i16 @asr_i16_15(i16 %a) {
353 ; CHECK-LABEL: asr_i16_15
355 ; CHECK-NEXT: sbc r25, r25
356 ; CHECK-NEXT: mov r24, r25
358 %result = ashr i16 %a, 15