| blob | 8842b4191cc9caade0d83d310be6cdd969996835 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs -filetype=obj < %s \
3 ; RUN: -o /dev/null 2>&1
4 ; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs \
5 ; RUN: -filetype=obj < %s -o /dev/null 2>&1
6 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
7 ; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32
8 ; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \
9 ; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV32
10 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs -filetype=obj < %s \
11 ; RUN: -o /dev/null 2>&1
12 ; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs \
13 ; RUN: -filetype=obj < %s -o /dev/null 2>&1
14 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
15 ; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64
16 ; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs < %s \
17 ; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-RV64
19 define void @relax_bcc(i1 %a) nounwind {
20 ; CHECK-LABEL: relax_bcc:
21 ; CHECK: # %bb.0:
22 ; CHECK-NEXT: andi a0, a0, 1
23 ; CHECK-NEXT: bnez a0, .LBB0_1
24 ; CHECK-NEXT: j .LBB0_2
25 ; CHECK-NEXT: .LBB0_1: # %iftrue
26 ; CHECK-NEXT: #APP
27 ; CHECK-NEXT: .zero 4096
28 ; CHECK-NEXT: #NO_APP
29 ; CHECK-NEXT: .LBB0_2: # %tail
30 ; CHECK-NEXT: ret
31 br i1 %a, label %iftrue, label %tail
33 iftrue:
34 call void asm sideeffect ".space 4096", ""()
35 br label %tail
37 tail:
38 ret void
39 }
41 define i32 @relax_jal(i1 %a) nounwind {
42 ; CHECK-LABEL: relax_jal:
43 ; CHECK: # %bb.0:
44 ; CHECK-NEXT: addi sp, sp, -16
45 ; CHECK-NEXT: andi a0, a0, 1
46 ; CHECK-NEXT: bnez a0, .LBB1_1
47 ; CHECK-NEXT: # %bb.4:
48 ; CHECK-NEXT: jump .LBB1_2, a0
49 ; CHECK-NEXT: .LBB1_1: # %iftrue
50 ; CHECK-NEXT: #APP
51 ; CHECK-NEXT: #NO_APP
52 ; CHECK-NEXT: #APP
53 ; CHECK-NEXT: .zero 1048576
54 ; CHECK-NEXT: #NO_APP
55 ; CHECK-NEXT: j .LBB1_3
56 ; CHECK-NEXT: .LBB1_2: # %jmp
57 ; CHECK-NEXT: #APP
58 ; CHECK-NEXT: #NO_APP
59 ; CHECK-NEXT: .LBB1_3: # %tail
60 ; CHECK-NEXT: li a0, 1
61 ; CHECK-NEXT: addi sp, sp, 16
62 ; CHECK-NEXT: ret
63 br i1 %a, label %iftrue, label %jmp
65 jmp:
66 call void asm sideeffect "", ""()
67 br label %tail
69 iftrue:
70 call void asm sideeffect "", ""()
71 br label %space
73 space:
74 call void asm sideeffect ".space 1048576", ""()
75 br label %tail
77 tail:
78 ret i32 1
79 }
81 define void @relax_jal_spill_32() {
82 ; CHECK-RV32-LABEL: relax_jal_spill_32:
83 ; CHECK-RV32: # %bb.0:
84 ; CHECK-RV32-NEXT: addi sp, sp, -64
85 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 64
86 ; CHECK-RV32-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
87 ; CHECK-RV32-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
88 ; CHECK-RV32-NEXT: sw s1, 52(sp) # 4-byte Folded Spill
89 ; CHECK-RV32-NEXT: sw s2, 48(sp) # 4-byte Folded Spill
90 ; CHECK-RV32-NEXT: sw s3, 44(sp) # 4-byte Folded Spill
91 ; CHECK-RV32-NEXT: sw s4, 40(sp) # 4-byte Folded Spill
92 ; CHECK-RV32-NEXT: sw s5, 36(sp) # 4-byte Folded Spill
93 ; CHECK-RV32-NEXT: sw s6, 32(sp) # 4-byte Folded Spill
94 ; CHECK-RV32-NEXT: sw s7, 28(sp) # 4-byte Folded Spill
95 ; CHECK-RV32-NEXT: sw s8, 24(sp) # 4-byte Folded Spill
96 ; CHECK-RV32-NEXT: sw s9, 20(sp) # 4-byte Folded Spill
97 ; CHECK-RV32-NEXT: sw s10, 16(sp) # 4-byte Folded Spill
98 ; CHECK-RV32-NEXT: sw s11, 12(sp) # 4-byte Folded Spill
99 ; CHECK-RV32-NEXT: .cfi_offset ra, -4
100 ; CHECK-RV32-NEXT: .cfi_offset s0, -8
101 ; CHECK-RV32-NEXT: .cfi_offset s1, -12
102 ; CHECK-RV32-NEXT: .cfi_offset s2, -16
103 ; CHECK-RV32-NEXT: .cfi_offset s3, -20
104 ; CHECK-RV32-NEXT: .cfi_offset s4, -24
105 ; CHECK-RV32-NEXT: .cfi_offset s5, -28
106 ; CHECK-RV32-NEXT: .cfi_offset s6, -32
107 ; CHECK-RV32-NEXT: .cfi_offset s7, -36
108 ; CHECK-RV32-NEXT: .cfi_offset s8, -40
109 ; CHECK-RV32-NEXT: .cfi_offset s9, -44
110 ; CHECK-RV32-NEXT: .cfi_offset s10, -48
111 ; CHECK-RV32-NEXT: .cfi_offset s11, -52
112 ; CHECK-RV32-NEXT: #APP
113 ; CHECK-RV32-NEXT: li ra, 1
114 ; CHECK-RV32-NEXT: #NO_APP
115 ; CHECK-RV32-NEXT: #APP
116 ; CHECK-RV32-NEXT: li t0, 5
117 ; CHECK-RV32-NEXT: #NO_APP
118 ; CHECK-RV32-NEXT: #APP
119 ; CHECK-RV32-NEXT: li t1, 6
120 ; CHECK-RV32-NEXT: #NO_APP
121 ; CHECK-RV32-NEXT: #APP
122 ; CHECK-RV32-NEXT: li t2, 7
123 ; CHECK-RV32-NEXT: #NO_APP
124 ; CHECK-RV32-NEXT: #APP
125 ; CHECK-RV32-NEXT: li s0, 8
126 ; CHECK-RV32-NEXT: #NO_APP
127 ; CHECK-RV32-NEXT: #APP
128 ; CHECK-RV32-NEXT: li s1, 9
129 ; CHECK-RV32-NEXT: #NO_APP
130 ; CHECK-RV32-NEXT: #APP
131 ; CHECK-RV32-NEXT: li a0, 10
132 ; CHECK-RV32-NEXT: #NO_APP
133 ; CHECK-RV32-NEXT: #APP
134 ; CHECK-RV32-NEXT: li a1, 11
135 ; CHECK-RV32-NEXT: #NO_APP
136 ; CHECK-RV32-NEXT: #APP
137 ; CHECK-RV32-NEXT: li a2, 12
138 ; CHECK-RV32-NEXT: #NO_APP
139 ; CHECK-RV32-NEXT: #APP
140 ; CHECK-RV32-NEXT: li a3, 13
141 ; CHECK-RV32-NEXT: #NO_APP
142 ; CHECK-RV32-NEXT: #APP
143 ; CHECK-RV32-NEXT: li a4, 14
144 ; CHECK-RV32-NEXT: #NO_APP
145 ; CHECK-RV32-NEXT: #APP
146 ; CHECK-RV32-NEXT: li a5, 15
147 ; CHECK-RV32-NEXT: #NO_APP
148 ; CHECK-RV32-NEXT: #APP
149 ; CHECK-RV32-NEXT: li a6, 16
150 ; CHECK-RV32-NEXT: #NO_APP
151 ; CHECK-RV32-NEXT: #APP
152 ; CHECK-RV32-NEXT: li a7, 17
153 ; CHECK-RV32-NEXT: #NO_APP
154 ; CHECK-RV32-NEXT: #APP
155 ; CHECK-RV32-NEXT: li s2, 18
156 ; CHECK-RV32-NEXT: #NO_APP
157 ; CHECK-RV32-NEXT: #APP
158 ; CHECK-RV32-NEXT: li s3, 19
159 ; CHECK-RV32-NEXT: #NO_APP
160 ; CHECK-RV32-NEXT: #APP
161 ; CHECK-RV32-NEXT: li s4, 20
162 ; CHECK-RV32-NEXT: #NO_APP
163 ; CHECK-RV32-NEXT: #APP
164 ; CHECK-RV32-NEXT: li s5, 21
165 ; CHECK-RV32-NEXT: #NO_APP
166 ; CHECK-RV32-NEXT: #APP
167 ; CHECK-RV32-NEXT: li s6, 22
168 ; CHECK-RV32-NEXT: #NO_APP
169 ; CHECK-RV32-NEXT: #APP
170 ; CHECK-RV32-NEXT: li s7, 23
171 ; CHECK-RV32-NEXT: #NO_APP
172 ; CHECK-RV32-NEXT: #APP
173 ; CHECK-RV32-NEXT: li s8, 24
174 ; CHECK-RV32-NEXT: #NO_APP
175 ; CHECK-RV32-NEXT: #APP
176 ; CHECK-RV32-NEXT: li s9, 25
177 ; CHECK-RV32-NEXT: #NO_APP
178 ; CHECK-RV32-NEXT: #APP
179 ; CHECK-RV32-NEXT: li s10, 26
180 ; CHECK-RV32-NEXT: #NO_APP
181 ; CHECK-RV32-NEXT: #APP
182 ; CHECK-RV32-NEXT: li s11, 27
183 ; CHECK-RV32-NEXT: #NO_APP
184 ; CHECK-RV32-NEXT: #APP
185 ; CHECK-RV32-NEXT: li t3, 28
186 ; CHECK-RV32-NEXT: #NO_APP
187 ; CHECK-RV32-NEXT: #APP
188 ; CHECK-RV32-NEXT: li t4, 29
189 ; CHECK-RV32-NEXT: #NO_APP
190 ; CHECK-RV32-NEXT: #APP
191 ; CHECK-RV32-NEXT: li t5, 30
192 ; CHECK-RV32-NEXT: #NO_APP
193 ; CHECK-RV32-NEXT: #APP
194 ; CHECK-RV32-NEXT: li t6, 31
195 ; CHECK-RV32-NEXT: #NO_APP
196 ; CHECK-RV32-NEXT: beq t5, t6, .LBB2_1
197 ; CHECK-RV32-NEXT: # %bb.3:
198 ; CHECK-RV32-NEXT: sw s11, 0(sp)
199 ; CHECK-RV32-NEXT: jump .LBB2_4, s11
200 ; CHECK-RV32-NEXT: .LBB2_1: # %branch_1
201 ; CHECK-RV32-NEXT: #APP
202 ; CHECK-RV32-NEXT: .zero 1048576
203 ; CHECK-RV32-NEXT: #NO_APP
204 ; CHECK-RV32-NEXT: j .LBB2_2
205 ; CHECK-RV32-NEXT: .LBB2_4: # %branch_2
206 ; CHECK-RV32-NEXT: lw s11, 0(sp)
207 ; CHECK-RV32-NEXT: .LBB2_2: # %branch_2
208 ; CHECK-RV32-NEXT: #APP
209 ; CHECK-RV32-NEXT: # reg use ra
210 ; CHECK-RV32-NEXT: #NO_APP
211 ; CHECK-RV32-NEXT: #APP
212 ; CHECK-RV32-NEXT: # reg use t0
213 ; CHECK-RV32-NEXT: #NO_APP
214 ; CHECK-RV32-NEXT: #APP
215 ; CHECK-RV32-NEXT: # reg use t1
216 ; CHECK-RV32-NEXT: #NO_APP
217 ; CHECK-RV32-NEXT: #APP
218 ; CHECK-RV32-NEXT: # reg use t2
219 ; CHECK-RV32-NEXT: #NO_APP
220 ; CHECK-RV32-NEXT: #APP
221 ; CHECK-RV32-NEXT: # reg use s0
222 ; CHECK-RV32-NEXT: #NO_APP
223 ; CHECK-RV32-NEXT: #APP
224 ; CHECK-RV32-NEXT: # reg use s1
225 ; CHECK-RV32-NEXT: #NO_APP
226 ; CHECK-RV32-NEXT: #APP
227 ; CHECK-RV32-NEXT: # reg use a0
228 ; CHECK-RV32-NEXT: #NO_APP
229 ; CHECK-RV32-NEXT: #APP
230 ; CHECK-RV32-NEXT: # reg use a1
231 ; CHECK-RV32-NEXT: #NO_APP
232 ; CHECK-RV32-NEXT: #APP
233 ; CHECK-RV32-NEXT: # reg use a2
234 ; CHECK-RV32-NEXT: #NO_APP
235 ; CHECK-RV32-NEXT: #APP
236 ; CHECK-RV32-NEXT: # reg use a3
237 ; CHECK-RV32-NEXT: #NO_APP
238 ; CHECK-RV32-NEXT: #APP
239 ; CHECK-RV32-NEXT: # reg use a4
240 ; CHECK-RV32-NEXT: #NO_APP
241 ; CHECK-RV32-NEXT: #APP
242 ; CHECK-RV32-NEXT: # reg use a5
243 ; CHECK-RV32-NEXT: #NO_APP
244 ; CHECK-RV32-NEXT: #APP
245 ; CHECK-RV32-NEXT: # reg use a6
246 ; CHECK-RV32-NEXT: #NO_APP
247 ; CHECK-RV32-NEXT: #APP
248 ; CHECK-RV32-NEXT: # reg use a7
249 ; CHECK-RV32-NEXT: #NO_APP
250 ; CHECK-RV32-NEXT: #APP
251 ; CHECK-RV32-NEXT: # reg use s2
252 ; CHECK-RV32-NEXT: #NO_APP
253 ; CHECK-RV32-NEXT: #APP
254 ; CHECK-RV32-NEXT: # reg use s3
255 ; CHECK-RV32-NEXT: #NO_APP
256 ; CHECK-RV32-NEXT: #APP
257 ; CHECK-RV32-NEXT: # reg use s4
258 ; CHECK-RV32-NEXT: #NO_APP
259 ; CHECK-RV32-NEXT: #APP
260 ; CHECK-RV32-NEXT: # reg use s5
261 ; CHECK-RV32-NEXT: #NO_APP
262 ; CHECK-RV32-NEXT: #APP
263 ; CHECK-RV32-NEXT: # reg use s6
264 ; CHECK-RV32-NEXT: #NO_APP
265 ; CHECK-RV32-NEXT: #APP
266 ; CHECK-RV32-NEXT: # reg use s7
267 ; CHECK-RV32-NEXT: #NO_APP
268 ; CHECK-RV32-NEXT: #APP
269 ; CHECK-RV32-NEXT: # reg use s8
270 ; CHECK-RV32-NEXT: #NO_APP
271 ; CHECK-RV32-NEXT: #APP
272 ; CHECK-RV32-NEXT: # reg use s9
273 ; CHECK-RV32-NEXT: #NO_APP
274 ; CHECK-RV32-NEXT: #APP
275 ; CHECK-RV32-NEXT: # reg use s10
276 ; CHECK-RV32-NEXT: #NO_APP
277 ; CHECK-RV32-NEXT: #APP
278 ; CHECK-RV32-NEXT: # reg use s11
279 ; CHECK-RV32-NEXT: #NO_APP
280 ; CHECK-RV32-NEXT: #APP
281 ; CHECK-RV32-NEXT: # reg use t3
282 ; CHECK-RV32-NEXT: #NO_APP
283 ; CHECK-RV32-NEXT: #APP
284 ; CHECK-RV32-NEXT: # reg use t4
285 ; CHECK-RV32-NEXT: #NO_APP
286 ; CHECK-RV32-NEXT: #APP
287 ; CHECK-RV32-NEXT: # reg use t5
288 ; CHECK-RV32-NEXT: #NO_APP
289 ; CHECK-RV32-NEXT: #APP
290 ; CHECK-RV32-NEXT: # reg use t6
291 ; CHECK-RV32-NEXT: #NO_APP
292 ; CHECK-RV32-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
293 ; CHECK-RV32-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
294 ; CHECK-RV32-NEXT: lw s1, 52(sp) # 4-byte Folded Reload
295 ; CHECK-RV32-NEXT: lw s2, 48(sp) # 4-byte Folded Reload
296 ; CHECK-RV32-NEXT: lw s3, 44(sp) # 4-byte Folded Reload
297 ; CHECK-RV32-NEXT: lw s4, 40(sp) # 4-byte Folded Reload
298 ; CHECK-RV32-NEXT: lw s5, 36(sp) # 4-byte Folded Reload
299 ; CHECK-RV32-NEXT: lw s6, 32(sp) # 4-byte Folded Reload
300 ; CHECK-RV32-NEXT: lw s7, 28(sp) # 4-byte Folded Reload
301 ; CHECK-RV32-NEXT: lw s8, 24(sp) # 4-byte Folded Reload
302 ; CHECK-RV32-NEXT: lw s9, 20(sp) # 4-byte Folded Reload
303 ; CHECK-RV32-NEXT: lw s10, 16(sp) # 4-byte Folded Reload
304 ; CHECK-RV32-NEXT: lw s11, 12(sp) # 4-byte Folded Reload
305 ; CHECK-RV32-NEXT: addi sp, sp, 64
306 ; CHECK-RV32-NEXT: ret
308 %ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
309 %t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
310 %t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
311 %t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
312 %s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
313 %s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
314 %a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
315 %a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
316 %a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
317 %a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
318 %a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
319 %a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
320 %a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
321 %a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
322 %s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
323 %s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
324 %s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
325 %s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
326 %s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
327 %s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
328 %s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
329 %s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
330 %s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
331 %s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
332 %t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
333 %t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
334 %t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
335 %t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
337 %cmp = icmp eq i32 %t5, %t6
338 br i1 %cmp, label %branch_1, label %branch_2
340 branch_1:
341 call void asm sideeffect ".space 1048576", ""()
342 br label %branch_2
344 branch_2:
345 call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
346 call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
347 call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
348 call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
349 call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
350 call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
351 call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
352 call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
353 call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
354 call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
355 call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
356 call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
357 call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
358 call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
359 call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
360 call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
361 call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
362 call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
363 call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
364 call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
365 call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
366 call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
367 call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
368 call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
369 call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
370 call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
371 call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
372 call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
374 ret void
375 }
377 define void @relax_jal_spill_32_adjust_spill_slot() {
378 ; CHECK-RV32-LABEL: relax_jal_spill_32_adjust_spill_slot:
379 ; CHECK-RV32: # %bb.0:
380 ; CHECK-RV32-NEXT: addi sp, sp, -2032
381 ; CHECK-RV32-NEXT: .cfi_def_cfa_offset 2032
382 ; CHECK-RV32-NEXT: sw ra, 2028(sp) # 4-byte Folded Spill
383 ; CHECK-RV32-NEXT: sw s0, 2024(sp) # 4-byte Folded Spill
384 ; CHECK-RV32-NEXT: sw s1, 2020(sp) # 4-byte Folded Spill
385 ; CHECK-RV32-NEXT: sw s2, 2016(sp) # 4-byte Folded Spill
386 ; CHECK-RV32-NEXT: sw s3, 2012(sp) # 4-byte Folded Spill
387 ; CHECK-RV32-NEXT: sw s4, 2008(sp) # 4-byte Folded Spill
388 ; CHECK-RV32-NEXT: sw s5, 2004(sp) # 4-byte Folded Spill
389 ; CHECK-RV32-NEXT: sw s6, 2000(sp) # 4-byte Folded Spill
390 ; CHECK-RV32-NEXT: sw s7, 1996(sp) # 4-byte Folded Spill
391 ; CHECK-RV32-NEXT: sw s8, 1992(sp) # 4-byte Folded Spill
392 ; CHECK-RV32-NEXT: sw s9, 1988(sp) # 4-byte Folded Spill
393 ; CHECK-RV32-NEXT: sw s10, 1984(sp) # 4-byte Folded Spill
394 ; CHECK-RV32-NEXT: sw s11, 1980(sp) # 4-byte Folded Spill
395 ; CHECK-RV32-NEXT: .cfi_offset ra, -4
396 ; CHECK-RV32-NEXT: .cfi_offset s0, -8
397 ; CHECK-RV32-NEXT: .cfi_offset s1, -12
398 ; CHECK-RV32-NEXT: .cfi_offset s2, -16
399 ; CHECK-RV32-NEXT: .cfi_offset s3, -20
400 ; CHECK-RV32-NEXT: .cfi_offset s4, -24
401 ; CHECK-RV32-NEXT: .cfi_offset s5, -28
402 ; CHECK-RV32-NEXT: .cfi_offset s6, -32
403 ; CHECK-RV32-NEXT: .cfi_offset s7, -36
404 ; CHECK-RV32-NEXT: .cfi_offset s8, -40
405 ; CHECK-RV32-NEXT: .cfi_offset s9, -44
406 ; CHECK-RV32-NEXT: .cfi_offset s10, -48
407 ; CHECK-RV32-NEXT: .cfi_offset s11, -52
408 ; CHECK-RV32-NEXT: addi s0, sp, 2032
409 ; CHECK-RV32-NEXT: .cfi_def_cfa s0, 0
410 ; CHECK-RV32-NEXT: lui a0, 2
411 ; CHECK-RV32-NEXT: addi a0, a0, -2032
412 ; CHECK-RV32-NEXT: sub sp, sp, a0
413 ; CHECK-RV32-NEXT: srli a0, sp, 12
414 ; CHECK-RV32-NEXT: slli sp, a0, 12
415 ; CHECK-RV32-NEXT: #APP
416 ; CHECK-RV32-NEXT: li ra, 1
417 ; CHECK-RV32-NEXT: #NO_APP
418 ; CHECK-RV32-NEXT: #APP
419 ; CHECK-RV32-NEXT: li t0, 5
420 ; CHECK-RV32-NEXT: #NO_APP
421 ; CHECK-RV32-NEXT: #APP
422 ; CHECK-RV32-NEXT: li t1, 6
423 ; CHECK-RV32-NEXT: #NO_APP
424 ; CHECK-RV32-NEXT: #APP
425 ; CHECK-RV32-NEXT: li t2, 7
426 ; CHECK-RV32-NEXT: #NO_APP
427 ; CHECK-RV32-NEXT: #APP
428 ; CHECK-RV32-NEXT: li s0, 8
429 ; CHECK-RV32-NEXT: #NO_APP
430 ; CHECK-RV32-NEXT: #APP
431 ; CHECK-RV32-NEXT: li s1, 9
432 ; CHECK-RV32-NEXT: #NO_APP
433 ; CHECK-RV32-NEXT: #APP
434 ; CHECK-RV32-NEXT: li a0, 10
435 ; CHECK-RV32-NEXT: #NO_APP
436 ; CHECK-RV32-NEXT: #APP
437 ; CHECK-RV32-NEXT: li a1, 11
438 ; CHECK-RV32-NEXT: #NO_APP
439 ; CHECK-RV32-NEXT: #APP
440 ; CHECK-RV32-NEXT: li a2, 12
441 ; CHECK-RV32-NEXT: #NO_APP
442 ; CHECK-RV32-NEXT: #APP
443 ; CHECK-RV32-NEXT: li a3, 13
444 ; CHECK-RV32-NEXT: #NO_APP
445 ; CHECK-RV32-NEXT: #APP
446 ; CHECK-RV32-NEXT: li a4, 14
447 ; CHECK-RV32-NEXT: #NO_APP
448 ; CHECK-RV32-NEXT: #APP
449 ; CHECK-RV32-NEXT: li a5, 15
450 ; CHECK-RV32-NEXT: #NO_APP
451 ; CHECK-RV32-NEXT: #APP
452 ; CHECK-RV32-NEXT: li a6, 16
453 ; CHECK-RV32-NEXT: #NO_APP
454 ; CHECK-RV32-NEXT: #APP
455 ; CHECK-RV32-NEXT: li a7, 17
456 ; CHECK-RV32-NEXT: #NO_APP
457 ; CHECK-RV32-NEXT: #APP
458 ; CHECK-RV32-NEXT: li s2, 18
459 ; CHECK-RV32-NEXT: #NO_APP
460 ; CHECK-RV32-NEXT: #APP
461 ; CHECK-RV32-NEXT: li s3, 19
462 ; CHECK-RV32-NEXT: #NO_APP
463 ; CHECK-RV32-NEXT: #APP
464 ; CHECK-RV32-NEXT: li s4, 20
465 ; CHECK-RV32-NEXT: #NO_APP
466 ; CHECK-RV32-NEXT: #APP
467 ; CHECK-RV32-NEXT: li s5, 21
468 ; CHECK-RV32-NEXT: #NO_APP
469 ; CHECK-RV32-NEXT: #APP
470 ; CHECK-RV32-NEXT: li s6, 22
471 ; CHECK-RV32-NEXT: #NO_APP
472 ; CHECK-RV32-NEXT: #APP
473 ; CHECK-RV32-NEXT: li s7, 23
474 ; CHECK-RV32-NEXT: #NO_APP
475 ; CHECK-RV32-NEXT: #APP
476 ; CHECK-RV32-NEXT: li s8, 24
477 ; CHECK-RV32-NEXT: #NO_APP
478 ; CHECK-RV32-NEXT: #APP
479 ; CHECK-RV32-NEXT: li s9, 25
480 ; CHECK-RV32-NEXT: #NO_APP
481 ; CHECK-RV32-NEXT: #APP
482 ; CHECK-RV32-NEXT: li s10, 26
483 ; CHECK-RV32-NEXT: #NO_APP
484 ; CHECK-RV32-NEXT: #APP
485 ; CHECK-RV32-NEXT: li s11, 27
486 ; CHECK-RV32-NEXT: #NO_APP
487 ; CHECK-RV32-NEXT: #APP
488 ; CHECK-RV32-NEXT: li t3, 28
489 ; CHECK-RV32-NEXT: #NO_APP
490 ; CHECK-RV32-NEXT: #APP
491 ; CHECK-RV32-NEXT: li t4, 29
492 ; CHECK-RV32-NEXT: #NO_APP
493 ; CHECK-RV32-NEXT: #APP
494 ; CHECK-RV32-NEXT: li t5, 30
495 ; CHECK-RV32-NEXT: #NO_APP
496 ; CHECK-RV32-NEXT: #APP
497 ; CHECK-RV32-NEXT: li t6, 31
498 ; CHECK-RV32-NEXT: #NO_APP
499 ; CHECK-RV32-NEXT: beq t5, t6, .LBB3_1
500 ; CHECK-RV32-NEXT: # %bb.3:
501 ; CHECK-RV32-NEXT: sw s11, 0(sp)
502 ; CHECK-RV32-NEXT: jump .LBB3_4, s11
503 ; CHECK-RV32-NEXT: .LBB3_1: # %branch_1
504 ; CHECK-RV32-NEXT: #APP
505 ; CHECK-RV32-NEXT: .zero 1048576
506 ; CHECK-RV32-NEXT: #NO_APP
507 ; CHECK-RV32-NEXT: j .LBB3_2
508 ; CHECK-RV32-NEXT: .LBB3_4: # %branch_2
509 ; CHECK-RV32-NEXT: lw s11, 0(sp)
510 ; CHECK-RV32-NEXT: .LBB3_2: # %branch_2
511 ; CHECK-RV32-NEXT: #APP
512 ; CHECK-RV32-NEXT: # reg use ra
513 ; CHECK-RV32-NEXT: #NO_APP
514 ; CHECK-RV32-NEXT: #APP
515 ; CHECK-RV32-NEXT: # reg use t0
516 ; CHECK-RV32-NEXT: #NO_APP
517 ; CHECK-RV32-NEXT: #APP
518 ; CHECK-RV32-NEXT: # reg use t1
519 ; CHECK-RV32-NEXT: #NO_APP
520 ; CHECK-RV32-NEXT: #APP
521 ; CHECK-RV32-NEXT: # reg use t2
522 ; CHECK-RV32-NEXT: #NO_APP
523 ; CHECK-RV32-NEXT: #APP
524 ; CHECK-RV32-NEXT: # reg use s0
525 ; CHECK-RV32-NEXT: #NO_APP
526 ; CHECK-RV32-NEXT: #APP
527 ; CHECK-RV32-NEXT: # reg use s1
528 ; CHECK-RV32-NEXT: #NO_APP
529 ; CHECK-RV32-NEXT: #APP
530 ; CHECK-RV32-NEXT: # reg use a0
531 ; CHECK-RV32-NEXT: #NO_APP
532 ; CHECK-RV32-NEXT: #APP
533 ; CHECK-RV32-NEXT: # reg use a1
534 ; CHECK-RV32-NEXT: #NO_APP
535 ; CHECK-RV32-NEXT: #APP
536 ; CHECK-RV32-NEXT: # reg use a2
537 ; CHECK-RV32-NEXT: #NO_APP
538 ; CHECK-RV32-NEXT: #APP
539 ; CHECK-RV32-NEXT: # reg use a3
540 ; CHECK-RV32-NEXT: #NO_APP
541 ; CHECK-RV32-NEXT: #APP
542 ; CHECK-RV32-NEXT: # reg use a4
543 ; CHECK-RV32-NEXT: #NO_APP
544 ; CHECK-RV32-NEXT: #APP
545 ; CHECK-RV32-NEXT: # reg use a5
546 ; CHECK-RV32-NEXT: #NO_APP
547 ; CHECK-RV32-NEXT: #APP
548 ; CHECK-RV32-NEXT: # reg use a6
549 ; CHECK-RV32-NEXT: #NO_APP
550 ; CHECK-RV32-NEXT: #APP
551 ; CHECK-RV32-NEXT: # reg use a7
552 ; CHECK-RV32-NEXT: #NO_APP
553 ; CHECK-RV32-NEXT: #APP
554 ; CHECK-RV32-NEXT: # reg use s2
555 ; CHECK-RV32-NEXT: #NO_APP
556 ; CHECK-RV32-NEXT: #APP
557 ; CHECK-RV32-NEXT: # reg use s3
558 ; CHECK-RV32-NEXT: #NO_APP
559 ; CHECK-RV32-NEXT: #APP
560 ; CHECK-RV32-NEXT: # reg use s4
561 ; CHECK-RV32-NEXT: #NO_APP
562 ; CHECK-RV32-NEXT: #APP
563 ; CHECK-RV32-NEXT: # reg use s5
564 ; CHECK-RV32-NEXT: #NO_APP
565 ; CHECK-RV32-NEXT: #APP
566 ; CHECK-RV32-NEXT: # reg use s6
567 ; CHECK-RV32-NEXT: #NO_APP
568 ; CHECK-RV32-NEXT: #APP
569 ; CHECK-RV32-NEXT: # reg use s7
570 ; CHECK-RV32-NEXT: #NO_APP
571 ; CHECK-RV32-NEXT: #APP
572 ; CHECK-RV32-NEXT: # reg use s8
573 ; CHECK-RV32-NEXT: #NO_APP
574 ; CHECK-RV32-NEXT: #APP
575 ; CHECK-RV32-NEXT: # reg use s9
576 ; CHECK-RV32-NEXT: #NO_APP
577 ; CHECK-RV32-NEXT: #APP
578 ; CHECK-RV32-NEXT: # reg use s10
579 ; CHECK-RV32-NEXT: #NO_APP
580 ; CHECK-RV32-NEXT: #APP
581 ; CHECK-RV32-NEXT: # reg use s11
582 ; CHECK-RV32-NEXT: #NO_APP
583 ; CHECK-RV32-NEXT: #APP
584 ; CHECK-RV32-NEXT: # reg use t3
585 ; CHECK-RV32-NEXT: #NO_APP
586 ; CHECK-RV32-NEXT: #APP
587 ; CHECK-RV32-NEXT: # reg use t4
588 ; CHECK-RV32-NEXT: #NO_APP
589 ; CHECK-RV32-NEXT: #APP
590 ; CHECK-RV32-NEXT: # reg use t5
591 ; CHECK-RV32-NEXT: #NO_APP
592 ; CHECK-RV32-NEXT: #APP
593 ; CHECK-RV32-NEXT: # reg use t6
594 ; CHECK-RV32-NEXT: #NO_APP
595 ; CHECK-RV32-NEXT: lui a0, 2
596 ; CHECK-RV32-NEXT: sub sp, s0, a0
597 ; CHECK-RV32-NEXT: lui a0, 2
598 ; CHECK-RV32-NEXT: addi a0, a0, -2032
599 ; CHECK-RV32-NEXT: add sp, sp, a0
600 ; CHECK-RV32-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
601 ; CHECK-RV32-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
602 ; CHECK-RV32-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
603 ; CHECK-RV32-NEXT: lw s2, 2016(sp) # 4-byte Folded Reload
604 ; CHECK-RV32-NEXT: lw s3, 2012(sp) # 4-byte Folded Reload
605 ; CHECK-RV32-NEXT: lw s4, 2008(sp) # 4-byte Folded Reload
606 ; CHECK-RV32-NEXT: lw s5, 2004(sp) # 4-byte Folded Reload
607 ; CHECK-RV32-NEXT: lw s6, 2000(sp) # 4-byte Folded Reload
608 ; CHECK-RV32-NEXT: lw s7, 1996(sp) # 4-byte Folded Reload
609 ; CHECK-RV32-NEXT: lw s8, 1992(sp) # 4-byte Folded Reload
610 ; CHECK-RV32-NEXT: lw s9, 1988(sp) # 4-byte Folded Reload
611 ; CHECK-RV32-NEXT: lw s10, 1984(sp) # 4-byte Folded Reload
612 ; CHECK-RV32-NEXT: lw s11, 1980(sp) # 4-byte Folded Reload
613 ; CHECK-RV32-NEXT: addi sp, sp, 2032
614 ; CHECK-RV32-NEXT: ret
616 ; If the stack is large and the offset of BranchRelaxationScratchFrameIndex
617 ; is out the range of 12-bit signed integer, check whether the spill slot is
618 ; adjusted to close to the stack base register.
619 %stack_obj = alloca i32, align 4096
621 %ra = call i32 asm sideeffect "addi ra, x0, 1", "={ra}"()
622 %t0 = call i32 asm sideeffect "addi t0, x0, 5", "={t0}"()
623 %t1 = call i32 asm sideeffect "addi t1, x0, 6", "={t1}"()
624 %t2 = call i32 asm sideeffect "addi t2, x0, 7", "={t2}"()
625 %s0 = call i32 asm sideeffect "addi s0, x0, 8", "={s0}"()
626 %s1 = call i32 asm sideeffect "addi s1, x0, 9", "={s1}"()
627 %a0 = call i32 asm sideeffect "addi a0, x0, 10", "={a0}"()
628 %a1 = call i32 asm sideeffect "addi a1, x0, 11", "={a1}"()
629 %a2 = call i32 asm sideeffect "addi a2, x0, 12", "={a2}"()
630 %a3 = call i32 asm sideeffect "addi a3, x0, 13", "={a3}"()
631 %a4 = call i32 asm sideeffect "addi a4, x0, 14", "={a4}"()
632 %a5 = call i32 asm sideeffect "addi a5, x0, 15", "={a5}"()
633 %a6 = call i32 asm sideeffect "addi a6, x0, 16", "={a6}"()
634 %a7 = call i32 asm sideeffect "addi a7, x0, 17", "={a7}"()
635 %s2 = call i32 asm sideeffect "addi s2, x0, 18", "={s2}"()
636 %s3 = call i32 asm sideeffect "addi s3, x0, 19", "={s3}"()
637 %s4 = call i32 asm sideeffect "addi s4, x0, 20", "={s4}"()
638 %s5 = call i32 asm sideeffect "addi s5, x0, 21", "={s5}"()
639 %s6 = call i32 asm sideeffect "addi s6, x0, 22", "={s6}"()
640 %s7 = call i32 asm sideeffect "addi s7, x0, 23", "={s7}"()
641 %s8 = call i32 asm sideeffect "addi s8, x0, 24", "={s8}"()
642 %s9 = call i32 asm sideeffect "addi s9, x0, 25", "={s9}"()
643 %s10 = call i32 asm sideeffect "addi s10, x0, 26", "={s10}"()
644 %s11 = call i32 asm sideeffect "addi s11, x0, 27", "={s11}"()
645 %t3 = call i32 asm sideeffect "addi t3, x0, 28", "={t3}"()
646 %t4 = call i32 asm sideeffect "addi t4, x0, 29", "={t4}"()
647 %t5 = call i32 asm sideeffect "addi t5, x0, 30", "={t5}"()
648 %t6 = call i32 asm sideeffect "addi t6, x0, 31", "={t6}"()
650 %cmp = icmp eq i32 %t5, %t6
651 br i1 %cmp, label %branch_1, label %branch_2
653 branch_1:
654 call void asm sideeffect ".space 1048576", ""()
655 br label %branch_2
657 branch_2:
658 call void asm sideeffect "# reg use $0", "{ra}"(i32 %ra)
659 call void asm sideeffect "# reg use $0", "{t0}"(i32 %t0)
660 call void asm sideeffect "# reg use $0", "{t1}"(i32 %t1)
661 call void asm sideeffect "# reg use $0", "{t2}"(i32 %t2)
662 call void asm sideeffect "# reg use $0", "{s0}"(i32 %s0)
663 call void asm sideeffect "# reg use $0", "{s1}"(i32 %s1)
664 call void asm sideeffect "# reg use $0", "{a0}"(i32 %a0)
665 call void asm sideeffect "# reg use $0", "{a1}"(i32 %a1)
666 call void asm sideeffect "# reg use $0", "{a2}"(i32 %a2)
667 call void asm sideeffect "# reg use $0", "{a3}"(i32 %a3)
668 call void asm sideeffect "# reg use $0", "{a4}"(i32 %a4)
669 call void asm sideeffect "# reg use $0", "{a5}"(i32 %a5)
670 call void asm sideeffect "# reg use $0", "{a6}"(i32 %a6)
671 call void asm sideeffect "# reg use $0", "{a7}"(i32 %a7)
672 call void asm sideeffect "# reg use $0", "{s2}"(i32 %s2)
673 call void asm sideeffect "# reg use $0", "{s3}"(i32 %s3)
674 call void asm sideeffect "# reg use $0", "{s4}"(i32 %s4)
675 call void asm sideeffect "# reg use $0", "{s5}"(i32 %s5)
676 call void asm sideeffect "# reg use $0", "{s6}"(i32 %s6)
677 call void asm sideeffect "# reg use $0", "{s7}"(i32 %s7)
678 call void asm sideeffect "# reg use $0", "{s8}"(i32 %s8)
679 call void asm sideeffect "# reg use $0", "{s9}"(i32 %s9)
680 call void asm sideeffect "# reg use $0", "{s10}"(i32 %s10)
681 call void asm sideeffect "# reg use $0", "{s11}"(i32 %s11)
682 call void asm sideeffect "# reg use $0", "{t3}"(i32 %t3)
683 call void asm sideeffect "# reg use $0", "{t4}"(i32 %t4)
684 call void asm sideeffect "# reg use $0", "{t5}"(i32 %t5)
685 call void asm sideeffect "# reg use $0", "{t6}"(i32 %t6)
687 ret void
688 }
690 define void @relax_jal_spill_64() {
691 ; CHECK-RV64-LABEL: relax_jal_spill_64:
692 ; CHECK-RV64: # %bb.0:
693 ; CHECK-RV64-NEXT: addi sp, sp, -112
694 ; CHECK-RV64-NEXT: .cfi_def_cfa_offset 112
695 ; CHECK-RV64-NEXT: sd ra, 104(sp) # 8-byte Folded Spill
696 ; CHECK-RV64-NEXT: sd s0, 96(sp) # 8-byte Folded Spill
697 ; CHECK-RV64-NEXT: sd s1, 88(sp) # 8-byte Folded Spill
698 ; CHECK-RV64-NEXT: sd s2, 80(sp) # 8-byte Folded Spill
699 ; CHECK-RV64-NEXT: sd s3, 72(sp) # 8-byte Folded Spill
700 ; CHECK-RV64-NEXT: sd s4, 64(sp) # 8-byte Folded Spill
701 ; CHECK-RV64-NEXT: sd s5, 56(sp) # 8-byte Folded Spill
702 ; CHECK-RV64-NEXT: sd s6, 48(sp) # 8-byte Folded Spill
703 ; CHECK-RV64-NEXT: sd s7, 40(sp) # 8-byte Folded Spill
704 ; CHECK-RV64-NEXT: sd s8, 32(sp) # 8-byte Folded Spill
705 ; CHECK-RV64-NEXT: sd s9, 24(sp) # 8-byte Folded Spill
706 ; CHECK-RV64-NEXT: sd s10, 16(sp) # 8-byte Folded Spill
707 ; CHECK-RV64-NEXT: sd s11, 8(sp) # 8-byte Folded Spill
708 ; CHECK-RV64-NEXT: .cfi_offset ra, -8
709 ; CHECK-RV64-NEXT: .cfi_offset s0, -16
710 ; CHECK-RV64-NEXT: .cfi_offset s1, -24
711 ; CHECK-RV64-NEXT: .cfi_offset s2, -32
712 ; CHECK-RV64-NEXT: .cfi_offset s3, -40
713 ; CHECK-RV64-NEXT: .cfi_offset s4, -48
714 ; CHECK-RV64-NEXT: .cfi_offset s5, -56
715 ; CHECK-RV64-NEXT: .cfi_offset s6, -64
716 ; CHECK-RV64-NEXT: .cfi_offset s7, -72
717 ; CHECK-RV64-NEXT: .cfi_offset s8, -80
718 ; CHECK-RV64-NEXT: .cfi_offset s9, -88
719 ; CHECK-RV64-NEXT: .cfi_offset s10, -96
720 ; CHECK-RV64-NEXT: .cfi_offset s11, -104
721 ; CHECK-RV64-NEXT: #APP
722 ; CHECK-RV64-NEXT: li ra, 1
723 ; CHECK-RV64-NEXT: #NO_APP
724 ; CHECK-RV64-NEXT: #APP
725 ; CHECK-RV64-NEXT: li t0, 5
726 ; CHECK-RV64-NEXT: #NO_APP
727 ; CHECK-RV64-NEXT: #APP
728 ; CHECK-RV64-NEXT: li t1, 6
729 ; CHECK-RV64-NEXT: #NO_APP
730 ; CHECK-RV64-NEXT: #APP
731 ; CHECK-RV64-NEXT: li t2, 7
732 ; CHECK-RV64-NEXT: #NO_APP
733 ; CHECK-RV64-NEXT: #APP
734 ; CHECK-RV64-NEXT: li s0, 8
735 ; CHECK-RV64-NEXT: #NO_APP
736 ; CHECK-RV64-NEXT: #APP
737 ; CHECK-RV64-NEXT: li s1, 9
738 ; CHECK-RV64-NEXT: #NO_APP
739 ; CHECK-RV64-NEXT: #APP
740 ; CHECK-RV64-NEXT: li a0, 10
741 ; CHECK-RV64-NEXT: #NO_APP
742 ; CHECK-RV64-NEXT: #APP
743 ; CHECK-RV64-NEXT: li a1, 11
744 ; CHECK-RV64-NEXT: #NO_APP
745 ; CHECK-RV64-NEXT: #APP
746 ; CHECK-RV64-NEXT: li a2, 12
747 ; CHECK-RV64-NEXT: #NO_APP
748 ; CHECK-RV64-NEXT: #APP
749 ; CHECK-RV64-NEXT: li a3, 13
750 ; CHECK-RV64-NEXT: #NO_APP
751 ; CHECK-RV64-NEXT: #APP
752 ; CHECK-RV64-NEXT: li a4, 14
753 ; CHECK-RV64-NEXT: #NO_APP
754 ; CHECK-RV64-NEXT: #APP
755 ; CHECK-RV64-NEXT: li a5, 15
756 ; CHECK-RV64-NEXT: #NO_APP
757 ; CHECK-RV64-NEXT: #APP
758 ; CHECK-RV64-NEXT: li a6, 16
759 ; CHECK-RV64-NEXT: #NO_APP
760 ; CHECK-RV64-NEXT: #APP
761 ; CHECK-RV64-NEXT: li a7, 17
762 ; CHECK-RV64-NEXT: #NO_APP
763 ; CHECK-RV64-NEXT: #APP
764 ; CHECK-RV64-NEXT: li s2, 18
765 ; CHECK-RV64-NEXT: #NO_APP
766 ; CHECK-RV64-NEXT: #APP
767 ; CHECK-RV64-NEXT: li s3, 19
768 ; CHECK-RV64-NEXT: #NO_APP
769 ; CHECK-RV64-NEXT: #APP
770 ; CHECK-RV64-NEXT: li s4, 20
771 ; CHECK-RV64-NEXT: #NO_APP
772 ; CHECK-RV64-NEXT: #APP
773 ; CHECK-RV64-NEXT: li s5, 21
774 ; CHECK-RV64-NEXT: #NO_APP
775 ; CHECK-RV64-NEXT: #APP
776 ; CHECK-RV64-NEXT: li s6, 22
777 ; CHECK-RV64-NEXT: #NO_APP
778 ; CHECK-RV64-NEXT: #APP
779 ; CHECK-RV64-NEXT: li s7, 23
780 ; CHECK-RV64-NEXT: #NO_APP
781 ; CHECK-RV64-NEXT: #APP
782 ; CHECK-RV64-NEXT: li s8, 24
783 ; CHECK-RV64-NEXT: #NO_APP
784 ; CHECK-RV64-NEXT: #APP
785 ; CHECK-RV64-NEXT: li s9, 25
786 ; CHECK-RV64-NEXT: #NO_APP
787 ; CHECK-RV64-NEXT: #APP
788 ; CHECK-RV64-NEXT: li s10, 26
789 ; CHECK-RV64-NEXT: #NO_APP
790 ; CHECK-RV64-NEXT: #APP
791 ; CHECK-RV64-NEXT: li s11, 27
792 ; CHECK-RV64-NEXT: #NO_APP
793 ; CHECK-RV64-NEXT: #APP
794 ; CHECK-RV64-NEXT: li t3, 28
795 ; CHECK-RV64-NEXT: #NO_APP
796 ; CHECK-RV64-NEXT: #APP
797 ; CHECK-RV64-NEXT: li t4, 29
798 ; CHECK-RV64-NEXT: #NO_APP
799 ; CHECK-RV64-NEXT: #APP
800 ; CHECK-RV64-NEXT: li t5, 30
801 ; CHECK-RV64-NEXT: #NO_APP
802 ; CHECK-RV64-NEXT: #APP
803 ; CHECK-RV64-NEXT: li t6, 31
804 ; CHECK-RV64-NEXT: #NO_APP
805 ; CHECK-RV64-NEXT: beq t5, t6, .LBB4_1
806 ; CHECK-RV64-NEXT: # %bb.3:
807 ; CHECK-RV64-NEXT: sd s11, 0(sp)
808 ; CHECK-RV64-NEXT: jump .LBB4_4, s11
809 ; CHECK-RV64-NEXT: .LBB4_1: # %branch_1
810 ; CHECK-RV64-NEXT: #APP
811 ; CHECK-RV64-NEXT: .zero 1048576
812 ; CHECK-RV64-NEXT: #NO_APP
813 ; CHECK-RV64-NEXT: j .LBB4_2
814 ; CHECK-RV64-NEXT: .LBB4_4: # %branch_2
815 ; CHECK-RV64-NEXT: ld s11, 0(sp)
816 ; CHECK-RV64-NEXT: .LBB4_2: # %branch_2
817 ; CHECK-RV64-NEXT: #APP
818 ; CHECK-RV64-NEXT: # reg use ra
819 ; CHECK-RV64-NEXT: #NO_APP
820 ; CHECK-RV64-NEXT: #APP
821 ; CHECK-RV64-NEXT: # reg use t0
822 ; CHECK-RV64-NEXT: #NO_APP
823 ; CHECK-RV64-NEXT: #APP
824 ; CHECK-RV64-NEXT: # reg use t1
825 ; CHECK-RV64-NEXT: #NO_APP
826 ; CHECK-RV64-NEXT: #APP
827 ; CHECK-RV64-NEXT: # reg use t2
828 ; CHECK-RV64-NEXT: #NO_APP
829 ; CHECK-RV64-NEXT: #APP
830 ; CHECK-RV64-NEXT: # reg use s0
831 ; CHECK-RV64-NEXT: #NO_APP
832 ; CHECK-RV64-NEXT: #APP
833 ; CHECK-RV64-NEXT: # reg use s1
834 ; CHECK-RV64-NEXT: #NO_APP
835 ; CHECK-RV64-NEXT: #APP
836 ; CHECK-RV64-NEXT: # reg use a0
837 ; CHECK-RV64-NEXT: #NO_APP
838 ; CHECK-RV64-NEXT: #APP
839 ; CHECK-RV64-NEXT: # reg use a1
840 ; CHECK-RV64-NEXT: #NO_APP
841 ; CHECK-RV64-NEXT: #APP
842 ; CHECK-RV64-NEXT: # reg use a2
843 ; CHECK-RV64-NEXT: #NO_APP
844 ; CHECK-RV64-NEXT: #APP
845 ; CHECK-RV64-NEXT: # reg use a3
846 ; CHECK-RV64-NEXT: #NO_APP
847 ; CHECK-RV64-NEXT: #APP
848 ; CHECK-RV64-NEXT: # reg use a4
849 ; CHECK-RV64-NEXT: #NO_APP
850 ; CHECK-RV64-NEXT: #APP
851 ; CHECK-RV64-NEXT: # reg use a5
852 ; CHECK-RV64-NEXT: #NO_APP
853 ; CHECK-RV64-NEXT: #APP
854 ; CHECK-RV64-NEXT: # reg use a6
855 ; CHECK-RV64-NEXT: #NO_APP
856 ; CHECK-RV64-NEXT: #APP
857 ; CHECK-RV64-NEXT: # reg use a7
858 ; CHECK-RV64-NEXT: #NO_APP
859 ; CHECK-RV64-NEXT: #APP
860 ; CHECK-RV64-NEXT: # reg use s2
861 ; CHECK-RV64-NEXT: #NO_APP
862 ; CHECK-RV64-NEXT: #APP
863 ; CHECK-RV64-NEXT: # reg use s3
864 ; CHECK-RV64-NEXT: #NO_APP
865 ; CHECK-RV64-NEXT: #APP
866 ; CHECK-RV64-NEXT: # reg use s4
867 ; CHECK-RV64-NEXT: #NO_APP
868 ; CHECK-RV64-NEXT: #APP
869 ; CHECK-RV64-NEXT: # reg use s5
870 ; CHECK-RV64-NEXT: #NO_APP
871 ; CHECK-RV64-NEXT: #APP
872 ; CHECK-RV64-NEXT: # reg use s6
873 ; CHECK-RV64-NEXT: #NO_APP
874 ; CHECK-RV64-NEXT: #APP
875 ; CHECK-RV64-NEXT: # reg use s7
876 ; CHECK-RV64-NEXT: #NO_APP
877 ; CHECK-RV64-NEXT: #APP
878 ; CHECK-RV64-NEXT: # reg use s8
879 ; CHECK-RV64-NEXT: #NO_APP
880 ; CHECK-RV64-NEXT: #APP
881 ; CHECK-RV64-NEXT: # reg use s9
882 ; CHECK-RV64-NEXT: #NO_APP
883 ; CHECK-RV64-NEXT: #APP
884 ; CHECK-RV64-NEXT: # reg use s10
885 ; CHECK-RV64-NEXT: #NO_APP
886 ; CHECK-RV64-NEXT: #APP
887 ; CHECK-RV64-NEXT: # reg use s11
888 ; CHECK-RV64-NEXT: #NO_APP
889 ; CHECK-RV64-NEXT: #APP
890 ; CHECK-RV64-NEXT: # reg use t3
891 ; CHECK-RV64-NEXT: #NO_APP
892 ; CHECK-RV64-NEXT: #APP
893 ; CHECK-RV64-NEXT: # reg use t4
894 ; CHECK-RV64-NEXT: #NO_APP
895 ; CHECK-RV64-NEXT: #APP
896 ; CHECK-RV64-NEXT: # reg use t5
897 ; CHECK-RV64-NEXT: #NO_APP
898 ; CHECK-RV64-NEXT: #APP
899 ; CHECK-RV64-NEXT: # reg use t6
900 ; CHECK-RV64-NEXT: #NO_APP
901 ; CHECK-RV64-NEXT: ld ra, 104(sp) # 8-byte Folded Reload
902 ; CHECK-RV64-NEXT: ld s0, 96(sp) # 8-byte Folded Reload
903 ; CHECK-RV64-NEXT: ld s1, 88(sp) # 8-byte Folded Reload
904 ; CHECK-RV64-NEXT: ld s2, 80(sp) # 8-byte Folded Reload
905 ; CHECK-RV64-NEXT: ld s3, 72(sp) # 8-byte Folded Reload
906 ; CHECK-RV64-NEXT: ld s4, 64(sp) # 8-byte Folded Reload
907 ; CHECK-RV64-NEXT: ld s5, 56(sp) # 8-byte Folded Reload
908 ; CHECK-RV64-NEXT: ld s6, 48(sp) # 8-byte Folded Reload
909 ; CHECK-RV64-NEXT: ld s7, 40(sp) # 8-byte Folded Reload
910 ; CHECK-RV64-NEXT: ld s8, 32(sp) # 8-byte Folded Reload
911 ; CHECK-RV64-NEXT: ld s9, 24(sp) # 8-byte Folded Reload
912 ; CHECK-RV64-NEXT: ld s10, 16(sp) # 8-byte Folded Reload
913 ; CHECK-RV64-NEXT: ld s11, 8(sp) # 8-byte Folded Reload
914 ; CHECK-RV64-NEXT: addi sp, sp, 112
915 ; CHECK-RV64-NEXT: ret
917 %ra = call i64 asm sideeffect "addi ra, x0, 1", "={ra}"()
918 %t0 = call i64 asm sideeffect "addi t0, x0, 5", "={t0}"()
919 %t1 = call i64 asm sideeffect "addi t1, x0, 6", "={t1}"()
920 %t2 = call i64 asm sideeffect "addi t2, x0, 7", "={t2}"()
921 %s0 = call i64 asm sideeffect "addi s0, x0, 8", "={s0}"()
922 %s1 = call i64 asm sideeffect "addi s1, x0, 9", "={s1}"()
923 %a0 = call i64 asm sideeffect "addi a0, x0, 10", "={a0}"()
924 %a1 = call i64 asm sideeffect "addi a1, x0, 11", "={a1}"()
925 %a2 = call i64 asm sideeffect "addi a2, x0, 12", "={a2}"()
926 %a3 = call i64 asm sideeffect "addi a3, x0, 13", "={a3}"()
927 %a4 = call i64 asm sideeffect "addi a4, x0, 14", "={a4}"()
928 %a5 = call i64 asm sideeffect "addi a5, x0, 15", "={a5}"()
929 %a6 = call i64 asm sideeffect "addi a6, x0, 16", "={a6}"()
930 %a7 = call i64 asm sideeffect "addi a7, x0, 17", "={a7}"()
931 %s2 = call i64 asm sideeffect "addi s2, x0, 18", "={s2}"()
932 %s3 = call i64 asm sideeffect "addi s3, x0, 19", "={s3}"()
933 %s4 = call i64 asm sideeffect "addi s4, x0, 20", "={s4}"()
934 %s5 = call i64 asm sideeffect "addi s5, x0, 21", "={s5}"()
935 %s6 = call i64 asm sideeffect "addi s6, x0, 22", "={s6}"()
936 %s7 = call i64 asm sideeffect "addi s7, x0, 23", "={s7}"()
937 %s8 = call i64 asm sideeffect "addi s8, x0, 24", "={s8}"()
938 %s9 = call i64 asm sideeffect "addi s9, x0, 25", "={s9}"()
939 %s10 = call i64 asm sideeffect "addi s10, x0, 26", "={s10}"()
940 %s11 = call i64 asm sideeffect "addi s11, x0, 27", "={s11}"()
941 %t3 = call i64 asm sideeffect "addi t3, x0, 28", "={t3}"()
942 %t4 = call i64 asm sideeffect "addi t4, x0, 29", "={t4}"()
943 %t5 = call i64 asm sideeffect "addi t5, x0, 30", "={t5}"()
944 %t6 = call i64 asm sideeffect "addi t6, x0, 31", "={t6}"()
946 %cmp = icmp eq i64 %t5, %t6
947 br i1 %cmp, label %branch_1, label %branch_2
949 branch_1:
950 call void asm sideeffect ".space 1048576", ""()
951 br label %branch_2
953 branch_2:
954 call void asm sideeffect "# reg use $0", "{ra}"(i64 %ra)
955 call void asm sideeffect "# reg use $0", "{t0}"(i64 %t0)
956 call void asm sideeffect "# reg use $0", "{t1}"(i64 %t1)
957 call void asm sideeffect "# reg use $0", "{t2}"(i64 %t2)
958 call void asm sideeffect "# reg use $0", "{s0}"(i64 %s0)
959 call void asm sideeffect "# reg use $0", "{s1}"(i64 %s1)
960 call void asm sideeffect "# reg use $0", "{a0}"(i64 %a0)
961 call void asm sideeffect "# reg use $0", "{a1}"(i64 %a1)
962 call void asm sideeffect "# reg use $0", "{a2}"(i64 %a2)
963 call void asm sideeffect "# reg use $0", "{a3}"(i64 %a3)
964 call void asm sideeffect "# reg use $0", "{a4}"(i64 %a4)
965 call void asm sideeffect "# reg use $0", "{a5}"(i64 %a5)
966 call void asm sideeffect "# reg use $0", "{a6}"(i64 %a6)
967 call void asm sideeffect "# reg use $0", "{a7}"(i64 %a7)
968 call void asm sideeffect "# reg use $0", "{s2}"(i64 %s2)
969 call void asm sideeffect "# reg use $0", "{s3}"(i64 %s3)
970 call void asm sideeffect "# reg use $0", "{s4}"(i64 %s4)
971 call void asm sideeffect "# reg use $0", "{s5}"(i64 %s5)
972 call void asm sideeffect "# reg use $0", "{s6}"(i64 %s6)
973 call void asm sideeffect "# reg use $0", "{s7}"(i64 %s7)
974 call void asm sideeffect "# reg use $0", "{s8}"(i64 %s8)
975 call void asm sideeffect "# reg use $0", "{s9}"(i64 %s9)
976 call void asm sideeffect "# reg use $0", "{s10}"(i64 %s10)
977 call void asm sideeffect "# reg use $0", "{s11}"(i64 %s11)
978 call void asm sideeffect "# reg use $0", "{t3}"(i64 %t3)
979 call void asm sideeffect "# reg use $0", "{t4}"(i64 %t4)
980 call void asm sideeffect "# reg use $0", "{t5}"(i64 %t5)
981 call void asm sideeffect "# reg use $0", "{t6}"(i64 %t6)
983 ret void
984 }
986 define void @relax_jal_spill_64_adjust_spill_slot() {
987 ; CHECK-RV64-LABEL: relax_jal_spill_64_adjust_spill_slot:
988 ; CHECK-RV64: # %bb.0:
989 ; CHECK-RV64-NEXT: addi sp, sp, -2032
990 ; CHECK-RV64-NEXT: .cfi_def_cfa_offset 2032
991 ; CHECK-RV64-NEXT: sd ra, 2024(sp) # 8-byte Folded Spill
992 ; CHECK-RV64-NEXT: sd s0, 2016(sp) # 8-byte Folded Spill
993 ; CHECK-RV64-NEXT: sd s1, 2008(sp) # 8-byte Folded Spill
994 ; CHECK-RV64-NEXT: sd s2, 2000(sp) # 8-byte Folded Spill
995 ; CHECK-RV64-NEXT: sd s3, 1992(sp) # 8-byte Folded Spill
996 ; CHECK-RV64-NEXT: sd s4, 1984(sp) # 8-byte Folded Spill
997 ; CHECK-RV64-NEXT: sd s5, 1976(sp) # 8-byte Folded Spill
998 ; CHECK-RV64-NEXT: sd s6, 1968(sp) # 8-byte Folded Spill
999 ; CHECK-RV64-NEXT: sd s7, 1960(sp) # 8-byte Folded Spill
1000 ; CHECK-RV64-NEXT: sd s8, 1952(sp) # 8-byte Folded Spill
1001 ; CHECK-RV64-NEXT: sd s9, 1944(sp) # 8-byte Folded Spill
1002 ; CHECK-RV64-NEXT: sd s10, 1936(sp) # 8-byte Folded Spill
1003 ; CHECK-RV64-NEXT: sd s11, 1928(sp) # 8-byte Folded Spill
1004 ; CHECK-RV64-NEXT: .cfi_offset ra, -8
1005 ; CHECK-RV64-NEXT: .cfi_offset s0, -16
1006 ; CHECK-RV64-NEXT: .cfi_offset s1, -24
1007 ; CHECK-RV64-NEXT: .cfi_offset s2, -32
1008 ; CHECK-RV64-NEXT: .cfi_offset s3, -40
1009 ; CHECK-RV64-NEXT: .cfi_offset s4, -48
1010 ; CHECK-RV64-NEXT: .cfi_offset s5, -56
1011 ; CHECK-RV64-NEXT: .cfi_offset s6, -64
1012 ; CHECK-RV64-NEXT: .cfi_offset s7, -72
1013 ; CHECK-RV64-NEXT: .cfi_offset s8, -80
1014 ; CHECK-RV64-NEXT: .cfi_offset s9, -88
1015 ; CHECK-RV64-NEXT: .cfi_offset s10, -96
1016 ; CHECK-RV64-NEXT: .cfi_offset s11, -104
1017 ; CHECK-RV64-NEXT: addi s0, sp, 2032
1018 ; CHECK-RV64-NEXT: .cfi_def_cfa s0, 0
1019 ; CHECK-RV64-NEXT: lui a0, 2
1020 ; CHECK-RV64-NEXT: addiw a0, a0, -2032
1021 ; CHECK-RV64-NEXT: sub sp, sp, a0
1022 ; CHECK-RV64-NEXT: srli a0, sp, 12
1023 ; CHECK-RV64-NEXT: slli sp, a0, 12
1024 ; CHECK-RV64-NEXT: #APP
1025 ; CHECK-RV64-NEXT: li ra, 1
1026 ; CHECK-RV64-NEXT: #NO_APP
1027 ; CHECK-RV64-NEXT: #APP
1028 ; CHECK-RV64-NEXT: li t0, 5
1029 ; CHECK-RV64-NEXT: #NO_APP
1030 ; CHECK-RV64-NEXT: #APP
1031 ; CHECK-RV64-NEXT: li t1, 6
1032 ; CHECK-RV64-NEXT: #NO_APP
1033 ; CHECK-RV64-NEXT: #APP
1034 ; CHECK-RV64-NEXT: li t2, 7
1035 ; CHECK-RV64-NEXT: #NO_APP
1036 ; CHECK-RV64-NEXT: #APP
1037 ; CHECK-RV64-NEXT: li s0, 8
1038 ; CHECK-RV64-NEXT: #NO_APP
1039 ; CHECK-RV64-NEXT: #APP
1040 ; CHECK-RV64-NEXT: li s1, 9
1041 ; CHECK-RV64-NEXT: #NO_APP
1042 ; CHECK-RV64-NEXT: #APP
1043 ; CHECK-RV64-NEXT: li a0, 10
1044 ; CHECK-RV64-NEXT: #NO_APP
1045 ; CHECK-RV64-NEXT: #APP
1046 ; CHECK-RV64-NEXT: li a1, 11
1047 ; CHECK-RV64-NEXT: #NO_APP
1048 ; CHECK-RV64-NEXT: #APP
1049 ; CHECK-RV64-NEXT: li a2, 12
1050 ; CHECK-RV64-NEXT: #NO_APP
1051 ; CHECK-RV64-NEXT: #APP
1052 ; CHECK-RV64-NEXT: li a3, 13
1053 ; CHECK-RV64-NEXT: #NO_APP
1054 ; CHECK-RV64-NEXT: #APP
1055 ; CHECK-RV64-NEXT: li a4, 14
1056 ; CHECK-RV64-NEXT: #NO_APP
1057 ; CHECK-RV64-NEXT: #APP
1058 ; CHECK-RV64-NEXT: li a5, 15
1059 ; CHECK-RV64-NEXT: #NO_APP
1060 ; CHECK-RV64-NEXT: #APP
1061 ; CHECK-RV64-NEXT: li a6, 16
1062 ; CHECK-RV64-NEXT: #NO_APP
1063 ; CHECK-RV64-NEXT: #APP
1064 ; CHECK-RV64-NEXT: li a7, 17
1065 ; CHECK-RV64-NEXT: #NO_APP
1066 ; CHECK-RV64-NEXT: #APP
1067 ; CHECK-RV64-NEXT: li s2, 18
1068 ; CHECK-RV64-NEXT: #NO_APP
1069 ; CHECK-RV64-NEXT: #APP
1070 ; CHECK-RV64-NEXT: li s3, 19
1071 ; CHECK-RV64-NEXT: #NO_APP
1072 ; CHECK-RV64-NEXT: #APP
1073 ; CHECK-RV64-NEXT: li s4, 20
1074 ; CHECK-RV64-NEXT: #NO_APP
1075 ; CHECK-RV64-NEXT: #APP
1076 ; CHECK-RV64-NEXT: li s5, 21
1077 ; CHECK-RV64-NEXT: #NO_APP
1078 ; CHECK-RV64-NEXT: #APP
1079 ; CHECK-RV64-NEXT: li s6, 22
1080 ; CHECK-RV64-NEXT: #NO_APP
1081 ; CHECK-RV64-NEXT: #APP
1082 ; CHECK-RV64-NEXT: li s7, 23
1083 ; CHECK-RV64-NEXT: #NO_APP
1084 ; CHECK-RV64-NEXT: #APP
1085 ; CHECK-RV64-NEXT: li s8, 24
1086 ; CHECK-RV64-NEXT: #NO_APP
1087 ; CHECK-RV64-NEXT: #APP
1088 ; CHECK-RV64-NEXT: li s9, 25
1089 ; CHECK-RV64-NEXT: #NO_APP
1090 ; CHECK-RV64-NEXT: #APP
1091 ; CHECK-RV64-NEXT: li s10, 26
1092 ; CHECK-RV64-NEXT: #NO_APP
1093 ; CHECK-RV64-NEXT: #APP
1094 ; CHECK-RV64-NEXT: li s11, 27
1095 ; CHECK-RV64-NEXT: #NO_APP
1096 ; CHECK-RV64-NEXT: #APP
1097 ; CHECK-RV64-NEXT: li t3, 28
1098 ; CHECK-RV64-NEXT: #NO_APP
1099 ; CHECK-RV64-NEXT: #APP
1100 ; CHECK-RV64-NEXT: li t4, 29
1101 ; CHECK-RV64-NEXT: #NO_APP
1102 ; CHECK-RV64-NEXT: #APP
1103 ; CHECK-RV64-NEXT: li t5, 30
1104 ; CHECK-RV64-NEXT: #NO_APP
1105 ; CHECK-RV64-NEXT: #APP
1106 ; CHECK-RV64-NEXT: li t6, 31
1107 ; CHECK-RV64-NEXT: #NO_APP
1108 ; CHECK-RV64-NEXT: beq t5, t6, .LBB5_1
1109 ; CHECK-RV64-NEXT: # %bb.3:
1110 ; CHECK-RV64-NEXT: sd s11, 0(sp)
1111 ; CHECK-RV64-NEXT: jump .LBB5_4, s11
1112 ; CHECK-RV64-NEXT: .LBB5_1: # %branch_1
1113 ; CHECK-RV64-NEXT: #APP
1114 ; CHECK-RV64-NEXT: .zero 1048576
1115 ; CHECK-RV64-NEXT: #NO_APP
1116 ; CHECK-RV64-NEXT: j .LBB5_2
1117 ; CHECK-RV64-NEXT: .LBB5_4: # %branch_2
1118 ; CHECK-RV64-NEXT: ld s11, 0(sp)
1119 ; CHECK-RV64-NEXT: .LBB5_2: # %branch_2
1120 ; CHECK-RV64-NEXT: #APP
1121 ; CHECK-RV64-NEXT: # reg use ra
1122 ; CHECK-RV64-NEXT: #NO_APP
1123 ; CHECK-RV64-NEXT: #APP
1124 ; CHECK-RV64-NEXT: # reg use t0
1125 ; CHECK-RV64-NEXT: #NO_APP
1126 ; CHECK-RV64-NEXT: #APP
1127 ; CHECK-RV64-NEXT: # reg use t1
1128 ; CHECK-RV64-NEXT: #NO_APP
1129 ; CHECK-RV64-NEXT: #APP
1130 ; CHECK-RV64-NEXT: # reg use t2
1131 ; CHECK-RV64-NEXT: #NO_APP
1132 ; CHECK-RV64-NEXT: #APP
1133 ; CHECK-RV64-NEXT: # reg use s0
1134 ; CHECK-RV64-NEXT: #NO_APP
1135 ; CHECK-RV64-NEXT: #APP
1136 ; CHECK-RV64-NEXT: # reg use s1
1137 ; CHECK-RV64-NEXT: #NO_APP
1138 ; CHECK-RV64-NEXT: #APP
1139 ; CHECK-RV64-NEXT: # reg use a0
1140 ; CHECK-RV64-NEXT: #NO_APP
1141 ; CHECK-RV64-NEXT: #APP
1142 ; CHECK-RV64-NEXT: # reg use a1
1143 ; CHECK-RV64-NEXT: #NO_APP
1144 ; CHECK-RV64-NEXT: #APP
1145 ; CHECK-RV64-NEXT: # reg use a2
1146 ; CHECK-RV64-NEXT: #NO_APP
1147 ; CHECK-RV64-NEXT: #APP
1148 ; CHECK-RV64-NEXT: # reg use a3
1149 ; CHECK-RV64-NEXT: #NO_APP
1150 ; CHECK-RV64-NEXT: #APP
1151 ; CHECK-RV64-NEXT: # reg use a4
1152 ; CHECK-RV64-NEXT: #NO_APP
1153 ; CHECK-RV64-NEXT: #APP
1154 ; CHECK-RV64-NEXT: # reg use a5
1155 ; CHECK-RV64-NEXT: #NO_APP
1156 ; CHECK-RV64-NEXT: #APP
1157 ; CHECK-RV64-NEXT: # reg use a6
1158 ; CHECK-RV64-NEXT: #NO_APP
1159 ; CHECK-RV64-NEXT: #APP
1160 ; CHECK-RV64-NEXT: # reg use a7
1161 ; CHECK-RV64-NEXT: #NO_APP
1162 ; CHECK-RV64-NEXT: #APP
1163 ; CHECK-RV64-NEXT: # reg use s2
1164 ; CHECK-RV64-NEXT: #NO_APP
1165 ; CHECK-RV64-NEXT: #APP
1166 ; CHECK-RV64-NEXT: # reg use s3
1167 ; CHECK-RV64-NEXT: #NO_APP
1168 ; CHECK-RV64-NEXT: #APP
1169 ; CHECK-RV64-NEXT: # reg use s4
1170 ; CHECK-RV64-NEXT: #NO_APP
1171 ; CHECK-RV64-NEXT: #APP
1172 ; CHECK-RV64-NEXT: # reg use s5
1173 ; CHECK-RV64-NEXT: #NO_APP
1174 ; CHECK-RV64-NEXT: #APP
1175 ; CHECK-RV64-NEXT: # reg use s6
1176 ; CHECK-RV64-NEXT: #NO_APP
1177 ; CHECK-RV64-NEXT: #APP
1178 ; CHECK-RV64-NEXT: # reg use s7
1179 ; CHECK-RV64-NEXT: #NO_APP
1180 ; CHECK-RV64-NEXT: #APP
1181 ; CHECK-RV64-NEXT: # reg use s8
1182 ; CHECK-RV64-NEXT: #NO_APP
1183 ; CHECK-RV64-NEXT: #APP
1184 ; CHECK-RV64-NEXT: # reg use s9
1185 ; CHECK-RV64-NEXT: #NO_APP
1186 ; CHECK-RV64-NEXT: #APP
1187 ; CHECK-RV64-NEXT: # reg use s10
1188 ; CHECK-RV64-NEXT: #NO_APP
1189 ; CHECK-RV64-NEXT: #APP
1190 ; CHECK-RV64-NEXT: # reg use s11
1191 ; CHECK-RV64-NEXT: #NO_APP
1192 ; CHECK-RV64-NEXT: #APP
1193 ; CHECK-RV64-NEXT: # reg use t3
1194 ; CHECK-RV64-NEXT: #NO_APP
1195 ; CHECK-RV64-NEXT: #APP
1196 ; CHECK-RV64-NEXT: # reg use t4
1197 ; CHECK-RV64-NEXT: #NO_APP
1198 ; CHECK-RV64-NEXT: #APP
1199 ; CHECK-RV64-NEXT: # reg use t5
1200 ; CHECK-RV64-NEXT: #NO_APP
1201 ; CHECK-RV64-NEXT: #APP
1202 ; CHECK-RV64-NEXT: # reg use t6
1203 ; CHECK-RV64-NEXT: #NO_APP
1204 ; CHECK-RV64-NEXT: lui a0, 2
1205 ; CHECK-RV64-NEXT: sub sp, s0, a0
1206 ; CHECK-RV64-NEXT: lui a0, 2
1207 ; CHECK-RV64-NEXT: addiw a0, a0, -2032
1208 ; CHECK-RV64-NEXT: add sp, sp, a0
1209 ; CHECK-RV64-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
1210 ; CHECK-RV64-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
1211 ; CHECK-RV64-NEXT: ld s1, 2008(sp) # 8-byte Folded Reload
1212 ; CHECK-RV64-NEXT: ld s2, 2000(sp) # 8-byte Folded Reload
1213 ; CHECK-RV64-NEXT: ld s3, 1992(sp) # 8-byte Folded Reload
1214 ; CHECK-RV64-NEXT: ld s4, 1984(sp) # 8-byte Folded Reload
1215 ; CHECK-RV64-NEXT: ld s5, 1976(sp) # 8-byte Folded Reload
1216 ; CHECK-RV64-NEXT: ld s6, 1968(sp) # 8-byte Folded Reload
1217 ; CHECK-RV64-NEXT: ld s7, 1960(sp) # 8-byte Folded Reload
1218 ; CHECK-RV64-NEXT: ld s8, 1952(sp) # 8-byte Folded Reload
1219 ; CHECK-RV64-NEXT: ld s9, 1944(sp) # 8-byte Folded Reload
1220 ; CHECK-RV64-NEXT: ld s10, 1936(sp) # 8-byte Folded Reload
1221 ; CHECK-RV64-NEXT: ld s11, 1928(sp) # 8-byte Folded Reload
1222 ; CHECK-RV64-NEXT: addi sp, sp, 2032
1223 ; CHECK-RV64-NEXT: ret
1225 ; If the stack is large and the offset of BranchRelaxationScratchFrameIndex
1226 ; is out the range of 12-bit signed integer, check whether the spill slot is
1227 ; adjusted to close to the stack base register.
1228 %stack_obj = alloca i64, align 4096
1230 %ra = call i64 asm sideeffect "addi ra, x0, 1", "={ra}"()
1231 %t0 = call i64 asm sideeffect "addi t0, x0, 5", "={t0}"()
1232 %t1 = call i64 asm sideeffect "addi t1, x0, 6", "={t1}"()
1233 %t2 = call i64 asm sideeffect "addi t2, x0, 7", "={t2}"()
1234 %s0 = call i64 asm sideeffect "addi s0, x0, 8", "={s0}"()
1235 %s1 = call i64 asm sideeffect "addi s1, x0, 9", "={s1}"()
1236 %a0 = call i64 asm sideeffect "addi a0, x0, 10", "={a0}"()
1237 %a1 = call i64 asm sideeffect "addi a1, x0, 11", "={a1}"()
1238 %a2 = call i64 asm sideeffect "addi a2, x0, 12", "={a2}"()
1239 %a3 = call i64 asm sideeffect "addi a3, x0, 13", "={a3}"()
1240 %a4 = call i64 asm sideeffect "addi a4, x0, 14", "={a4}"()
1241 %a5 = call i64 asm sideeffect "addi a5, x0, 15", "={a5}"()
1242 %a6 = call i64 asm sideeffect "addi a6, x0, 16", "={a6}"()
1243 %a7 = call i64 asm sideeffect "addi a7, x0, 17", "={a7}"()
1244 %s2 = call i64 asm sideeffect "addi s2, x0, 18", "={s2}"()
1245 %s3 = call i64 asm sideeffect "addi s3, x0, 19", "={s3}"()
1246 %s4 = call i64 asm sideeffect "addi s4, x0, 20", "={s4}"()
1247 %s5 = call i64 asm sideeffect "addi s5, x0, 21", "={s5}"()
1248 %s6 = call i64 asm sideeffect "addi s6, x0, 22", "={s6}"()
1249 %s7 = call i64 asm sideeffect "addi s7, x0, 23", "={s7}"()
1250 %s8 = call i64 asm sideeffect "addi s8, x0, 24", "={s8}"()
1251 %s9 = call i64 asm sideeffect "addi s9, x0, 25", "={s9}"()
1252 %s10 = call i64 asm sideeffect "addi s10, x0, 26", "={s10}"()
1253 %s11 = call i64 asm sideeffect "addi s11, x0, 27", "={s11}"()
1254 %t3 = call i64 asm sideeffect "addi t3, x0, 28", "={t3}"()
1255 %t4 = call i64 asm sideeffect "addi t4, x0, 29", "={t4}"()
1256 %t5 = call i64 asm sideeffect "addi t5, x0, 30", "={t5}"()
1257 %t6 = call i64 asm sideeffect "addi t6, x0, 31", "={t6}"()
1259 %cmp = icmp eq i64 %t5, %t6
1260 br i1 %cmp, label %branch_1, label %branch_2
1262 branch_1:
1263 call void asm sideeffect ".space 1048576", ""()
1264 br label %branch_2
1266 branch_2:
1267 call void asm sideeffect "# reg use $0", "{ra}"(i64 %ra)
1268 call void asm sideeffect "# reg use $0", "{t0}"(i64 %t0)
1269 call void asm sideeffect "# reg use $0", "{t1}"(i64 %t1)
1270 call void asm sideeffect "# reg use $0", "{t2}"(i64 %t2)
1271 call void asm sideeffect "# reg use $0", "{s0}"(i64 %s0)
1272 call void asm sideeffect "# reg use $0", "{s1}"(i64 %s1)
1273 call void asm sideeffect "# reg use $0", "{a0}"(i64 %a0)
1274 call void asm sideeffect "# reg use $0", "{a1}"(i64 %a1)
1275 call void asm sideeffect "# reg use $0", "{a2}"(i64 %a2)
1276 call void asm sideeffect "# reg use $0", "{a3}"(i64 %a3)
1277 call void asm sideeffect "# reg use $0", "{a4}"(i64 %a4)
1278 call void asm sideeffect "# reg use $0", "{a5}"(i64 %a5)
1279 call void asm sideeffect "# reg use $0", "{a6}"(i64 %a6)
1280 call void asm sideeffect "# reg use $0", "{a7}"(i64 %a7)
1281 call void asm sideeffect "# reg use $0", "{s2}"(i64 %s2)
1282 call void asm sideeffect "# reg use $0", "{s3}"(i64 %s3)
1283 call void asm sideeffect "# reg use $0", "{s4}"(i64 %s4)
1284 call void asm sideeffect "# reg use $0", "{s5}"(i64 %s5)
1285 call void asm sideeffect "# reg use $0", "{s6}"(i64 %s6)
1286 call void asm sideeffect "# reg use $0", "{s7}"(i64 %s7)
1287 call void asm sideeffect "# reg use $0", "{s8}"(i64 %s8)
1288 call void asm sideeffect "# reg use $0", "{s9}"(i64 %s9)
1289 call void asm sideeffect "# reg use $0", "{s10}"(i64 %s10)
1290 call void asm sideeffect "# reg use $0", "{s11}"(i64 %s11)
1291 call void asm sideeffect "# reg use $0", "{t3}"(i64 %t3)
1292 call void asm sideeffect "# reg use $0", "{t4}"(i64 %t4)
1293 call void asm sideeffect "# reg use $0", "{t5}"(i64 %t5)
1294 call void asm sideeffect "# reg use $0", "{t6}"(i64 %t6)
1296 ret void
1297 }