| blob | cad6d19539f8273bba8931c90cea3eba9c77703a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
3 ; RUN: | FileCheck -check-prefix=ILP32-ILP32F-FPELIM %s
4 ; RUN: llc -mtriple=riscv32 -verify-machineinstrs -frame-pointer=all < %s \
5 ; RUN: | FileCheck -check-prefix=ILP32-ILP32F-WITHFP %s
6 ; RUN: llc -mtriple=riscv32 -mattr=+d -verify-machineinstrs < %s \
7 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
8 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32f \
9 ; RUN: -verify-machineinstrs < %s \
10 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
11 ; RUN: llc -mtriple=riscv32 -mattr=+d -target-abi ilp32d \
12 ; RUN: -verify-machineinstrs < %s \
13 ; RUN: | FileCheck -check-prefix=RV32D-ILP32-ILP32F-ILP32D-FPELIM %s
14 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
15 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
16 ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64f \
17 ; RUN: -verify-machineinstrs < %s \
18 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
19 ; RUN: llc -mtriple=riscv64 -mattr=+d -target-abi lp64d \
20 ; RUN: -verify-machineinstrs < %s \
21 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-FPELIM %s
22 ; RUN: llc -mtriple=riscv64 -verify-machineinstrs -frame-pointer=all < %s \
23 ; RUN: | FileCheck -check-prefix=LP64-LP64F-LP64D-WITHFP %s
25 ; The same vararg calling convention is used for ilp32/ilp32f/ilp32d and for
26 ; lp64/lp64f/lp64d. Different CHECK lines are required for RV32D due to slight
27 ; codegen differences due to the way the f64 load operations are lowered.
28 ; The nounwind attribute is omitted for some of the tests, to check that CFI
29 ; directives are correctly generated.
31 declare void @llvm.va_start(i8*)
32 declare void @llvm.va_end(i8*)
34 declare void @notdead(i8*)
36 ; Although frontends are recommended to not generate va_arg due to the lack of
37 ; support for aggregate types, we test simple cases here to ensure they are
38 ; lowered correctly
40 define i32 @va1(i8* %fmt, ...) {
41 ; ILP32-ILP32F-FPELIM-LABEL: va1:
42 ; ILP32-ILP32F-FPELIM: # %bb.0:
43 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
44 ; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 48
45 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
46 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
47 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
48 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
49 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
50 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
51 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
52 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
53 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24
54 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
55 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
56 ; ILP32-ILP32F-FPELIM-NEXT: ret
57 ;
58 ; ILP32-ILP32F-WITHFP-LABEL: va1:
59 ; ILP32-ILP32F-WITHFP: # %bb.0:
60 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
61 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 48
62 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
63 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
64 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36
65 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40
66 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
67 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa s0, 32
68 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
69 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
70 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
71 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
72 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
73 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
74 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
75 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
76 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
77 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
78 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
79 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
80 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
81 ; ILP32-ILP32F-WITHFP-NEXT: ret
82 ;
83 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1:
84 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
85 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
86 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 48
87 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
88 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
89 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
90 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
91 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
92 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
93 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
94 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
95 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24
96 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
97 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
98 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
99 ;
100 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1:
101 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
102 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
103 ; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 80
104 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
105 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
106 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
107 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
108 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
109 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
110 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
111 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 28
112 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
113 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 24(sp)
114 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
115 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
116 ;
117 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1:
118 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
119 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
120 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 96
121 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
122 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
123 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72
124 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80
125 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
126 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa s0, 64
127 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
128 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
129 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
130 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
131 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
132 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
133 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
134 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12
135 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
136 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
137 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
138 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
139 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
140 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
141 %va = alloca i8*, align 4
142 %1 = bitcast i8** %va to i8*
143 call void @llvm.va_start(i8* %1)
144 %argp.cur = load i8*, i8** %va, align 4
145 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
146 store i8* %argp.next, i8** %va, align 4
147 %2 = bitcast i8* %argp.cur to i32*
148 %3 = load i32, i32* %2, align 4
149 call void @llvm.va_end(i8* %1)
150 ret i32 %3
151 }
153 define i32 @va1_va_arg(i8* %fmt, ...) nounwind {
154 ; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg:
155 ; ILP32-ILP32F-FPELIM: # %bb.0:
156 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
157 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
158 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
159 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
160 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
161 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
162 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
163 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
164 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
165 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 24
166 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
167 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
168 ; ILP32-ILP32F-FPELIM-NEXT: ret
169 ;
170 ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg:
171 ; ILP32-ILP32F-WITHFP: # %bb.0:
172 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
173 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
174 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
175 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
176 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
177 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
178 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
179 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
180 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
181 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
182 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
183 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
184 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
185 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
186 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
187 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
188 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
189 ; ILP32-ILP32F-WITHFP-NEXT: ret
190 ;
191 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg:
192 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
193 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
194 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
195 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
196 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
197 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
198 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
199 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
200 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
201 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
202 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 24
203 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
204 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
205 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
206 ;
207 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg:
208 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
209 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
210 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
211 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
212 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
213 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
214 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
215 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
216 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
217 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
218 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 32
219 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
220 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
221 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
222 ;
223 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg:
224 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
225 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
226 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
227 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
228 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
229 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
230 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
231 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
232 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
233 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
234 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
235 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
236 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
237 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16
238 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
239 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
240 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
241 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
242 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
243 %va = alloca i8*, align 4
244 %1 = bitcast i8** %va to i8*
245 call void @llvm.va_start(i8* %1)
246 %2 = va_arg i8** %va, i32
247 call void @llvm.va_end(i8* %1)
248 ret i32 %2
249 }
251 ; Ensure the adjustment when restoring the stack pointer using the frame
252 ; pointer is correct
253 define i32 @va1_va_arg_alloca(i8* %fmt, ...) nounwind {
254 ; ILP32-ILP32F-FPELIM-LABEL: va1_va_arg_alloca:
255 ; ILP32-ILP32F-FPELIM: # %bb.0:
256 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
257 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
258 ; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
259 ; ILP32-ILP32F-FPELIM-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
260 ; ILP32-ILP32F-FPELIM-NEXT: addi s0, sp, 16
261 ; ILP32-ILP32F-FPELIM-NEXT: mv s1, a1
262 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(s0)
263 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(s0)
264 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(s0)
265 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(s0)
266 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(s0)
267 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 8(s0)
268 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(s0)
269 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, s0, 8
270 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, -16(s0)
271 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a1, 15
272 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -16
273 ; ILP32-ILP32F-FPELIM-NEXT: sub a0, sp, a0
274 ; ILP32-ILP32F-FPELIM-NEXT: mv sp, a0
275 ; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
276 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, s1
277 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, s0, -16
278 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
279 ; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
280 ; ILP32-ILP32F-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
281 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
282 ; ILP32-ILP32F-FPELIM-NEXT: ret
283 ;
284 ; ILP32-ILP32F-WITHFP-LABEL: va1_va_arg_alloca:
285 ; ILP32-ILP32F-WITHFP: # %bb.0:
286 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
287 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
288 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
289 ; ILP32-ILP32F-WITHFP-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
290 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
291 ; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
292 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
293 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
294 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
295 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
296 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
297 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
298 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
299 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
300 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
301 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a1, 15
302 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -16
303 ; ILP32-ILP32F-WITHFP-NEXT: sub a0, sp, a0
304 ; ILP32-ILP32F-WITHFP-NEXT: mv sp, a0
305 ; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
306 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, s1
307 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, s0, -16
308 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
309 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
310 ; ILP32-ILP32F-WITHFP-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
311 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
312 ; ILP32-ILP32F-WITHFP-NEXT: ret
313 ;
314 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_va_arg_alloca:
315 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
316 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
317 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
318 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
319 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s1, 4(sp) # 4-byte Folded Spill
320 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi s0, sp, 16
321 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s1, a1
322 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(s0)
323 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(s0)
324 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(s0)
325 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(s0)
326 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(s0)
327 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 8(s0)
328 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(s0)
329 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, s0, 8
330 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, -16(s0)
331 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a1, 15
332 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -16
333 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub a0, sp, a0
334 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv sp, a0
335 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
336 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, s1
337 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, s0, -16
338 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
339 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
340 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
341 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
342 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
343 ;
344 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_va_arg_alloca:
345 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
346 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
347 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
348 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
349 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
350 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi s0, sp, 32
351 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv s1, a1
352 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(s0)
353 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(s0)
354 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(s0)
355 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(s0)
356 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(s0)
357 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(s0)
358 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(s0)
359 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, s0, 16
360 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, -32(s0)
361 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a0, a1, 32
362 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a0, a0, 32
363 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 15
364 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -16
365 ; LP64-LP64F-LP64D-FPELIM-NEXT: sub a0, sp, a0
366 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv sp, a0
367 ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
368 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, s1
369 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, s0, -32
370 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
371 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
372 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
373 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
374 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
375 ;
376 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_va_arg_alloca:
377 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
378 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
379 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
380 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
381 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 8(sp) # 8-byte Folded Spill
382 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
383 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
384 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
385 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
386 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
387 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
388 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
389 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
390 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
391 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 16
392 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
393 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a0, a1, 32
394 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a0, a0, 32
395 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 15
396 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -16
397 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub a0, sp, a0
398 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv sp, a0
399 ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
400 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s1
401 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, s0, -32
402 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
403 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
404 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
405 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
406 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
407 %va = alloca i8*, align 4
408 %1 = bitcast i8** %va to i8*
409 call void @llvm.va_start(i8* %1)
410 %2 = va_arg i8** %va, i32
411 %3 = alloca i8, i32 %2
412 call void @notdead(i8* %3)
413 call void @llvm.va_end(i8* %1)
414 ret i32 %2
415 }
417 define void @va1_caller() nounwind {
418 ; Pass a double, as a float would be promoted by a C/C++ frontend
419 ; ILP32-ILP32F-FPELIM-LABEL: va1_caller:
420 ; ILP32-ILP32F-FPELIM: # %bb.0:
421 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
422 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
423 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
424 ; ILP32-ILP32F-FPELIM-NEXT: li a4, 2
425 ; ILP32-ILP32F-FPELIM-NEXT: li a2, 0
426 ; ILP32-ILP32F-FPELIM-NEXT: call va1@plt
427 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
428 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
429 ; ILP32-ILP32F-FPELIM-NEXT: ret
430 ;
431 ; ILP32-ILP32F-WITHFP-LABEL: va1_caller:
432 ; ILP32-ILP32F-WITHFP: # %bb.0:
433 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
434 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
435 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
436 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
437 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
438 ; ILP32-ILP32F-WITHFP-NEXT: li a4, 2
439 ; ILP32-ILP32F-WITHFP-NEXT: li a2, 0
440 ; ILP32-ILP32F-WITHFP-NEXT: call va1@plt
441 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
442 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
443 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
444 ; ILP32-ILP32F-WITHFP-NEXT: ret
445 ;
446 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va1_caller:
447 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
448 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
449 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
450 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
451 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a4, 2
452 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a2, 0
453 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va1@plt
454 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
455 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
456 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
457 ;
458 ; LP64-LP64F-LP64D-FPELIM-LABEL: va1_caller:
459 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
460 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
461 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
462 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 1023
463 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
464 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a2, 2
465 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va1@plt
466 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
467 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
468 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
469 ;
470 ; LP64-LP64F-LP64D-WITHFP-LABEL: va1_caller:
471 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
472 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
473 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
474 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
475 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
476 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1023
477 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
478 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a2, 2
479 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va1@plt
480 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
481 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
482 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
483 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
484 %1 = call i32 (i8*, ...) @va1(i8* undef, double 1.0, i32 2)
485 ret void
486 }
488 ; Ensure that 2x xlen size+alignment varargs are accessed via an "aligned"
489 ; register pair (where the first register is even-numbered).
491 define i64 @va2(i8 *%fmt, ...) nounwind {
492 ; ILP32-ILP32F-FPELIM-LABEL: va2:
493 ; ILP32-ILP32F-FPELIM: # %bb.0:
494 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
495 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
496 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
497 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
498 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
499 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
500 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
501 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
502 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27
503 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
504 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 35
505 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
506 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 4(a0)
507 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
508 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
509 ; ILP32-ILP32F-FPELIM-NEXT: ret
510 ;
511 ; ILP32-ILP32F-WITHFP-LABEL: va2:
512 ; ILP32-ILP32F-WITHFP: # %bb.0:
513 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
514 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
515 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
516 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
517 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
518 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
519 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
520 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
521 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
522 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
523 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
524 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
525 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
526 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 19
527 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
528 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 4(a0)
529 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
530 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
531 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
532 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
533 ; ILP32-ILP32F-WITHFP-NEXT: ret
534 ;
535 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2:
536 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
537 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
538 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
539 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
540 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
541 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
542 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
543 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
544 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
545 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27
546 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
547 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 35
548 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
549 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 4(a0)
550 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0)
551 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
552 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
553 ;
554 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2:
555 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
556 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
557 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
558 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
559 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
560 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
561 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
562 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
563 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
564 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 24
565 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
566 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
567 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 7
568 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 32
569 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a1, a1, 32
570 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, 8
571 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
572 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a1, 1
573 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a1, 32
574 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a1, -8
575 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a1
576 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
577 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
578 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
579 ;
580 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2:
581 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
582 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
583 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
584 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
585 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
586 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
587 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
588 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
589 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
590 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
591 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
592 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
593 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 8
594 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
595 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
596 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 7
597 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 32
598 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a1, a1, 32
599 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, 8
600 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
601 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 1
602 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a1, 32
603 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a1, -8
604 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a1
605 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
606 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
607 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
608 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
609 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
610 %va = alloca i8*, align 4
611 %1 = bitcast i8** %va to i8*
612 call void @llvm.va_start(i8* %1)
613 %2 = bitcast i8** %va to i32*
614 %argp.cur = load i32, i32* %2, align 4
615 %3 = add i32 %argp.cur, 7
616 %4 = and i32 %3, -8
617 %argp.cur.aligned = inttoptr i32 %3 to i8*
618 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8
619 store i8* %argp.next, i8** %va, align 4
620 %5 = inttoptr i32 %4 to double*
621 %6 = load double, double* %5, align 8
622 %7 = bitcast double %6 to i64
623 call void @llvm.va_end(i8* %1)
624 ret i64 %7
625 }
627 define i64 @va2_va_arg(i8 *%fmt, ...) nounwind {
628 ; ILP32-ILP32F-FPELIM-LABEL: va2_va_arg:
629 ; ILP32-ILP32F-FPELIM: # %bb.0:
630 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
631 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
632 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
633 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
634 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
635 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
636 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
637 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
638 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 27
639 ; ILP32-ILP32F-FPELIM-NEXT: andi a1, a0, -8
640 ; ILP32-ILP32F-FPELIM-NEXT: ori a0, a1, 4
641 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp)
642 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a1)
643 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a1, 8
644 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 12(sp)
645 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 4(a1)
646 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
647 ; ILP32-ILP32F-FPELIM-NEXT: ret
648 ;
649 ; ILP32-ILP32F-WITHFP-LABEL: va2_va_arg:
650 ; ILP32-ILP32F-WITHFP: # %bb.0:
651 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
652 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
653 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
654 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
655 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
656 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
657 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
658 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
659 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
660 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
661 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
662 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
663 ; ILP32-ILP32F-WITHFP-NEXT: andi a1, a0, -8
664 ; ILP32-ILP32F-WITHFP-NEXT: ori a0, a1, 4
665 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -12(s0)
666 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a1)
667 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a1, 8
668 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -12(s0)
669 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 4(a1)
670 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
671 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
672 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
673 ; ILP32-ILP32F-WITHFP-NEXT: ret
674 ;
675 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_va_arg:
676 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
677 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
678 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
679 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
680 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
681 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
682 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
683 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
684 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
685 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 27
686 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
687 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 8
688 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
689 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0)
690 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 0(sp)
691 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(sp)
692 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 4(sp)
693 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
694 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
695 ;
696 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2_va_arg:
697 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
698 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
699 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv a0, a1
700 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
701 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
702 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
703 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
704 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
705 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
706 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
707 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 32
708 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
709 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
710 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
711 ;
712 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2_va_arg:
713 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
714 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
715 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
716 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
717 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
718 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, a1
719 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
720 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
721 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
722 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
723 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
724 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
725 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
726 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 16
727 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
728 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
729 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
730 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
731 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
732 %va = alloca i8*, align 4
733 %1 = bitcast i8** %va to i8*
734 call void @llvm.va_start(i8* %1)
735 %2 = va_arg i8** %va, double
736 call void @llvm.va_end(i8* %1)
737 %3 = bitcast double %2 to i64
738 ret i64 %3
739 }
741 define void @va2_caller() nounwind {
742 ; ILP32-ILP32F-FPELIM-LABEL: va2_caller:
743 ; ILP32-ILP32F-FPELIM: # %bb.0:
744 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
745 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
746 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 261888
747 ; ILP32-ILP32F-FPELIM-NEXT: li a2, 0
748 ; ILP32-ILP32F-FPELIM-NEXT: call va2@plt
749 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
750 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
751 ; ILP32-ILP32F-FPELIM-NEXT: ret
752 ;
753 ; ILP32-ILP32F-WITHFP-LABEL: va2_caller:
754 ; ILP32-ILP32F-WITHFP: # %bb.0:
755 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
756 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
757 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
758 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
759 ; ILP32-ILP32F-WITHFP-NEXT: lui a3, 261888
760 ; ILP32-ILP32F-WITHFP-NEXT: li a2, 0
761 ; ILP32-ILP32F-WITHFP-NEXT: call va2@plt
762 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
763 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
764 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
765 ; ILP32-ILP32F-WITHFP-NEXT: ret
766 ;
767 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va2_caller:
768 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
769 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
770 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
771 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 261888
772 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a2, 0
773 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va2@plt
774 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
775 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
776 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
777 ;
778 ; LP64-LP64F-LP64D-FPELIM-LABEL: va2_caller:
779 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
780 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
781 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
782 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 1023
783 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a1, a0, 52
784 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va2@plt
785 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
786 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
787 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
788 ;
789 ; LP64-LP64F-LP64D-WITHFP-LABEL: va2_caller:
790 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
791 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
792 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
793 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
794 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
795 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1023
796 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a1, a0, 52
797 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va2@plt
798 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
799 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
800 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
801 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
802 %1 = call i64 (i8*, ...) @va2(i8* undef, double 1.000000e+00)
803 ret void
804 }
806 ; On RV32, Ensure a named 2*xlen argument is passed in a1 and a2, while the
807 ; vararg double is passed in a4 and a5 (rather than a3 and a4)
809 define i64 @va3(i32 %a, i64 %b, ...) nounwind {
810 ; ILP32-ILP32F-FPELIM-LABEL: va3:
811 ; ILP32-ILP32F-FPELIM: # %bb.0:
812 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32
813 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp)
814 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp)
815 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp)
816 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp)
817 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp)
818 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19
819 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
820 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, sp, 27
821 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
822 ; ILP32-ILP32F-FPELIM-NEXT: lw a3, 4(a0)
823 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
824 ; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a3
825 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
826 ; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1
827 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1
828 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32
829 ; ILP32-ILP32F-FPELIM-NEXT: ret
830 ;
831 ; ILP32-ILP32F-WITHFP-LABEL: va3:
832 ; ILP32-ILP32F-WITHFP: # %bb.0:
833 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
834 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) # 4-byte Folded Spill
835 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) # 4-byte Folded Spill
836 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
837 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
838 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
839 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
840 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0)
841 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0)
842 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
843 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
844 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, s0, 19
845 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
846 ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 4(a0)
847 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
848 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a3
849 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
850 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
851 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
852 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
853 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
854 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
855 ; ILP32-ILP32F-WITHFP-NEXT: ret
856 ;
857 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3:
858 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
859 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -32
860 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 28(sp)
861 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 24(sp)
862 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 20(sp)
863 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 16(sp)
864 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 12(sp)
865 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 19
866 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
867 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, sp, 27
868 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
869 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 4(a0)
870 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0)
871 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a3
872 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0
873 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1
874 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1
875 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 32
876 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
877 ;
878 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3:
879 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
880 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64
881 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp)
882 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp)
883 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp)
884 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp)
885 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp)
886 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 16
887 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
888 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 8(sp)
889 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp)
890 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 7
891 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 32
892 ; LP64-LP64F-LP64D-FPELIM-NEXT: srli a2, a2, 32
893 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, 8
894 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp)
895 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a2, 1
896 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a2, 32
897 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a2, -8
898 ; LP64-LP64F-LP64D-FPELIM-NEXT: and a0, a0, a2
899 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
900 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a0
901 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64
902 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
903 ;
904 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3:
905 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
906 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
907 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
908 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
909 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
910 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
911 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
912 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
913 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
914 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
915 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv a0, s0
916 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -24(s0)
917 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, -24(s0)
918 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
919 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 7
920 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 32
921 ; LP64-LP64F-LP64D-WITHFP-NEXT: srli a2, a2, 32
922 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, 8
923 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -24(s0)
924 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a2, 1
925 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a2, 32
926 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a2, -8
927 ; LP64-LP64F-LP64D-WITHFP-NEXT: and a0, a0, a2
928 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
929 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a0
930 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
931 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
932 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
933 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
934 %va = alloca i8*, align 4
935 %1 = bitcast i8** %va to i8*
936 call void @llvm.va_start(i8* %1)
937 %2 = bitcast i8** %va to i32*
938 %argp.cur = load i32, i32* %2, align 4
939 %3 = add i32 %argp.cur, 7
940 %4 = and i32 %3, -8
941 %argp.cur.aligned = inttoptr i32 %3 to i8*
942 %argp.next = getelementptr inbounds i8, i8* %argp.cur.aligned, i32 8
943 store i8* %argp.next, i8** %va, align 4
944 %5 = inttoptr i32 %4 to double*
945 %6 = load double, double* %5, align 8
946 call void @llvm.va_end(i8* %1)
947 %7 = bitcast double %6 to i64
948 %8 = add i64 %b, %7
949 ret i64 %8
950 }
952 define i64 @va3_va_arg(i32 %a, i64 %b, ...) nounwind {
953 ; ILP32-ILP32F-FPELIM-LABEL: va3_va_arg:
954 ; ILP32-ILP32F-FPELIM: # %bb.0:
955 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -32
956 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 28(sp)
957 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 24(sp)
958 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 20(sp)
959 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 16(sp)
960 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 12(sp)
961 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 19
962 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -8
963 ; ILP32-ILP32F-FPELIM-NEXT: ori a3, a0, 4
964 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
965 ; ILP32-ILP32F-FPELIM-NEXT: lw a3, 0(a0)
966 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, a0, 8
967 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 4(sp)
968 ; ILP32-ILP32F-FPELIM-NEXT: lw a4, 4(a0)
969 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a3
970 ; ILP32-ILP32F-FPELIM-NEXT: sltu a1, a0, a1
971 ; ILP32-ILP32F-FPELIM-NEXT: add a2, a2, a4
972 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a2, a1
973 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 32
974 ; ILP32-ILP32F-FPELIM-NEXT: ret
975 ;
976 ; ILP32-ILP32F-WITHFP-LABEL: va3_va_arg:
977 ; ILP32-ILP32F-WITHFP: # %bb.0:
978 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
979 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 20(sp) # 4-byte Folded Spill
980 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 16(sp) # 4-byte Folded Spill
981 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 24
982 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 20(s0)
983 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 16(s0)
984 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 12(s0)
985 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 8(s0)
986 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 4(s0)
987 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 11
988 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -8
989 ; ILP32-ILP32F-WITHFP-NEXT: ori a3, a0, 4
990 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -12(s0)
991 ; ILP32-ILP32F-WITHFP-NEXT: lw a3, 0(a0)
992 ; ILP32-ILP32F-WITHFP-NEXT: addi a4, a0, 8
993 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, -12(s0)
994 ; ILP32-ILP32F-WITHFP-NEXT: lw a4, 4(a0)
995 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a3
996 ; ILP32-ILP32F-WITHFP-NEXT: sltu a1, a0, a1
997 ; ILP32-ILP32F-WITHFP-NEXT: add a2, a2, a4
998 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a2, a1
999 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 20(sp) # 4-byte Folded Reload
1000 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 16(sp) # 4-byte Folded Reload
1001 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
1002 ; ILP32-ILP32F-WITHFP-NEXT: ret
1003 ;
1004 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_va_arg:
1005 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1006 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1007 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1008 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1009 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1010 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1011 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1012 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 35
1013 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -8
1014 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 8
1015 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 20(sp)
1016 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fld ft0, 0(a0)
1017 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: fsd ft0, 8(sp)
1018 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 12(sp)
1019 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a3, 8(sp)
1020 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, a2, a0
1021 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a3
1022 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sltu a1, a0, a1
1023 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a2, a1
1024 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1025 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1026 ;
1027 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3_va_arg:
1028 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1029 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -64
1030 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 56(sp)
1031 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 48(sp)
1032 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 40(sp)
1033 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 32(sp)
1034 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 24(sp)
1035 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 16(sp)
1036 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, sp, 24
1037 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, a1, a2
1038 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
1039 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 64
1040 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1041 ;
1042 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3_va_arg:
1043 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1044 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -80
1045 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1046 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1047 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
1048 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 40(s0)
1049 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 32(s0)
1050 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 24(s0)
1051 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 16(s0)
1052 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 8(s0)
1053 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 0(s0)
1054 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, s0, 8
1055 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a0, a1, a2
1056 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -24(s0)
1057 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1058 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1059 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 80
1060 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1061 %va = alloca i8*, align 4
1062 %1 = bitcast i8** %va to i8*
1063 call void @llvm.va_start(i8* %1)
1064 %2 = va_arg i8** %va, double
1065 call void @llvm.va_end(i8* %1)
1066 %3 = bitcast double %2 to i64
1067 %4 = add i64 %b, %3
1068 ret i64 %4
1069 }
1071 define void @va3_caller() nounwind {
1072 ; ILP32-ILP32F-FPELIM-LABEL: va3_caller:
1073 ; ILP32-ILP32F-FPELIM: # %bb.0:
1074 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -16
1075 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1076 ; ILP32-ILP32F-FPELIM-NEXT: li a0, 2
1077 ; ILP32-ILP32F-FPELIM-NEXT: li a1, 1111
1078 ; ILP32-ILP32F-FPELIM-NEXT: lui a5, 262144
1079 ; ILP32-ILP32F-FPELIM-NEXT: li a2, 0
1080 ; ILP32-ILP32F-FPELIM-NEXT: li a4, 0
1081 ; ILP32-ILP32F-FPELIM-NEXT: call va3@plt
1082 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1083 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 16
1084 ; ILP32-ILP32F-FPELIM-NEXT: ret
1085 ;
1086 ; ILP32-ILP32F-WITHFP-LABEL: va3_caller:
1087 ; ILP32-ILP32F-WITHFP: # %bb.0:
1088 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -16
1089 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1090 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1091 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
1092 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 2
1093 ; ILP32-ILP32F-WITHFP-NEXT: li a1, 1111
1094 ; ILP32-ILP32F-WITHFP-NEXT: lui a5, 262144
1095 ; ILP32-ILP32F-WITHFP-NEXT: li a2, 0
1096 ; ILP32-ILP32F-WITHFP-NEXT: li a4, 0
1097 ; ILP32-ILP32F-WITHFP-NEXT: call va3@plt
1098 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1099 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1100 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 16
1101 ; ILP32-ILP32F-WITHFP-NEXT: ret
1102 ;
1103 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va3_caller:
1104 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1105 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -16
1106 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1107 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 2
1108 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a1, 1111
1109 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 262144
1110 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a2, 0
1111 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a4, 0
1112 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va3@plt
1113 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1114 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 16
1115 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1116 ;
1117 ; LP64-LP64F-LP64D-FPELIM-LABEL: va3_caller:
1118 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1119 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -16
1120 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1121 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 1
1122 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a2, a0, 62
1123 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 2
1124 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a1, 1111
1125 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va3@plt
1126 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1127 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 16
1128 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1129 ;
1130 ; LP64-LP64F-LP64D-WITHFP-LABEL: va3_caller:
1131 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1132 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -16
1133 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
1134 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 0(sp) # 8-byte Folded Spill
1135 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 16
1136 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1
1137 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a2, a0, 62
1138 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 2
1139 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 1111
1140 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va3@plt
1141 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
1142 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
1143 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 16
1144 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1145 %1 = call i64 (i32, i64, ...) @va3(i32 2, i64 1111, double 2.000000e+00)
1146 ret void
1147 }
1149 declare void @llvm.va_copy(i8*, i8*)
1151 define i32 @va4_va_copy(i32 %argno, ...) nounwind {
1152 ; ILP32-ILP32F-FPELIM-LABEL: va4_va_copy:
1153 ; ILP32-ILP32F-FPELIM: # %bb.0:
1154 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
1155 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1156 ; ILP32-ILP32F-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1157 ; ILP32-ILP32F-FPELIM-NEXT: mv s0, a1
1158 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
1159 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
1160 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
1161 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
1162 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
1163 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
1164 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
1165 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, sp, 24
1166 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 4(sp)
1167 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
1168 ; ILP32-ILP32F-FPELIM-NEXT: call notdead@plt
1169 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 4(sp)
1170 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 3
1171 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1172 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a0, 4
1173 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 4(sp)
1174 ; ILP32-ILP32F-FPELIM-NEXT: lw a1, 0(a0)
1175 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
1176 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1177 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a0, 4
1178 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 4(sp)
1179 ; ILP32-ILP32F-FPELIM-NEXT: lw a2, 0(a0)
1180 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 7
1181 ; ILP32-ILP32F-FPELIM-NEXT: andi a0, a0, -4
1182 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, a0, 4
1183 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 4(sp)
1184 ; ILP32-ILP32F-FPELIM-NEXT: lw a0, 0(a0)
1185 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, s0
1186 ; ILP32-ILP32F-FPELIM-NEXT: add a1, a1, a2
1187 ; ILP32-ILP32F-FPELIM-NEXT: add a0, a1, a0
1188 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1189 ; ILP32-ILP32F-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1190 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
1191 ; ILP32-ILP32F-FPELIM-NEXT: ret
1192 ;
1193 ; ILP32-ILP32F-WITHFP-LABEL: va4_va_copy:
1194 ; ILP32-ILP32F-WITHFP: # %bb.0:
1195 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
1196 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 28(sp) # 4-byte Folded Spill
1197 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 24(sp) # 4-byte Folded Spill
1198 ; ILP32-ILP32F-WITHFP-NEXT: sw s1, 20(sp) # 4-byte Folded Spill
1199 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 32
1200 ; ILP32-ILP32F-WITHFP-NEXT: mv s1, a1
1201 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1202 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1203 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1204 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1205 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1206 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1207 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1208 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, s0, 8
1209 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -16(s0)
1210 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
1211 ; ILP32-ILP32F-WITHFP-NEXT: call notdead@plt
1212 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, -16(s0)
1213 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 3
1214 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1215 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a0, 4
1216 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -16(s0)
1217 ; ILP32-ILP32F-WITHFP-NEXT: lw a1, 0(a0)
1218 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
1219 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1220 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a0, 4
1221 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, -16(s0)
1222 ; ILP32-ILP32F-WITHFP-NEXT: lw a2, 0(a0)
1223 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 7
1224 ; ILP32-ILP32F-WITHFP-NEXT: andi a0, a0, -4
1225 ; ILP32-ILP32F-WITHFP-NEXT: addi a3, a0, 4
1226 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, -16(s0)
1227 ; ILP32-ILP32F-WITHFP-NEXT: lw a0, 0(a0)
1228 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, s1
1229 ; ILP32-ILP32F-WITHFP-NEXT: add a1, a1, a2
1230 ; ILP32-ILP32F-WITHFP-NEXT: add a0, a1, a0
1231 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 28(sp) # 4-byte Folded Reload
1232 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 24(sp) # 4-byte Folded Reload
1233 ; ILP32-ILP32F-WITHFP-NEXT: lw s1, 20(sp) # 4-byte Folded Reload
1234 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
1235 ; ILP32-ILP32F-WITHFP-NEXT: ret
1236 ;
1237 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va4_va_copy:
1238 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1239 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1240 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1241 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1242 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv s0, a1
1243 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1244 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1245 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1246 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1247 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1248 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
1249 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
1250 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, sp, 24
1251 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 4(sp)
1252 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
1253 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call notdead@plt
1254 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 4(sp)
1255 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 3
1256 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1257 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a0, 4
1258 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 4(sp)
1259 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a1, 0(a0)
1260 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
1261 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1262 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a0, 4
1263 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 4(sp)
1264 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a2, 0(a0)
1265 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 7
1266 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: andi a0, a0, -4
1267 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a0, 4
1268 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 4(sp)
1269 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw a0, 0(a0)
1270 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, s0
1271 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, a1, a2
1272 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a0, a1, a0
1273 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1274 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1275 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1276 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1277 ;
1278 ; LP64-LP64F-LP64D-FPELIM-LABEL: va4_va_copy:
1279 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1280 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -96
1281 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1282 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1283 ; LP64-LP64F-LP64D-FPELIM-NEXT: mv s0, a1
1284 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 88(sp)
1285 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 80(sp)
1286 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 72(sp)
1287 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 64(sp)
1288 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 56(sp)
1289 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 48(sp)
1290 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 40(sp)
1291 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, sp, 48
1292 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1293 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 0(sp)
1294 ; LP64-LP64F-LP64D-FPELIM-NEXT: call notdead@plt
1295 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 8(sp)
1296 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 3
1297 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1298 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, a0, 8
1299 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
1300 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a1, 0(a0)
1301 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
1302 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1303 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a2, a0, 8
1304 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 8(sp)
1305 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a2, 0(a0)
1306 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a0, a0, 11
1307 ; LP64-LP64F-LP64D-FPELIM-NEXT: andi a0, a0, -4
1308 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a3, a0, 8
1309 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 8(sp)
1310 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a0, 0(a0)
1311 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, s0
1312 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a1, a1, a2
1313 ; LP64-LP64F-LP64D-FPELIM-NEXT: addw a0, a1, a0
1314 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1315 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1316 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 96
1317 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1318 ;
1319 ; LP64-LP64F-LP64D-WITHFP-LABEL: va4_va_copy:
1320 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1321 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -112
1322 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1323 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
1324 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s1, 24(sp) # 8-byte Folded Spill
1325 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
1326 ; LP64-LP64F-LP64D-WITHFP-NEXT: mv s1, a1
1327 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1328 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1329 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1330 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1331 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1332 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1333 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1334 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 16
1335 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -32(s0)
1336 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, -40(s0)
1337 ; LP64-LP64F-LP64D-WITHFP-NEXT: call notdead@plt
1338 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, -32(s0)
1339 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 3
1340 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1341 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, a0, 8
1342 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -32(s0)
1343 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a1, 0(a0)
1344 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
1345 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1346 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a2, a0, 8
1347 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, -32(s0)
1348 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a2, 0(a0)
1349 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, a0, 11
1350 ; LP64-LP64F-LP64D-WITHFP-NEXT: andi a0, a0, -4
1351 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a3, a0, 8
1352 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, -32(s0)
1353 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a0, 0(a0)
1354 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, s1
1355 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a1, a1, a2
1356 ; LP64-LP64F-LP64D-WITHFP-NEXT: addw a0, a1, a0
1357 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1358 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
1359 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s1, 24(sp) # 8-byte Folded Reload
1360 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 112
1361 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1362 %vargs = alloca i8*, align 4
1363 %wargs = alloca i8*, align 4
1364 %1 = bitcast i8** %vargs to i8*
1365 %2 = bitcast i8** %wargs to i8*
1366 call void @llvm.va_start(i8* %1)
1367 %3 = va_arg i8** %vargs, i32
1368 call void @llvm.va_copy(i8* %2, i8* %1)
1369 %4 = load i8*, i8** %wargs, align 4
1370 call void @notdead(i8* %4)
1371 %5 = va_arg i8** %vargs, i32
1372 %6 = va_arg i8** %vargs, i32
1373 %7 = va_arg i8** %vargs, i32
1374 call void @llvm.va_end(i8* %1)
1375 call void @llvm.va_end(i8* %2)
1376 %add1 = add i32 %5, %3
1377 %add2 = add i32 %add1, %6
1378 %add3 = add i32 %add2, %7
1379 ret i32 %add3
1380 }
1382 ; Check 2x*xlen values are aligned appropriately when passed on the stack in a vararg call
1384 declare i32 @va5_aligned_stack_callee(i32, ...)
1386 define void @va5_aligned_stack_caller() nounwind {
1387 ; The double should be 8-byte aligned on the stack, but the two-element array
1388 ; should only be 4-byte aligned
1389 ; ILP32-ILP32F-FPELIM-LABEL: va5_aligned_stack_caller:
1390 ; ILP32-ILP32F-FPELIM: # %bb.0:
1391 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -64
1392 ; ILP32-ILP32F-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
1393 ; ILP32-ILP32F-FPELIM-NEXT: li a0, 17
1394 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 24(sp)
1395 ; ILP32-ILP32F-FPELIM-NEXT: li a0, 16
1396 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 20(sp)
1397 ; ILP32-ILP32F-FPELIM-NEXT: li a0, 15
1398 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp)
1399 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262236
1400 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 655
1401 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 12(sp)
1402 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 377487
1403 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 1475
1404 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 8(sp)
1405 ; ILP32-ILP32F-FPELIM-NEXT: li a0, 14
1406 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 0(sp)
1407 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 262153
1408 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 491
1409 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 44(sp)
1410 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 545260
1411 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -1967
1412 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 40(sp)
1413 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 964690
1414 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, -328
1415 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 36(sp)
1416 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 335544
1417 ; ILP32-ILP32F-FPELIM-NEXT: addi a5, a0, 1311
1418 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 688509
1419 ; ILP32-ILP32F-FPELIM-NEXT: addi a6, a0, -2048
1420 ; ILP32-ILP32F-FPELIM-NEXT: li a0, 1
1421 ; ILP32-ILP32F-FPELIM-NEXT: li a1, 11
1422 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, sp, 32
1423 ; ILP32-ILP32F-FPELIM-NEXT: li a3, 12
1424 ; ILP32-ILP32F-FPELIM-NEXT: li a4, 13
1425 ; ILP32-ILP32F-FPELIM-NEXT: li a7, 4
1426 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 32(sp)
1427 ; ILP32-ILP32F-FPELIM-NEXT: call va5_aligned_stack_callee@plt
1428 ; ILP32-ILP32F-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
1429 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 64
1430 ; ILP32-ILP32F-FPELIM-NEXT: ret
1431 ;
1432 ; ILP32-ILP32F-WITHFP-LABEL: va5_aligned_stack_caller:
1433 ; ILP32-ILP32F-WITHFP: # %bb.0:
1434 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -64
1435 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
1436 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 56(sp) # 4-byte Folded Spill
1437 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 64
1438 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 17
1439 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 24(sp)
1440 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 16
1441 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 20(sp)
1442 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 15
1443 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 16(sp)
1444 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262236
1445 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 655
1446 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 12(sp)
1447 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 377487
1448 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 1475
1449 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 8(sp)
1450 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 14
1451 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(sp)
1452 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 262153
1453 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, 491
1454 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -20(s0)
1455 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 545260
1456 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1967
1457 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -24(s0)
1458 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 964690
1459 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -328
1460 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, -28(s0)
1461 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 335544
1462 ; ILP32-ILP32F-WITHFP-NEXT: addi a5, a0, 1311
1463 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 688509
1464 ; ILP32-ILP32F-WITHFP-NEXT: addi a6, a0, -2048
1465 ; ILP32-ILP32F-WITHFP-NEXT: li a0, 1
1466 ; ILP32-ILP32F-WITHFP-NEXT: li a1, 11
1467 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, s0, -32
1468 ; ILP32-ILP32F-WITHFP-NEXT: li a3, 12
1469 ; ILP32-ILP32F-WITHFP-NEXT: li a4, 13
1470 ; ILP32-ILP32F-WITHFP-NEXT: li a7, 4
1471 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, -32(s0)
1472 ; ILP32-ILP32F-WITHFP-NEXT: call va5_aligned_stack_callee@plt
1473 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
1474 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 56(sp) # 4-byte Folded Reload
1475 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 64
1476 ; ILP32-ILP32F-WITHFP-NEXT: ret
1477 ;
1478 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va5_aligned_stack_caller:
1479 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1480 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -64
1481 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw ra, 60(sp) # 4-byte Folded Spill
1482 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262236
1483 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 655
1484 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 12(sp)
1485 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 377487
1486 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 1475
1487 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 8(sp)
1488 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 17
1489 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 24(sp)
1490 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 16
1491 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 20(sp)
1492 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 15
1493 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp)
1494 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 14
1495 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 0(sp)
1496 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 262153
1497 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 491
1498 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 44(sp)
1499 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 545260
1500 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -1967
1501 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 40(sp)
1502 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 964690
1503 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, -328
1504 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 36(sp)
1505 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 335544
1506 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a0, 1311
1507 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 688509
1508 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a0, -2048
1509 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a0, 1
1510 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a1, 11
1511 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, sp, 32
1512 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a3, 12
1513 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a4, 13
1514 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: li a7, 4
1515 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 32(sp)
1516 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: call va5_aligned_stack_callee@plt
1517 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lw ra, 60(sp) # 4-byte Folded Reload
1518 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 64
1519 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1520 ;
1521 ; LP64-LP64F-LP64D-FPELIM-LABEL: va5_aligned_stack_caller:
1522 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1523 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -48
1524 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1525 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 17
1526 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 24(sp)
1527 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 16
1528 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp)
1529 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 15
1530 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1531 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, %hi(.LCPI11_0)
1532 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld t0, %lo(.LCPI11_0)(a0)
1533 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, %hi(.LCPI11_1)
1534 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a2, %lo(.LCPI11_1)(a0)
1535 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, %hi(.LCPI11_2)
1536 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld a3, %lo(.LCPI11_2)(a0)
1537 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 2384
1538 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 761
1539 ; LP64-LP64F-LP64D-FPELIM-NEXT: slli a6, a0, 11
1540 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a0, 1
1541 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a1, 11
1542 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a4, 12
1543 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a5, 13
1544 ; LP64-LP64F-LP64D-FPELIM-NEXT: li a7, 14
1545 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd t0, 0(sp)
1546 ; LP64-LP64F-LP64D-FPELIM-NEXT: call va5_aligned_stack_callee@plt
1547 ; LP64-LP64F-LP64D-FPELIM-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1548 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 48
1549 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1550 ;
1551 ; LP64-LP64F-LP64D-WITHFP-LABEL: va5_aligned_stack_caller:
1552 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1553 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -48
1554 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 40(sp) # 8-byte Folded Spill
1555 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 32(sp) # 8-byte Folded Spill
1556 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 48
1557 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 17
1558 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 24(sp)
1559 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 16
1560 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 16(sp)
1561 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 15
1562 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 8(sp)
1563 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, %hi(.LCPI11_0)
1564 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld t0, %lo(.LCPI11_0)(a0)
1565 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, %hi(.LCPI11_1)
1566 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a2, %lo(.LCPI11_1)(a0)
1567 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, %hi(.LCPI11_2)
1568 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld a3, %lo(.LCPI11_2)(a0)
1569 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 2384
1570 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, 761
1571 ; LP64-LP64F-LP64D-WITHFP-NEXT: slli a6, a0, 11
1572 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a0, 1
1573 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a1, 11
1574 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a4, 12
1575 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a5, 13
1576 ; LP64-LP64F-LP64D-WITHFP-NEXT: li a7, 14
1577 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd t0, 0(sp)
1578 ; LP64-LP64F-LP64D-WITHFP-NEXT: call va5_aligned_stack_callee@plt
1579 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 40(sp) # 8-byte Folded Reload
1580 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 32(sp) # 8-byte Folded Reload
1581 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 48
1582 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1583 %1 = call i32 (i32, ...) @va5_aligned_stack_callee(i32 1, i32 11,
1584 fp128 0xLEB851EB851EB851F400091EB851EB851, i32 12, i32 13, i64 20000000000,
1585 i32 14, double 2.720000e+00, i32 15, [2 x i32] [i32 16, i32 17])
1586 ret void
1587 }
1589 ; A function with no fixed arguments is not valid C, but can be
1590 ; specified in LLVM IR. We must ensure the vararg save area is
1591 ; still set up correctly.
1593 define i32 @va6_no_fixed_args(...) nounwind {
1594 ; ILP32-ILP32F-FPELIM-LABEL: va6_no_fixed_args:
1595 ; ILP32-ILP32F-FPELIM: # %bb.0:
1596 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, -48
1597 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 44(sp)
1598 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 40(sp)
1599 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 36(sp)
1600 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 32(sp)
1601 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 28(sp)
1602 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 24(sp)
1603 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 20(sp)
1604 ; ILP32-ILP32F-FPELIM-NEXT: sw a0, 16(sp)
1605 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, sp, 20
1606 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
1607 ; ILP32-ILP32F-FPELIM-NEXT: addi sp, sp, 48
1608 ; ILP32-ILP32F-FPELIM-NEXT: ret
1609 ;
1610 ; ILP32-ILP32F-WITHFP-LABEL: va6_no_fixed_args:
1611 ; ILP32-ILP32F-WITHFP: # %bb.0:
1612 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -48
1613 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
1614 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 8(sp) # 4-byte Folded Spill
1615 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 16
1616 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1617 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1618 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1619 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1620 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1621 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1622 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1623 ; ILP32-ILP32F-WITHFP-NEXT: sw a0, 0(s0)
1624 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 4
1625 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
1626 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
1627 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
1628 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 48
1629 ; ILP32-ILP32F-WITHFP-NEXT: ret
1630 ;
1631 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va6_no_fixed_args:
1632 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1633 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, -48
1634 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 44(sp)
1635 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 40(sp)
1636 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 36(sp)
1637 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 32(sp)
1638 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 28(sp)
1639 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 24(sp)
1640 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 20(sp)
1641 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a0, 16(sp)
1642 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, sp, 20
1643 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
1644 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi sp, sp, 48
1645 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1646 ;
1647 ; LP64-LP64F-LP64D-FPELIM-LABEL: va6_no_fixed_args:
1648 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1649 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, -80
1650 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 72(sp)
1651 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 64(sp)
1652 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 56(sp)
1653 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 48(sp)
1654 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 40(sp)
1655 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 32(sp)
1656 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 24(sp)
1657 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 16(sp)
1658 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi a1, sp, 24
1659 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 8(sp)
1660 ; LP64-LP64F-LP64D-FPELIM-NEXT: addi sp, sp, 80
1661 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1662 ;
1663 ; LP64-LP64F-LP64D-WITHFP-LABEL: va6_no_fixed_args:
1664 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1665 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -96
1666 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 24(sp) # 8-byte Folded Spill
1667 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 16(sp) # 8-byte Folded Spill
1668 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 32
1669 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1670 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1671 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1672 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1673 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1674 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1675 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1676 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(s0)
1677 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a1, s0, 8
1678 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, -24(s0)
1679 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
1680 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
1681 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 96
1682 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1683 %va = alloca i8*, align 4
1684 %1 = bitcast i8** %va to i8*
1685 call void @llvm.va_start(i8* %1)
1686 %2 = va_arg i8** %va, i32
1687 call void @llvm.va_end(i8* %1)
1688 ret i32 %2
1689 }
1691 ; TODO: improve constant materialization of stack addresses
1693 define i32 @va_large_stack(i8* %fmt, ...) {
1694 ; ILP32-ILP32F-FPELIM-LABEL: va_large_stack:
1695 ; ILP32-ILP32F-FPELIM: # %bb.0:
1696 ; ILP32-ILP32F-FPELIM-NEXT: lui a0, 24414
1697 ; ILP32-ILP32F-FPELIM-NEXT: addi a0, a0, 304
1698 ; ILP32-ILP32F-FPELIM-NEXT: sub sp, sp, a0
1699 ; ILP32-ILP32F-FPELIM-NEXT: .cfi_def_cfa_offset 100000048
1700 ; ILP32-ILP32F-FPELIM-NEXT: mv a0, a1
1701 ; ILP32-ILP32F-FPELIM-NEXT: lui t0, 24414
1702 ; ILP32-ILP32F-FPELIM-NEXT: addi t0, t0, 300
1703 ; ILP32-ILP32F-FPELIM-NEXT: add t0, sp, t0
1704 ; ILP32-ILP32F-FPELIM-NEXT: sw a7, 0(t0)
1705 ; ILP32-ILP32F-FPELIM-NEXT: lui a7, 24414
1706 ; ILP32-ILP32F-FPELIM-NEXT: addi a7, a7, 296
1707 ; ILP32-ILP32F-FPELIM-NEXT: add a7, sp, a7
1708 ; ILP32-ILP32F-FPELIM-NEXT: sw a6, 0(a7)
1709 ; ILP32-ILP32F-FPELIM-NEXT: lui a6, 24414
1710 ; ILP32-ILP32F-FPELIM-NEXT: addi a6, a6, 292
1711 ; ILP32-ILP32F-FPELIM-NEXT: add a6, sp, a6
1712 ; ILP32-ILP32F-FPELIM-NEXT: sw a5, 0(a6)
1713 ; ILP32-ILP32F-FPELIM-NEXT: lui a5, 24414
1714 ; ILP32-ILP32F-FPELIM-NEXT: addi a5, a5, 288
1715 ; ILP32-ILP32F-FPELIM-NEXT: add a5, sp, a5
1716 ; ILP32-ILP32F-FPELIM-NEXT: sw a4, 0(a5)
1717 ; ILP32-ILP32F-FPELIM-NEXT: lui a4, 24414
1718 ; ILP32-ILP32F-FPELIM-NEXT: addi a4, a4, 284
1719 ; ILP32-ILP32F-FPELIM-NEXT: add a4, sp, a4
1720 ; ILP32-ILP32F-FPELIM-NEXT: sw a3, 0(a4)
1721 ; ILP32-ILP32F-FPELIM-NEXT: lui a3, 24414
1722 ; ILP32-ILP32F-FPELIM-NEXT: addi a3, a3, 280
1723 ; ILP32-ILP32F-FPELIM-NEXT: add a3, sp, a3
1724 ; ILP32-ILP32F-FPELIM-NEXT: sw a2, 0(a3)
1725 ; ILP32-ILP32F-FPELIM-NEXT: lui a2, 24414
1726 ; ILP32-ILP32F-FPELIM-NEXT: addi a2, a2, 276
1727 ; ILP32-ILP32F-FPELIM-NEXT: add a2, sp, a2
1728 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 0(a2)
1729 ; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414
1730 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 280
1731 ; ILP32-ILP32F-FPELIM-NEXT: add a1, sp, a1
1732 ; ILP32-ILP32F-FPELIM-NEXT: sw a1, 12(sp)
1733 ; ILP32-ILP32F-FPELIM-NEXT: lui a1, 24414
1734 ; ILP32-ILP32F-FPELIM-NEXT: addi a1, a1, 304
1735 ; ILP32-ILP32F-FPELIM-NEXT: add sp, sp, a1
1736 ; ILP32-ILP32F-FPELIM-NEXT: ret
1737 ;
1738 ; ILP32-ILP32F-WITHFP-LABEL: va_large_stack:
1739 ; ILP32-ILP32F-WITHFP: # %bb.0:
1740 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, -2032
1741 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 2032
1742 ; ILP32-ILP32F-WITHFP-NEXT: sw ra, 1996(sp) # 4-byte Folded Spill
1743 ; ILP32-ILP32F-WITHFP-NEXT: sw s0, 1992(sp) # 4-byte Folded Spill
1744 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset ra, -36
1745 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_offset s0, -40
1746 ; ILP32-ILP32F-WITHFP-NEXT: addi s0, sp, 2000
1747 ; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa s0, 32
1748 ; ILP32-ILP32F-WITHFP-NEXT: lui a0, 24414
1749 ; ILP32-ILP32F-WITHFP-NEXT: addi a0, a0, -1728
1750 ; ILP32-ILP32F-WITHFP-NEXT: sub sp, sp, a0
1751 ; ILP32-ILP32F-WITHFP-NEXT: mv a0, a1
1752 ; ILP32-ILP32F-WITHFP-NEXT: sw a7, 28(s0)
1753 ; ILP32-ILP32F-WITHFP-NEXT: sw a6, 24(s0)
1754 ; ILP32-ILP32F-WITHFP-NEXT: sw a5, 20(s0)
1755 ; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
1756 ; ILP32-ILP32F-WITHFP-NEXT: sw a3, 12(s0)
1757 ; ILP32-ILP32F-WITHFP-NEXT: sw a2, 8(s0)
1758 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 4(s0)
1759 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
1760 ; ILP32-ILP32F-WITHFP-NEXT: lui a2, 1024162
1761 ; ILP32-ILP32F-WITHFP-NEXT: addi a2, a2, -272
1762 ; ILP32-ILP32F-WITHFP-NEXT: add a2, s0, a2
1763 ; ILP32-ILP32F-WITHFP-NEXT: sw a1, 0(a2)
1764 ; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414
1765 ; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728
1766 ; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1
1767 ; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) # 4-byte Folded Reload
1768 ; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) # 4-byte Folded Reload
1769 ; ILP32-ILP32F-WITHFP-NEXT: addi sp, sp, 2032
1770 ; ILP32-ILP32F-WITHFP-NEXT: ret
1771 ;
1772 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-LABEL: va_large_stack:
1773 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM: # %bb.0:
1774 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a0, 24414
1775 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a0, a0, 304
1776 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sub sp, sp, a0
1777 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: .cfi_def_cfa_offset 100000048
1778 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: mv a0, a1
1779 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui t0, 24414
1780 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi t0, t0, 300
1781 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add t0, sp, t0
1782 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a7, 0(t0)
1783 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a7, 24414
1784 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a7, a7, 296
1785 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a7, sp, a7
1786 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a6, 0(a7)
1787 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a6, 24414
1788 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a6, a6, 292
1789 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a6, sp, a6
1790 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a5, 0(a6)
1791 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a5, 24414
1792 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a5, a5, 288
1793 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a5, sp, a5
1794 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a4, 0(a5)
1795 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a4, 24414
1796 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a4, a4, 284
1797 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a4, sp, a4
1798 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a3, 0(a4)
1799 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a3, 24414
1800 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a3, a3, 280
1801 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a3, sp, a3
1802 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a2, 0(a3)
1803 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a2, 24414
1804 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a2, a2, 276
1805 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a2, sp, a2
1806 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 0(a2)
1807 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414
1808 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 280
1809 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add a1, sp, a1
1810 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: sw a1, 12(sp)
1811 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: lui a1, 24414
1812 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: addi a1, a1, 304
1813 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: add sp, sp, a1
1814 ; RV32D-ILP32-ILP32F-ILP32D-FPELIM-NEXT: ret
1815 ;
1816 ; LP64-LP64F-LP64D-FPELIM-LABEL: va_large_stack:
1817 ; LP64-LP64F-LP64D-FPELIM: # %bb.0:
1818 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1819 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 336
1820 ; LP64-LP64F-LP64D-FPELIM-NEXT: sub sp, sp, a0
1821 ; LP64-LP64F-LP64D-FPELIM-NEXT: .cfi_def_cfa_offset 100000080
1822 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1823 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280
1824 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1825 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a1, 0(a0)
1826 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1827 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 328
1828 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1829 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a7, 0(a0)
1830 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1831 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 320
1832 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1833 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a6, 0(a0)
1834 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1835 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 312
1836 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1837 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a5, 0(a0)
1838 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1839 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 304
1840 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1841 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a4, 0(a0)
1842 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1843 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 296
1844 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1845 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a3, 0(a0)
1846 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1847 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 288
1848 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1849 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a2, 0(a0)
1850 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1851 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 284
1852 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1853 ; LP64-LP64F-LP64D-FPELIM-NEXT: sd a0, 8(sp)
1854 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a0, 24414
1855 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a0, a0, 280
1856 ; LP64-LP64F-LP64D-FPELIM-NEXT: add a0, sp, a0
1857 ; LP64-LP64F-LP64D-FPELIM-NEXT: lw a0, 0(a0)
1858 ; LP64-LP64F-LP64D-FPELIM-NEXT: lui a1, 24414
1859 ; LP64-LP64F-LP64D-FPELIM-NEXT: addiw a1, a1, 336
1860 ; LP64-LP64F-LP64D-FPELIM-NEXT: add sp, sp, a1
1861 ; LP64-LP64F-LP64D-FPELIM-NEXT: ret
1862 ;
1863 ; LP64-LP64F-LP64D-WITHFP-LABEL: va_large_stack:
1864 ; LP64-LP64F-LP64D-WITHFP: # %bb.0:
1865 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, -2032
1866 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 2032
1867 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd ra, 1960(sp) # 8-byte Folded Spill
1868 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd s0, 1952(sp) # 8-byte Folded Spill
1869 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset ra, -72
1870 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_offset s0, -80
1871 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi s0, sp, 1968
1872 ; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa s0, 64
1873 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a0, 24414
1874 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a0, a0, -1680
1875 ; LP64-LP64F-LP64D-WITHFP-NEXT: sub sp, sp, a0
1876 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a1, 8(s0)
1877 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a7, 56(s0)
1878 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a6, 48(s0)
1879 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a5, 40(s0)
1880 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
1881 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
1882 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
1883 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi a0, s0, 12
1884 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 1024162
1885 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -288
1886 ; LP64-LP64F-LP64D-WITHFP-NEXT: add a1, s0, a1
1887 ; LP64-LP64F-LP64D-WITHFP-NEXT: sd a0, 0(a1)
1888 ; LP64-LP64F-LP64D-WITHFP-NEXT: lw a0, 8(s0)
1889 ; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414
1890 ; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680
1891 ; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1
1892 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) # 8-byte Folded Reload
1893 ; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) # 8-byte Folded Reload
1894 ; LP64-LP64F-LP64D-WITHFP-NEXT: addi sp, sp, 2032
1895 ; LP64-LP64F-LP64D-WITHFP-NEXT: ret
1896 %large = alloca [ 100000000 x i8 ]
1897 %va = alloca i8*, align 4
1898 %1 = bitcast i8** %va to i8*
1899 call void @llvm.va_start(i8* %1)
1900 %argp.cur = load i8*, i8** %va, align 4
1901 %argp.next = getelementptr inbounds i8, i8* %argp.cur, i32 4
1902 store i8* %argp.next, i8** %va, align 4
1903 %2 = bitcast i8* %argp.cur to i32*
1904 %3 = load i32, i32* %2, align 4
1905 call void @llvm.va_end(i8* %1)
1906 ret i32 %3
1907 }