1 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s
3 ; Test that a def operand of super-reg is not dropped during post RA pseudo
4 ; expansion in expandZExtPseudo().
6 define void @fun_llvm_stress_reduced(i8*, i32*, i64*, i32) {
10 %Sl24 = select i1 undef, i32* %1, i32* %1
11 %L26 = load i16, i16* undef
12 %L32 = load i32, i32* %Sl24
15 CF847: ; preds = %CF878, %BB
16 %L61 = load i16, i16* undef
19 CF878: ; preds = %CF847
20 %PC66 = bitcast i32* %Sl24 to double*
21 %Sl67 = select i1 undef, <2 x i32> undef, <2 x i32> undef
22 %Cmp68 = icmp ugt i32 undef, %3
23 br i1 %Cmp68, label %CF847, label %CF863
25 CF863: ; preds = %CF878
26 %L84 = load i16, i16* undef
29 CF825: ; preds = %CF825, %CF863
30 %Sl105 = select i1 undef, i1 undef, i1 undef
31 br i1 %Sl105, label %CF825, label %CF856
33 CF856: ; preds = %CF856, %CF825
34 %Cmp114 = icmp ult i16 -24837, %L61
35 br i1 %Cmp114, label %CF856, label %CF875
37 CF875: ; preds = %CF856
38 %Shuff124 = shufflevector <2 x i32> undef, <2 x i32> undef, <2 x i32> <i32 1, i32 3>
39 %PC126 = bitcast i32* %A to i64*
42 CF827: ; preds = %CF923, %CF911, %CF875
43 %Sl142 = select i1 undef, i64 undef, i64 -1
44 %B148 = sdiv i32 409071, 409071
45 %E153 = extractelement <2 x i32> %Shuff124, i32 1
48 CF911: ; preds = %CF827
49 br i1 undef, label %CF827, label %CF867
51 CF867: ; preds = %CF911
54 CF870: ; preds = %CF870, %CF867
56 %FC176 = fptoui double undef to i1
57 br i1 %FC176, label %CF870, label %CF923
59 CF923: ; preds = %CF870
60 %L179 = load i16, i16* undef
61 %Sl191 = select i1 undef, i64* %PC126, i64* %PC126
62 br i1 false, label %CF827, label %CF828
64 CF828: ; preds = %CF905, %CF923
65 %B205 = urem i16 -7553, undef
66 %E209 = extractelement <2 x i32> %Sl67, i32 1
67 %Cmp215 = icmp ugt i16 %L179, 0
70 CF905: ; preds = %CF828
71 %E231 = extractelement <4 x i1> undef, i32 1
72 br i1 %E231, label %CF828, label %CF829
74 CF829: ; preds = %CF909, %CF829, %CF905
75 %B234 = udiv i16 %L26, %L84
76 br i1 undef, label %CF829, label %CF894
78 CF894: ; preds = %CF894, %CF829
79 store i64 %Sl142, i64* %Sl191
80 %Sl241 = select i1 %Cmp114, i1 false, i1 %Cmp215
81 br i1 %Sl241, label %CF894, label %CF907
83 CF907: ; preds = %CF894
84 %B247 = udiv i32 0, %E153
85 %PC248 = bitcast i64* %2 to i8*
88 CF909: ; preds = %CF907
89 store i1 %FC176, i1* undef
90 %Cmp263 = icmp ugt i1 undef, %Sl241
91 br i1 %Cmp263, label %CF829, label %CF830
93 CF830: ; preds = %CF909
94 %B304 = urem i16 %L84, %B205
95 %I311 = insertelement <2 x i32> %Shuff124, i32 %B247, i32 1
97 %Sl373 = select i1 %Cmp68, i32 0, i32 %E153
100 CF833: ; preds = %CF880, %CF830
103 CF880: ; preds = %CF833
104 %Cmp412 = icmp ne i16 %B234, -18725
105 br i1 %Cmp412, label %CF833, label %CF865
107 CF865: ; preds = %CF880
108 store double 0.000000e+00, double* %PC66
111 CF860: ; preds = %CF860, %CF865
112 store i8 0, i8* %PC248
113 %Cmp600 = icmp sge i32 %B148, undef
114 br i1 %Cmp600, label %CF860, label %CF913
116 CF913: ; preds = %CF860
117 store i32 %E209, i32* undef
118 store i32 %Sl373, i32* undef
119 %Cmp771 = icmp ule i32 undef, %L32
122 CF842: ; preds = %CF925, %CF913
125 CF925: ; preds = %CF842
126 %Cmp778 = icmp sgt i1 %Cmp771, %Sl241
127 br i1 %Cmp778, label %CF842, label %CF898
129 CF898: ; preds = %CF925
130 %Sl785 = select i1 %Cmp600, i16 undef, i16 %B304