1 ; Test f64 and v2f64 strict comparisons.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
6 define <2 x i64> @f1(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
8 ; CHECK: vfcedb %v24, %v26, %v28
10 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
11 <2 x double> %val1, <2 x double> %val2,
13 metadata !"fpexcept.strict") #0
14 %ret = sext <2 x i1> %cmp to <2 x i64>
19 define <2 x i64> @f2(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
21 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
22 ; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v26, %v28
23 ; CHECK: vo %v24, [[REG1]], [[REG2]]
25 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
26 <2 x double> %val1, <2 x double> %val2,
28 metadata !"fpexcept.strict") #0
29 %ret = sext <2 x i1> %cmp to <2 x i64>
34 define <2 x i64> @f3(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
36 ; CHECK: vfchdb %v24, %v26, %v28
38 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
39 <2 x double> %val1, <2 x double> %val2,
41 metadata !"fpexcept.strict") #0
42 %ret = sext <2 x i1> %cmp to <2 x i64>
47 define <2 x i64> @f4(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
49 ; CHECK: vfchedb %v24, %v26, %v28
51 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
52 <2 x double> %val1, <2 x double> %val2,
54 metadata !"fpexcept.strict") #0
55 %ret = sext <2 x i1> %cmp to <2 x i64>
60 define <2 x i64> @f5(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
62 ; CHECK: vfchedb %v24, %v28, %v26
64 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
65 <2 x double> %val1, <2 x double> %val2,
67 metadata !"fpexcept.strict") #0
68 %ret = sext <2 x i1> %cmp to <2 x i64>
73 define <2 x i64> @f6(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
75 ; CHECK: vfchdb %v24, %v28, %v26
77 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
78 <2 x double> %val1, <2 x double> %val2,
80 metadata !"fpexcept.strict") #0
81 %ret = sext <2 x i1> %cmp to <2 x i64>
86 define <2 x i64> @f7(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
88 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
89 ; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v26, %v28
90 ; CHECK: vno %v24, [[REG1]], [[REG2]]
92 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
93 <2 x double> %val1, <2 x double> %val2,
95 metadata !"fpexcept.strict") #0
96 %ret = sext <2 x i1> %cmp to <2 x i64>
101 define <2 x i64> @f8(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
103 ; CHECK: vfcedb [[REG:%v[0-9]+]], %v26, %v28
104 ; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
105 ; CHECK-NEXT: br %r14
106 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
107 <2 x double> %val1, <2 x double> %val2,
109 metadata !"fpexcept.strict") #0
110 %ret = sext <2 x i1> %cmp to <2 x i64>
115 define <2 x i64> @f9(<2 x i64> %dummy, <2 x double> %val1, <2 x double> %val2) #0 {
117 ; CHECK: vfchedb [[REG:%v[0-9]+]], %v28, %v26
118 ; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
119 ; CHECK-NEXT: br %r14
120 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
121 <2 x double> %val1, <2 x double> %val2,
123 metadata !"fpexcept.strict") #0
124 %ret = sext <2 x i1> %cmp to <2 x i64>
129 define <2 x i64> @f10(<2 x i64> %dummy, <2 x double> %val1,
130 <2 x double> %val2) #0 {
132 ; CHECK: vfchdb [[REG:%v[0-9]+]], %v28, %v26
133 ; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
134 ; CHECK-NEXT: br %r14
135 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
136 <2 x double> %val1, <2 x double> %val2,
138 metadata !"fpexcept.strict") #0
139 %ret = sext <2 x i1> %cmp to <2 x i64>
144 define <2 x i64> @f11(<2 x i64> %dummy, <2 x double> %val1,
145 <2 x double> %val2) #0 {
147 ; CHECK: vfchdb [[REG:%v[0-9]+]], %v26, %v28
148 ; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
149 ; CHECK-NEXT: br %r14
150 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
151 <2 x double> %val1, <2 x double> %val2,
153 metadata !"fpexcept.strict") #0
154 %ret = sext <2 x i1> %cmp to <2 x i64>
159 define <2 x i64> @f12(<2 x i64> %dummy, <2 x double> %val1,
160 <2 x double> %val2) #0 {
162 ; CHECK: vfchedb [[REG:%v[0-9]+]], %v26, %v28
163 ; CHECK-NEXT: vno %v24, [[REG]], [[REG]]
164 ; CHECK-NEXT: br %r14
165 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
166 <2 x double> %val1, <2 x double> %val2,
168 metadata !"fpexcept.strict") #0
169 %ret = sext <2 x i1> %cmp to <2 x i64>
174 define <2 x i64> @f13(<2 x i64> %dummy, <2 x double> %val1,
175 <2 x double> %val2) #0 {
177 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
178 ; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v26, %v28
179 ; CHECK: vo %v24, [[REG1]], [[REG2]]
180 ; CHECK-NEXT: br %r14
181 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
182 <2 x double> %val1, <2 x double> %val2,
184 metadata !"fpexcept.strict") #0
185 %ret = sext <2 x i1> %cmp to <2 x i64>
190 define <2 x i64> @f14(<2 x i64> %dummy, <2 x double> %val1,
191 <2 x double> %val2) #0 {
193 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v28, %v26
194 ; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v26, %v28
195 ; CHECK: vno %v24, [[REG1]], [[REG2]]
196 ; CHECK-NEXT: br %r14
197 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
198 <2 x double> %val1, <2 x double> %val2,
200 metadata !"fpexcept.strict") #0
201 %ret = sext <2 x i1> %cmp to <2 x i64>
206 define <2 x double> @f15(<2 x double> %val1, <2 x double> %val2,
207 <2 x double> %val3, <2 x double> %val4) #0 {
209 ; CHECK: vfcedb [[REG:%v[0-9]+]], %v24, %v26
210 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
211 ; CHECK-NEXT: br %r14
212 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
213 <2 x double> %val1, <2 x double> %val2,
215 metadata !"fpexcept.strict") #0
216 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
217 ret <2 x double> %ret
221 define <2 x double> @f16(<2 x double> %val1, <2 x double> %val2,
222 <2 x double> %val3, <2 x double> %val4) #0 {
224 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
225 ; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v24, %v26
226 ; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
227 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
228 ; CHECK-NEXT: br %r14
229 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
230 <2 x double> %val1, <2 x double> %val2,
232 metadata !"fpexcept.strict") #0
233 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
234 ret <2 x double> %ret
238 define <2 x double> @f17(<2 x double> %val1, <2 x double> %val2,
239 <2 x double> %val3, <2 x double> %val4) #0 {
241 ; CHECK: vfchdb [[REG:%v[0-9]+]], %v24, %v26
242 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
243 ; CHECK-NEXT: br %r14
244 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
245 <2 x double> %val1, <2 x double> %val2,
247 metadata !"fpexcept.strict") #0
248 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
249 ret <2 x double> %ret
253 define <2 x double> @f18(<2 x double> %val1, <2 x double> %val2,
254 <2 x double> %val3, <2 x double> %val4) #0 {
256 ; CHECK: vfchedb [[REG:%v[0-9]+]], %v24, %v26
257 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
258 ; CHECK-NEXT: br %r14
259 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
260 <2 x double> %val1, <2 x double> %val2,
262 metadata !"fpexcept.strict") #0
263 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
264 ret <2 x double> %ret
268 define <2 x double> @f19(<2 x double> %val1, <2 x double> %val2,
269 <2 x double> %val3, <2 x double> %val4) #0 {
271 ; CHECK: vfchedb [[REG:%v[0-9]+]], %v26, %v24
272 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
273 ; CHECK-NEXT: br %r14
274 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
275 <2 x double> %val1, <2 x double> %val2,
277 metadata !"fpexcept.strict") #0
278 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
279 ret <2 x double> %ret
283 define <2 x double> @f20(<2 x double> %val1, <2 x double> %val2,
284 <2 x double> %val3, <2 x double> %val4) #0 {
286 ; CHECK: vfchdb [[REG:%v[0-9]+]], %v26, %v24
287 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
288 ; CHECK-NEXT: br %r14
289 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
290 <2 x double> %val1, <2 x double> %val2,
292 metadata !"fpexcept.strict") #0
293 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
294 ret <2 x double> %ret
298 define <2 x double> @f21(<2 x double> %val1, <2 x double> %val2,
299 <2 x double> %val3, <2 x double> %val4) #0 {
301 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
302 ; CHECK-DAG: vfchdb [[REG2:%v[0-9]+]], %v24, %v26
303 ; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
304 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
305 ; CHECK-NEXT: br %r14
306 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
307 <2 x double> %val1, <2 x double> %val2,
309 metadata !"fpexcept.strict") #0
310 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
311 ret <2 x double> %ret
315 define <2 x double> @f22(<2 x double> %val1, <2 x double> %val2,
316 <2 x double> %val3, <2 x double> %val4) #0 {
318 ; CHECK: vfcedb [[REG:%v[0-9]+]], %v24, %v26
319 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
320 ; CHECK-NEXT: br %r14
321 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
322 <2 x double> %val1, <2 x double> %val2,
324 metadata !"fpexcept.strict") #0
325 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
326 ret <2 x double> %ret
330 define <2 x double> @f23(<2 x double> %val1, <2 x double> %val2,
331 <2 x double> %val3, <2 x double> %val4) #0 {
333 ; CHECK: vfchedb [[REG:%v[0-9]+]], %v26, %v24
334 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
335 ; CHECK-NEXT: br %r14
336 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
337 <2 x double> %val1, <2 x double> %val2,
339 metadata !"fpexcept.strict") #0
340 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
341 ret <2 x double> %ret
345 define <2 x double> @f24(<2 x double> %val1, <2 x double> %val2,
346 <2 x double> %val3, <2 x double> %val4) #0 {
348 ; CHECK: vfchdb [[REG:%v[0-9]+]], %v26, %v24
349 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
350 ; CHECK-NEXT: br %r14
351 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
352 <2 x double> %val1, <2 x double> %val2,
354 metadata !"fpexcept.strict") #0
355 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
356 ret <2 x double> %ret
360 define <2 x double> @f25(<2 x double> %val1, <2 x double> %val2,
361 <2 x double> %val3, <2 x double> %val4) #0 {
363 ; CHECK: vfchdb [[REG:%v[0-9]+]], %v24, %v26
364 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
365 ; CHECK-NEXT: br %r14
366 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
367 <2 x double> %val1, <2 x double> %val2,
369 metadata !"fpexcept.strict") #0
370 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
371 ret <2 x double> %ret
375 define <2 x double> @f26(<2 x double> %val1, <2 x double> %val2,
376 <2 x double> %val3, <2 x double> %val4) #0 {
378 ; CHECK: vfchedb [[REG:%v[0-9]+]], %v24, %v26
379 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
380 ; CHECK-NEXT: br %r14
381 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
382 <2 x double> %val1, <2 x double> %val2,
384 metadata !"fpexcept.strict") #0
385 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
386 ret <2 x double> %ret
390 define <2 x double> @f27(<2 x double> %val1, <2 x double> %val2,
391 <2 x double> %val3, <2 x double> %val4) #0 {
393 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
394 ; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v24, %v26
395 ; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
396 ; CHECK-NEXT: vsel %v24, %v28, %v30, [[REG]]
397 ; CHECK-NEXT: br %r14
398 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
399 <2 x double> %val1, <2 x double> %val2,
401 metadata !"fpexcept.strict") #0
402 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
403 ret <2 x double> %ret
407 define <2 x double> @f28(<2 x double> %val1, <2 x double> %val2,
408 <2 x double> %val3, <2 x double> %val4) #0 {
410 ; CHECK-DAG: vfchdb [[REG1:%v[0-9]+]], %v26, %v24
411 ; CHECK-DAG: vfchedb [[REG2:%v[0-9]+]], %v24, %v26
412 ; CHECK: vo [[REG:%v[0-9]+]], [[REG1]], [[REG2]]
413 ; CHECK-NEXT: vsel %v24, %v30, %v28, [[REG]]
414 ; CHECK-NEXT: br %r14
415 %cmp = call <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(
416 <2 x double> %val1, <2 x double> %val2,
418 metadata !"fpexcept.strict") #0
419 %ret = select <2 x i1> %cmp, <2 x double> %val3, <2 x double> %val4
420 ret <2 x double> %ret
423 ; Test an f64 comparison that uses vector registers.
424 define i64 @f29(i64 %a, i64 %b, double %f1, <2 x double> %vec) #0 {
426 ; CHECK: wfcdb %f0, %v24
427 ; CHECK-NEXT: locgrne %r2, %r3
429 %f2 = extractelement <2 x double> %vec, i32 0
430 %cond = call i1 @llvm.experimental.constrained.fcmp.f64(
431 double %f1, double %f2,
433 metadata !"fpexcept.strict") #0
434 %res = select i1 %cond, i64 %a, i64 %b
438 attributes #0 = { strictfp }
440 declare <2 x i1> @llvm.experimental.constrained.fcmp.v2f64(<2 x double>, <2 x double>, metadata, metadata)
441 declare i1 @llvm.experimental.constrained.fcmp.f64(double, double, metadata, metadata)