| blob | d45662158bbc7327d935938f39cca2192427becc |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 < %s | FileCheck %s --check-prefix=CHECK-SSE2
3 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.1 < %s | FileCheck %s --check-prefix=CHECK-SSE41
4 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx < %s | FileCheck %s --check-prefix=CHECK-AVX1
5 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 < %s | FileCheck %s --check-prefix=CHECK-AVX2
6 ; RUN: llc -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512vl < %s | FileCheck %s --check-prefix=CHECK-AVX512VL
8 ; Odd+Even divisors
9 define <4 x i32> @test_srem_odd_even(<4 x i32> %X) nounwind {
10 ; CHECK-SSE2-LABEL: test_srem_odd_even:
11 ; CHECK-SSE2: # %bb.0:
12 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
13 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
14 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
15 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
16 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
17 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
18 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
19 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
20 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
21 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
22 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
23 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
24 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
25 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
26 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
27 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
28 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
29 ; CHECK-SSE2-NEXT: retq
30 ;
31 ; CHECK-SSE41-LABEL: test_srem_odd_even:
32 ; CHECK-SSE41: # %bb.0:
33 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
34 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
35 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
36 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
37 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
38 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
39 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
40 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
41 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
42 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,171798690,42949672]
43 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
44 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
45 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
46 ; CHECK-SSE41-NEXT: retq
47 ;
48 ; CHECK-AVX1-LABEL: test_srem_odd_even:
49 ; CHECK-AVX1: # %bb.0:
50 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
51 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
52 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
53 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
54 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
55 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
56 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
57 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
58 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
59 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
60 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
61 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
62 ; CHECK-AVX1-NEXT: retq
63 ;
64 ; CHECK-AVX2-LABEL: test_srem_odd_even:
65 ; CHECK-AVX2: # %bb.0:
66 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
67 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
68 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
69 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
70 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
71 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
72 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
73 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
74 ; CHECK-AVX2-NEXT: retq
75 ;
76 ; CHECK-AVX512VL-LABEL: test_srem_odd_even:
77 ; CHECK-AVX512VL: # %bb.0:
78 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
79 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
80 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
81 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
82 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
83 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
84 ; CHECK-AVX512VL-NEXT: retq
85 %srem = srem <4 x i32> %X, <i32 5, i32 14, i32 25, i32 100>
86 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
87 %ret = zext <4 x i1> %cmp to <4 x i32>
88 ret <4 x i32> %ret
89 }
91 ;==============================================================================;
93 ; One all-ones divisor in odd divisor
94 define <4 x i32> @test_srem_odd_allones_eq(<4 x i32> %X) nounwind {
95 ; CHECK-SSE2-LABEL: test_srem_odd_allones_eq:
96 ; CHECK-SSE2: # %bb.0:
97 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
98 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
99 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
100 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
101 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
102 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
103 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
104 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
105 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
106 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
107 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
108 ; CHECK-SSE2-NEXT: retq
109 ;
110 ; CHECK-SSE41-LABEL: test_srem_odd_allones_eq:
111 ; CHECK-SSE41: # %bb.0:
112 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
113 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
114 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,4294967295,858993458]
115 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
116 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
117 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
118 ; CHECK-SSE41-NEXT: retq
119 ;
120 ; CHECK-AVX1-LABEL: test_srem_odd_allones_eq:
121 ; CHECK-AVX1: # %bb.0:
122 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
123 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
124 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
125 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
126 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
127 ; CHECK-AVX1-NEXT: retq
128 ;
129 ; CHECK-AVX2-LABEL: test_srem_odd_allones_eq:
130 ; CHECK-AVX2: # %bb.0:
131 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
132 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
133 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [429496729,429496729,429496729,429496729]
134 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
135 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
136 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
137 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
138 ; CHECK-AVX2-NEXT: retq
139 ;
140 ; CHECK-AVX512VL-LABEL: test_srem_odd_allones_eq:
141 ; CHECK-AVX512VL: # %bb.0:
142 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
143 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
144 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
145 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
146 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
147 ; CHECK-AVX512VL-NEXT: retq
148 %srem = srem <4 x i32> %X, <i32 5, i32 5, i32 4294967295, i32 5>
149 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
150 %ret = zext <4 x i1> %cmp to <4 x i32>
151 ret <4 x i32> %ret
152 }
153 define <4 x i32> @test_srem_odd_allones_ne(<4 x i32> %X) nounwind {
154 ; CHECK-SSE2-LABEL: test_srem_odd_allones_ne:
155 ; CHECK-SSE2: # %bb.0:
156 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
157 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
158 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
159 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
160 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
161 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
162 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
163 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
164 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
165 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
166 ; CHECK-SSE2-NEXT: psrld $31, %xmm0
167 ; CHECK-SSE2-NEXT: retq
168 ;
169 ; CHECK-SSE41-LABEL: test_srem_odd_allones_ne:
170 ; CHECK-SSE41: # %bb.0:
171 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
172 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
173 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,4294967295,858993458]
174 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
175 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
176 ; CHECK-SSE41-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
177 ; CHECK-SSE41-NEXT: retq
178 ;
179 ; CHECK-AVX1-LABEL: test_srem_odd_allones_ne:
180 ; CHECK-AVX1: # %bb.0:
181 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
182 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
183 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
184 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
185 ; CHECK-AVX1-NEXT: vpandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
186 ; CHECK-AVX1-NEXT: retq
187 ;
188 ; CHECK-AVX2-LABEL: test_srem_odd_allones_ne:
189 ; CHECK-AVX2: # %bb.0:
190 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
191 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
192 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [429496729,429496729,429496729,429496729]
193 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
194 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
195 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
196 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
197 ; CHECK-AVX2-NEXT: vpandn %xmm1, %xmm0, %xmm0
198 ; CHECK-AVX2-NEXT: retq
199 ;
200 ; CHECK-AVX512VL-LABEL: test_srem_odd_allones_ne:
201 ; CHECK-AVX512VL: # %bb.0:
202 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
203 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
204 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
205 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
206 ; CHECK-AVX512VL-NEXT: vpandnd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
207 ; CHECK-AVX512VL-NEXT: retq
208 %srem = srem <4 x i32> %X, <i32 5, i32 5, i32 4294967295, i32 5>
209 %cmp = icmp ne <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
210 %ret = zext <4 x i1> %cmp to <4 x i32>
211 ret <4 x i32> %ret
212 }
214 ; One all-ones divisor in even divisor
215 define <4 x i32> @test_srem_even_allones_eq(<4 x i32> %X) nounwind {
216 ; CHECK-SSE2-LABEL: test_srem_even_allones_eq:
217 ; CHECK-SSE2: # %bb.0:
218 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
219 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
220 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
221 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
222 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
223 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
224 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
225 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
226 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1
227 ; CHECK-SSE2-NEXT: psrld $1, %xmm1
228 ; CHECK-SSE2-NEXT: pslld $31, %xmm0
229 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
230 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
231 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
232 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
233 ; CHECK-SSE2-NEXT: retq
234 ;
235 ; CHECK-SSE41-LABEL: test_srem_even_allones_eq:
236 ; CHECK-SSE41: # %bb.0:
237 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
238 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
239 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1
240 ; CHECK-SSE41-NEXT: psrld $1, %xmm1
241 ; CHECK-SSE41-NEXT: pslld $31, %xmm0
242 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
243 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,4294967295,306783378]
244 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
245 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
246 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
247 ; CHECK-SSE41-NEXT: retq
248 ;
249 ; CHECK-AVX1-LABEL: test_srem_even_allones_eq:
250 ; CHECK-AVX1: # %bb.0:
251 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
252 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
253 ; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1
254 ; CHECK-AVX1-NEXT: vpslld $31, %xmm0, %xmm0
255 ; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
256 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
257 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
258 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
259 ; CHECK-AVX1-NEXT: retq
260 ;
261 ; CHECK-AVX2-LABEL: test_srem_even_allones_eq:
262 ; CHECK-AVX2: # %bb.0:
263 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
264 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
265 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [306783378,306783378,306783378,306783378]
266 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
267 ; CHECK-AVX2-NEXT: vpsrld $1, %xmm0, %xmm1
268 ; CHECK-AVX2-NEXT: vpslld $31, %xmm0, %xmm0
269 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
270 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
271 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
272 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
273 ; CHECK-AVX2-NEXT: retq
274 ;
275 ; CHECK-AVX512VL-LABEL: test_srem_even_allones_eq:
276 ; CHECK-AVX512VL: # %bb.0:
277 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
278 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
279 ; CHECK-AVX512VL-NEXT: vprord $1, %xmm0, %xmm0
280 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
281 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
282 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
283 ; CHECK-AVX512VL-NEXT: retq
284 %srem = srem <4 x i32> %X, <i32 14, i32 14, i32 4294967295, i32 14>
285 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
286 %ret = zext <4 x i1> %cmp to <4 x i32>
287 ret <4 x i32> %ret
288 }
289 define <4 x i32> @test_srem_even_allones_ne(<4 x i32> %X) nounwind {
290 ; CHECK-SSE2-LABEL: test_srem_even_allones_ne:
291 ; CHECK-SSE2: # %bb.0:
292 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
293 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
294 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
295 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
296 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
297 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
298 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
299 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
300 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1
301 ; CHECK-SSE2-NEXT: psrld $1, %xmm1
302 ; CHECK-SSE2-NEXT: pslld $31, %xmm0
303 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
304 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
305 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
306 ; CHECK-SSE2-NEXT: psrld $31, %xmm0
307 ; CHECK-SSE2-NEXT: retq
308 ;
309 ; CHECK-SSE41-LABEL: test_srem_even_allones_ne:
310 ; CHECK-SSE41: # %bb.0:
311 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
312 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
313 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1
314 ; CHECK-SSE41-NEXT: psrld $1, %xmm1
315 ; CHECK-SSE41-NEXT: pslld $31, %xmm0
316 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
317 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,4294967295,306783378]
318 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
319 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
320 ; CHECK-SSE41-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
321 ; CHECK-SSE41-NEXT: retq
322 ;
323 ; CHECK-AVX1-LABEL: test_srem_even_allones_ne:
324 ; CHECK-AVX1: # %bb.0:
325 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
326 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
327 ; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1
328 ; CHECK-AVX1-NEXT: vpslld $31, %xmm0, %xmm0
329 ; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
330 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
331 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
332 ; CHECK-AVX1-NEXT: vpandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
333 ; CHECK-AVX1-NEXT: retq
334 ;
335 ; CHECK-AVX2-LABEL: test_srem_even_allones_ne:
336 ; CHECK-AVX2: # %bb.0:
337 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
338 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
339 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [306783378,306783378,306783378,306783378]
340 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
341 ; CHECK-AVX2-NEXT: vpsrld $1, %xmm0, %xmm1
342 ; CHECK-AVX2-NEXT: vpslld $31, %xmm0, %xmm0
343 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
344 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
345 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
346 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
347 ; CHECK-AVX2-NEXT: vpandn %xmm1, %xmm0, %xmm0
348 ; CHECK-AVX2-NEXT: retq
349 ;
350 ; CHECK-AVX512VL-LABEL: test_srem_even_allones_ne:
351 ; CHECK-AVX512VL: # %bb.0:
352 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
353 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
354 ; CHECK-AVX512VL-NEXT: vprord $1, %xmm0, %xmm0
355 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
356 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
357 ; CHECK-AVX512VL-NEXT: vpandnd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
358 ; CHECK-AVX512VL-NEXT: retq
359 %srem = srem <4 x i32> %X, <i32 14, i32 14, i32 4294967295, i32 14>
360 %cmp = icmp ne <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
361 %ret = zext <4 x i1> %cmp to <4 x i32>
362 ret <4 x i32> %ret
363 }
365 ; One all-ones divisor in odd+even divisor
366 define <4 x i32> @test_srem_odd_even_allones_eq(<4 x i32> %X) nounwind {
367 ; CHECK-SSE2-LABEL: test_srem_odd_even_allones_eq:
368 ; CHECK-SSE2: # %bb.0:
369 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
370 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
371 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
372 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
373 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
374 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
375 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
376 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
377 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
378 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
379 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
380 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
381 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
382 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
383 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
384 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
385 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
386 ; CHECK-SSE2-NEXT: retq
387 ;
388 ; CHECK-SSE41-LABEL: test_srem_odd_even_allones_eq:
389 ; CHECK-SSE41: # %bb.0:
390 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
391 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
392 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
393 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
394 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
395 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
396 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
397 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
398 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
399 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,4294967295,42949672]
400 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
401 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
402 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
403 ; CHECK-SSE41-NEXT: retq
404 ;
405 ; CHECK-AVX1-LABEL: test_srem_odd_even_allones_eq:
406 ; CHECK-AVX1: # %bb.0:
407 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
408 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
409 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
410 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
411 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
412 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
413 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
414 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
415 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
416 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
417 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
418 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
419 ; CHECK-AVX1-NEXT: retq
420 ;
421 ; CHECK-AVX2-LABEL: test_srem_odd_even_allones_eq:
422 ; CHECK-AVX2: # %bb.0:
423 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
424 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
425 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
426 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
427 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
428 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
429 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
430 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
431 ; CHECK-AVX2-NEXT: retq
432 ;
433 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_allones_eq:
434 ; CHECK-AVX512VL: # %bb.0:
435 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
436 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
437 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
438 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
439 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
440 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
441 ; CHECK-AVX512VL-NEXT: retq
442 %srem = srem <4 x i32> %X, <i32 5, i32 14, i32 4294967295, i32 100>
443 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
444 %ret = zext <4 x i1> %cmp to <4 x i32>
445 ret <4 x i32> %ret
446 }
447 define <4 x i32> @test_srem_odd_even_allones_ne(<4 x i32> %X) nounwind {
448 ; CHECK-SSE2-LABEL: test_srem_odd_even_allones_ne:
449 ; CHECK-SSE2: # %bb.0:
450 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
451 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
452 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
453 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
454 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
455 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
456 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
457 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
458 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
459 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
460 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
461 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
462 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
463 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
464 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
465 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
466 ; CHECK-SSE2-NEXT: psrld $31, %xmm0
467 ; CHECK-SSE2-NEXT: retq
468 ;
469 ; CHECK-SSE41-LABEL: test_srem_odd_even_allones_ne:
470 ; CHECK-SSE41: # %bb.0:
471 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
472 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
473 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
474 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
475 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
476 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
477 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
478 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
479 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
480 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,4294967295,42949672]
481 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
482 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
483 ; CHECK-SSE41-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
484 ; CHECK-SSE41-NEXT: retq
485 ;
486 ; CHECK-AVX1-LABEL: test_srem_odd_even_allones_ne:
487 ; CHECK-AVX1: # %bb.0:
488 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
489 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
490 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
491 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
492 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
493 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
494 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
495 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
496 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
497 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
498 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
499 ; CHECK-AVX1-NEXT: vpandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
500 ; CHECK-AVX1-NEXT: retq
501 ;
502 ; CHECK-AVX2-LABEL: test_srem_odd_even_allones_ne:
503 ; CHECK-AVX2: # %bb.0:
504 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
505 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
506 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
507 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
508 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
509 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
510 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
511 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [1,1,1,1]
512 ; CHECK-AVX2-NEXT: vpandn %xmm1, %xmm0, %xmm0
513 ; CHECK-AVX2-NEXT: retq
514 ;
515 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_allones_ne:
516 ; CHECK-AVX512VL: # %bb.0:
517 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
518 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
519 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
520 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
521 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
522 ; CHECK-AVX512VL-NEXT: vpandnd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
523 ; CHECK-AVX512VL-NEXT: retq
524 %srem = srem <4 x i32> %X, <i32 5, i32 14, i32 4294967295, i32 100>
525 %cmp = icmp ne <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
526 %ret = zext <4 x i1> %cmp to <4 x i32>
527 ret <4 x i32> %ret
528 }
530 ;------------------------------------------------------------------------------;
532 ; One power-of-two divisor in odd divisor
533 define <4 x i32> @test_srem_odd_poweroftwo(<4 x i32> %X) nounwind {
534 ; CHECK-SSE2-LABEL: test_srem_odd_poweroftwo:
535 ; CHECK-SSE2: # %bb.0:
536 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
537 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
538 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
539 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
540 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
541 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
542 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
543 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
544 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
545 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
546 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
547 ; CHECK-SSE2-NEXT: psrlq $32, %xmm0
548 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
549 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
550 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
551 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
552 ; CHECK-SSE2-NEXT: retq
553 ;
554 ; CHECK-SSE41-LABEL: test_srem_odd_poweroftwo:
555 ; CHECK-SSE41: # %bb.0:
556 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
557 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
558 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = <1,u,268435456,u>
559 ; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm1
560 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
561 ; CHECK-SSE41-NEXT: psrlq $32, %xmm1
562 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
563 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,268435454,858993458]
564 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
565 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
566 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
567 ; CHECK-SSE41-NEXT: retq
568 ;
569 ; CHECK-AVX1-LABEL: test_srem_odd_poweroftwo:
570 ; CHECK-AVX1: # %bb.0:
571 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
572 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
573 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
574 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
575 ; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1
576 ; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
577 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
578 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
579 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
580 ; CHECK-AVX1-NEXT: retq
581 ;
582 ; CHECK-AVX2-LABEL: test_srem_odd_poweroftwo:
583 ; CHECK-AVX2: # %bb.0:
584 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
585 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
586 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
587 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
588 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
589 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
590 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
591 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
592 ; CHECK-AVX2-NEXT: retq
593 ;
594 ; CHECK-AVX512VL-LABEL: test_srem_odd_poweroftwo:
595 ; CHECK-AVX512VL: # %bb.0:
596 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
597 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
598 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
599 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
600 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
601 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
602 ; CHECK-AVX512VL-NEXT: retq
603 %srem = srem <4 x i32> %X, <i32 5, i32 5, i32 16, i32 5>
604 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
605 %ret = zext <4 x i1> %cmp to <4 x i32>
606 ret <4 x i32> %ret
607 }
609 ; One power-of-two divisor in even divisor
610 define <4 x i32> @test_srem_even_poweroftwo(<4 x i32> %X) nounwind {
611 ; CHECK-SSE2-LABEL: test_srem_even_poweroftwo:
612 ; CHECK-SSE2: # %bb.0:
613 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
614 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
615 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
616 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
617 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
618 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
619 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
620 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648,268435456,2147483648]
621 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
622 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
623 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
624 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
625 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,3,2,3]
626 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
627 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
628 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
629 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
630 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
631 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
632 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
633 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
634 ; CHECK-SSE2-NEXT: retq
635 ;
636 ; CHECK-SSE41-LABEL: test_srem_even_poweroftwo:
637 ; CHECK-SSE41: # %bb.0:
638 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
639 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
640 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
641 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
642 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
643 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
644 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
645 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
646 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
647 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
648 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,268435454,306783378]
649 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
650 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
651 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
652 ; CHECK-SSE41-NEXT: retq
653 ;
654 ; CHECK-AVX1-LABEL: test_srem_even_poweroftwo:
655 ; CHECK-AVX1: # %bb.0:
656 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
657 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
658 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
659 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
660 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
661 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
662 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
663 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
664 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
665 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
666 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
667 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
668 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
669 ; CHECK-AVX1-NEXT: retq
670 ;
671 ; CHECK-AVX2-LABEL: test_srem_even_poweroftwo:
672 ; CHECK-AVX2: # %bb.0:
673 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
674 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
675 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
676 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
677 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
678 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
679 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
680 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
681 ; CHECK-AVX2-NEXT: retq
682 ;
683 ; CHECK-AVX512VL-LABEL: test_srem_even_poweroftwo:
684 ; CHECK-AVX512VL: # %bb.0:
685 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
686 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
687 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
688 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
689 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
690 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
691 ; CHECK-AVX512VL-NEXT: retq
692 %srem = srem <4 x i32> %X, <i32 14, i32 14, i32 16, i32 14>
693 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
694 %ret = zext <4 x i1> %cmp to <4 x i32>
695 ret <4 x i32> %ret
696 }
698 ; One power-of-two divisor in odd+even divisor
699 define <4 x i32> @test_srem_odd_even_poweroftwo(<4 x i32> %X) nounwind {
700 ; CHECK-SSE2-LABEL: test_srem_odd_even_poweroftwo:
701 ; CHECK-SSE2: # %bb.0:
702 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
703 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
704 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
705 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
706 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
707 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
708 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
709 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [1,2147483648,268435456,1073741824]
710 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
711 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
712 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
713 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
714 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,3,2,3]
715 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
716 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
717 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
718 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
719 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
720 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
721 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
722 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
723 ; CHECK-SSE2-NEXT: retq
724 ;
725 ; CHECK-SSE41-LABEL: test_srem_odd_even_poweroftwo:
726 ; CHECK-SSE41: # %bb.0:
727 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
728 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
729 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
730 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
731 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
732 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
733 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
734 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
735 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
736 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
737 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,268435454,42949672]
738 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
739 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
740 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
741 ; CHECK-SSE41-NEXT: retq
742 ;
743 ; CHECK-AVX1-LABEL: test_srem_odd_even_poweroftwo:
744 ; CHECK-AVX1: # %bb.0:
745 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
746 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
747 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
748 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
749 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
750 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
751 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
752 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
753 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
754 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
755 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
756 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
757 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
758 ; CHECK-AVX1-NEXT: retq
759 ;
760 ; CHECK-AVX2-LABEL: test_srem_odd_even_poweroftwo:
761 ; CHECK-AVX2: # %bb.0:
762 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
763 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
764 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
765 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
766 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
767 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
768 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
769 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
770 ; CHECK-AVX2-NEXT: retq
771 ;
772 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_poweroftwo:
773 ; CHECK-AVX512VL: # %bb.0:
774 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
775 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
776 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
777 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
778 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
779 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
780 ; CHECK-AVX512VL-NEXT: retq
781 %srem = srem <4 x i32> %X, <i32 5, i32 14, i32 16, i32 100>
782 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
783 %ret = zext <4 x i1> %cmp to <4 x i32>
784 ret <4 x i32> %ret
785 }
787 ;------------------------------------------------------------------------------;
789 ; One one divisor in odd divisor
790 define <4 x i32> @test_srem_odd_one(<4 x i32> %X) nounwind {
791 ; CHECK-SSE2-LABEL: test_srem_odd_one:
792 ; CHECK-SSE2: # %bb.0:
793 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
794 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
795 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
796 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
797 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
798 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
799 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
800 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
801 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
802 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
803 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
804 ; CHECK-SSE2-NEXT: retq
805 ;
806 ; CHECK-SSE41-LABEL: test_srem_odd_one:
807 ; CHECK-SSE41: # %bb.0:
808 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
809 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
810 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,4294967295,858993458]
811 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
812 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
813 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
814 ; CHECK-SSE41-NEXT: retq
815 ;
816 ; CHECK-AVX1-LABEL: test_srem_odd_one:
817 ; CHECK-AVX1: # %bb.0:
818 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
819 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
820 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
821 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
822 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
823 ; CHECK-AVX1-NEXT: retq
824 ;
825 ; CHECK-AVX2-LABEL: test_srem_odd_one:
826 ; CHECK-AVX2: # %bb.0:
827 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
828 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
829 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [429496729,429496729,429496729,429496729]
830 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
831 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
832 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
833 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
834 ; CHECK-AVX2-NEXT: retq
835 ;
836 ; CHECK-AVX512VL-LABEL: test_srem_odd_one:
837 ; CHECK-AVX512VL: # %bb.0:
838 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
839 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
840 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
841 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
842 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
843 ; CHECK-AVX512VL-NEXT: retq
844 %srem = srem <4 x i32> %X, <i32 5, i32 5, i32 1, i32 5>
845 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
846 %ret = zext <4 x i1> %cmp to <4 x i32>
847 ret <4 x i32> %ret
848 }
850 ; One one divisor in even divisor
851 define <4 x i32> @test_srem_even_one(<4 x i32> %X) nounwind {
852 ; CHECK-SSE2-LABEL: test_srem_even_one:
853 ; CHECK-SSE2: # %bb.0:
854 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
855 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
856 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
857 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
858 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
859 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
860 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
861 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
862 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1
863 ; CHECK-SSE2-NEXT: psrld $1, %xmm1
864 ; CHECK-SSE2-NEXT: pslld $31, %xmm0
865 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
866 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
867 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
868 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
869 ; CHECK-SSE2-NEXT: retq
870 ;
871 ; CHECK-SSE41-LABEL: test_srem_even_one:
872 ; CHECK-SSE41: # %bb.0:
873 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
874 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
875 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1
876 ; CHECK-SSE41-NEXT: psrld $1, %xmm1
877 ; CHECK-SSE41-NEXT: pslld $31, %xmm0
878 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
879 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,306783378,4294967295,306783378]
880 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
881 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
882 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
883 ; CHECK-SSE41-NEXT: retq
884 ;
885 ; CHECK-AVX1-LABEL: test_srem_even_one:
886 ; CHECK-AVX1: # %bb.0:
887 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
888 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
889 ; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1
890 ; CHECK-AVX1-NEXT: vpslld $31, %xmm0, %xmm0
891 ; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
892 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
893 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
894 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
895 ; CHECK-AVX1-NEXT: retq
896 ;
897 ; CHECK-AVX2-LABEL: test_srem_even_one:
898 ; CHECK-AVX2: # %bb.0:
899 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
900 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
901 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [306783378,306783378,306783378,306783378]
902 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
903 ; CHECK-AVX2-NEXT: vpsrld $1, %xmm0, %xmm1
904 ; CHECK-AVX2-NEXT: vpslld $31, %xmm0, %xmm0
905 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
906 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
907 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
908 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
909 ; CHECK-AVX2-NEXT: retq
910 ;
911 ; CHECK-AVX512VL-LABEL: test_srem_even_one:
912 ; CHECK-AVX512VL: # %bb.0:
913 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
914 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
915 ; CHECK-AVX512VL-NEXT: vprord $1, %xmm0, %xmm0
916 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
917 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
918 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
919 ; CHECK-AVX512VL-NEXT: retq
920 %srem = srem <4 x i32> %X, <i32 14, i32 14, i32 1, i32 14>
921 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
922 %ret = zext <4 x i1> %cmp to <4 x i32>
923 ret <4 x i32> %ret
924 }
926 ; One one divisor in odd+even divisor
927 define <4 x i32> @test_srem_odd_even_one(<4 x i32> %X) nounwind {
928 ; CHECK-SSE2-LABEL: test_srem_odd_even_one:
929 ; CHECK-SSE2: # %bb.0:
930 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
931 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
932 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
933 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
934 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
935 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
936 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
937 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
938 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
939 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
940 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
941 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
942 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
943 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
944 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
945 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
946 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
947 ; CHECK-SSE2-NEXT: retq
948 ;
949 ; CHECK-SSE41-LABEL: test_srem_odd_even_one:
950 ; CHECK-SSE41: # %bb.0:
951 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
952 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
953 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
954 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
955 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
956 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
957 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
958 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
959 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
960 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,306783378,4294967295,42949672]
961 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
962 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
963 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
964 ; CHECK-SSE41-NEXT: retq
965 ;
966 ; CHECK-AVX1-LABEL: test_srem_odd_even_one:
967 ; CHECK-AVX1: # %bb.0:
968 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
969 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
970 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
971 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
972 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
973 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
974 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
975 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
976 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
977 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
978 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
979 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
980 ; CHECK-AVX1-NEXT: retq
981 ;
982 ; CHECK-AVX2-LABEL: test_srem_odd_even_one:
983 ; CHECK-AVX2: # %bb.0:
984 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
985 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
986 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
987 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
988 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
989 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
990 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
991 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
992 ; CHECK-AVX2-NEXT: retq
993 ;
994 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_one:
995 ; CHECK-AVX512VL: # %bb.0:
996 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
997 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
998 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
999 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1000 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1001 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1002 ; CHECK-AVX512VL-NEXT: retq
1003 %srem = srem <4 x i32> %X, <i32 5, i32 14, i32 1, i32 100>
1004 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1005 %ret = zext <4 x i1> %cmp to <4 x i32>
1006 ret <4 x i32> %ret
1007 }
1009 ;------------------------------------------------------------------------------;
1011 ; One INT_MIN divisor in odd divisor
1012 define <4 x i32> @test_srem_odd_INT_MIN(<4 x i32> %X) nounwind {
1013 ; CHECK-SSE2-LABEL: test_srem_odd_INT_MIN:
1014 ; CHECK-SSE2: # %bb.0:
1015 ; CHECK-SSE2-NEXT: pxor %xmm1, %xmm1
1016 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483647,2147483647,2147483647,2147483647]
1017 ; CHECK-SSE2-NEXT: pand %xmm0, %xmm2
1018 ; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm2
1019 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1020 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1021 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[0,2,2,3]
1022 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1023 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
1024 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
1025 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1026 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1027 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1028 ; CHECK-SSE2-NEXT: pcmpeqd %xmm0, %xmm0
1029 ; CHECK-SSE2-NEXT: pxor %xmm3, %xmm0
1030 ; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm2 = xmm2[2,0],xmm0[3,0]
1031 ; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm2[0,2]
1032 ; CHECK-SSE2-NEXT: psrld $31, %xmm0
1033 ; CHECK-SSE2-NEXT: retq
1034 ;
1035 ; CHECK-SSE41-LABEL: test_srem_odd_INT_MIN:
1036 ; CHECK-SSE41: # %bb.0:
1037 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
1038 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [2147483647,2147483647,2147483647,2147483647]
1039 ; CHECK-SSE41-NEXT: pand %xmm0, %xmm2
1040 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm2
1041 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1042 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1043 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,858993458,0,858993458]
1044 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1045 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1046 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5],xmm0[6,7]
1047 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1048 ; CHECK-SSE41-NEXT: retq
1049 ;
1050 ; CHECK-AVX1-LABEL: test_srem_odd_INT_MIN:
1051 ; CHECK-AVX1: # %bb.0:
1052 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1053 ; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1054 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm2, %xmm1
1055 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1056 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1057 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1058 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
1059 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1060 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1061 ; CHECK-AVX1-NEXT: retq
1062 ;
1063 ; CHECK-AVX2-LABEL: test_srem_odd_INT_MIN:
1064 ; CHECK-AVX2: # %bb.0:
1065 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1066 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2147483647,2147483647,2147483647,2147483647]
1067 ; CHECK-AVX2-NEXT: vpand %xmm2, %xmm0, %xmm2
1068 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm2, %xmm1
1069 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1070 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1071 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1072 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
1073 ; CHECK-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1074 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1075 ; CHECK-AVX2-NEXT: retq
1076 ;
1077 ; CHECK-AVX512VL-LABEL: test_srem_odd_INT_MIN:
1078 ; CHECK-AVX512VL: # %bb.0:
1079 ; CHECK-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
1080 ; CHECK-AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm2
1081 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm2, %xmm1
1082 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1083 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1084 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1085 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
1086 ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1087 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1088 ; CHECK-AVX512VL-NEXT: retq
1089 %srem = srem <4 x i32> %X, <i32 5, i32 5, i32 2147483648, i32 5>
1090 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1091 %ret = zext <4 x i1> %cmp to <4 x i32>
1092 ret <4 x i32> %ret
1093 }
1095 ; One INT_MIN divisor in even divisor
1096 define <4 x i32> @test_srem_even_INT_MIN(<4 x i32> %X) nounwind {
1097 ; CHECK-SSE2-LABEL: test_srem_even_INT_MIN:
1098 ; CHECK-SSE2: # %bb.0:
1099 ; CHECK-SSE2-NEXT: pxor %xmm2, %xmm2
1100 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3067833783,3067833783,1,3067833783]
1101 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
1102 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1103 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1104 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1105 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
1106 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
1107 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1108 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [2147483648,2147483648,2,2147483648]
1109 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm3
1110 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
1111 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
1112 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1113 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
1114 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
1115 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
1116 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1117 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
1118 ; CHECK-SSE2-NEXT: por %xmm4, %xmm3
1119 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1120 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1121 ; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm1
1122 ; CHECK-SSE2-NEXT: pxor %xmm3, %xmm1
1123 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1124 ; CHECK-SSE2-NEXT: pcmpeqd %xmm2, %xmm0
1125 ; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
1126 ; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
1127 ; CHECK-SSE2-NEXT: psrld $31, %xmm1
1128 ; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0
1129 ; CHECK-SSE2-NEXT: retq
1130 ;
1131 ; CHECK-SSE41-LABEL: test_srem_even_INT_MIN:
1132 ; CHECK-SSE41: # %bb.0:
1133 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
1134 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3067833783,3067833783,1,3067833783]
1135 ; CHECK-SSE41-NEXT: pmulld %xmm0, %xmm2
1136 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1137 ; CHECK-SSE41-NEXT: paddd %xmm3, %xmm2
1138 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1139 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
1140 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
1141 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
1142 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3],xmm5[4,5],xmm4[6,7]
1143 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,0,2,2]
1144 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]
1145 ; CHECK-SSE41-NEXT: por %xmm5, %xmm4
1146 ; CHECK-SSE41-NEXT: pminud %xmm4, %xmm3
1147 ; CHECK-SSE41-NEXT: pcmpeqd %xmm4, %xmm3
1148 ; CHECK-SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1149 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1150 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5],xmm3[6,7]
1151 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1152 ; CHECK-SSE41-NEXT: retq
1153 ;
1154 ; CHECK-AVX1-LABEL: test_srem_even_INT_MIN:
1155 ; CHECK-AVX1: # %bb.0:
1156 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1157 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1158 ; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1159 ; CHECK-AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2
1160 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1161 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm4
1162 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1163 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm5 = xmm2[1,1,3,3]
1164 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm5 = xmm5[0,1],xmm4[2,3],xmm5[4,5],xmm4[6,7]
1165 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm4[0,0,2,2]
1166 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7]
1167 ; CHECK-AVX1-NEXT: vpor %xmm5, %xmm2, %xmm2
1168 ; CHECK-AVX1-NEXT: vpminud %xmm3, %xmm2, %xmm3
1169 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1170 ; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1171 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1172 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5],xmm2[6,7]
1173 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1174 ; CHECK-AVX1-NEXT: retq
1175 ;
1176 ; CHECK-AVX2-LABEL: test_srem_even_INT_MIN:
1177 ; CHECK-AVX2: # %bb.0:
1178 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1179 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1180 ; CHECK-AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1181 ; CHECK-AVX2-NEXT: vpaddd %xmm3, %xmm2, %xmm2
1182 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm4
1183 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1184 ; CHECK-AVX2-NEXT: vpor %xmm4, %xmm2, %xmm2
1185 ; CHECK-AVX2-NEXT: vpminud %xmm3, %xmm2, %xmm3
1186 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1187 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [2147483647,2147483647,2147483647,2147483647]
1188 ; CHECK-AVX2-NEXT: vpand %xmm3, %xmm0, %xmm0
1189 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1190 ; CHECK-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm0[2],xmm2[3]
1191 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1192 ; CHECK-AVX2-NEXT: retq
1193 ;
1194 ; CHECK-AVX512VL-LABEL: test_srem_even_INT_MIN:
1195 ; CHECK-AVX512VL: # %bb.0:
1196 ; CHECK-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
1197 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1198 ; CHECK-AVX512VL-NEXT: vmovdqa {{.*#+}} xmm3 = [306783378,306783378,0,306783378]
1199 ; CHECK-AVX512VL-NEXT: vpaddd %xmm3, %xmm2, %xmm2
1200 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1201 ; CHECK-AVX512VL-NEXT: vpminud %xmm3, %xmm2, %xmm3
1202 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1203 ; CHECK-AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1204 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1205 ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm0[2],xmm2[3]
1206 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1207 ; CHECK-AVX512VL-NEXT: retq
1208 %srem = srem <4 x i32> %X, <i32 14, i32 14, i32 2147483648, i32 14>
1209 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1210 %ret = zext <4 x i1> %cmp to <4 x i32>
1211 ret <4 x i32> %ret
1212 }
1214 ; One INT_MIN divisor in odd+even divisor
1215 define <4 x i32> @test_srem_odd_even_INT_MIN(<4 x i32> %X) nounwind {
1216 ; CHECK-SSE2-LABEL: test_srem_odd_even_INT_MIN:
1217 ; CHECK-SSE2: # %bb.0:
1218 ; CHECK-SSE2-NEXT: pxor %xmm2, %xmm2
1219 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,3067833783,1,3264175145]
1220 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
1221 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1222 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1223 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1224 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
1225 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
1226 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1227 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,2147483648,2,1073741824]
1228 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm3
1229 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
1230 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
1231 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1232 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,3,2,3]
1233 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
1234 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
1235 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1236 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
1237 ; CHECK-SSE2-NEXT: por %xmm4, %xmm3
1238 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1239 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1240 ; CHECK-SSE2-NEXT: pcmpeqd %xmm1, %xmm1
1241 ; CHECK-SSE2-NEXT: pxor %xmm3, %xmm1
1242 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1243 ; CHECK-SSE2-NEXT: pcmpeqd %xmm2, %xmm0
1244 ; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0],xmm1[3,0]
1245 ; CHECK-SSE2-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,2]
1246 ; CHECK-SSE2-NEXT: psrld $31, %xmm1
1247 ; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm0
1248 ; CHECK-SSE2-NEXT: retq
1249 ;
1250 ; CHECK-SSE41-LABEL: test_srem_odd_even_INT_MIN:
1251 ; CHECK-SSE41: # %bb.0:
1252 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
1253 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [3435973837,3067833783,1,3264175145]
1254 ; CHECK-SSE41-NEXT: pmulld %xmm0, %xmm2
1255 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
1256 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
1257 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1258 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
1259 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1260 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7]
1261 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,0,2,2]
1262 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]
1263 ; CHECK-SSE41-NEXT: por %xmm4, %xmm3
1264 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm2 = [858993458,306783378,0,42949672]
1265 ; CHECK-SSE41-NEXT: pminud %xmm3, %xmm2
1266 ; CHECK-SSE41-NEXT: pcmpeqd %xmm3, %xmm2
1267 ; CHECK-SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1268 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1269 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5],xmm2[6,7]
1270 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1271 ; CHECK-SSE41-NEXT: retq
1272 ;
1273 ; CHECK-AVX1-LABEL: test_srem_odd_even_INT_MIN:
1274 ; CHECK-AVX1: # %bb.0:
1275 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
1276 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1277 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1278 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm2[1,1,3,3]
1279 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3
1280 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1281 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm2[1,1,3,3]
1282 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7]
1283 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm3[0,0,2,2]
1284 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]
1285 ; CHECK-AVX1-NEXT: vpor %xmm4, %xmm2, %xmm2
1286 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm3
1287 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1288 ; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1289 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1290 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5],xmm2[6,7]
1291 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1292 ; CHECK-AVX1-NEXT: retq
1293 ;
1294 ; CHECK-AVX2-LABEL: test_srem_odd_even_INT_MIN:
1295 ; CHECK-AVX2: # %bb.0:
1296 ; CHECK-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1
1297 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1298 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1299 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm3
1300 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm2
1301 ; CHECK-AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2
1302 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2, %xmm3
1303 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm3, %xmm2, %xmm2
1304 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [2147483647,2147483647,2147483647,2147483647]
1305 ; CHECK-AVX2-NEXT: vpand %xmm3, %xmm0, %xmm0
1306 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1307 ; CHECK-AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0,1],xmm0[2],xmm2[3]
1308 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1309 ; CHECK-AVX2-NEXT: retq
1310 ;
1311 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_INT_MIN:
1312 ; CHECK-AVX512VL: # %bb.0:
1313 ; CHECK-AVX512VL-NEXT: vpxor %xmm1, %xmm1, %xmm1
1314 ; CHECK-AVX512VL-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm2
1315 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm2, %xmm1
1316 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1317 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1318 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1319 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2
1320 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm2, %xmm0, %xmm0
1321 ; CHECK-AVX512VL-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2],xmm0[3]
1322 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1323 ; CHECK-AVX512VL-NEXT: retq
1324 %srem = srem <4 x i32> %X, <i32 5, i32 14, i32 2147483648, i32 100>
1325 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1326 %ret = zext <4 x i1> %cmp to <4 x i32>
1327 ret <4 x i32> %ret
1328 }
1330 ;==============================================================================;
1332 ; One all-ones divisor and power-of-two divisor divisor in odd divisor
1333 define <4 x i32> @test_srem_odd_allones_and_poweroftwo(<4 x i32> %X) nounwind {
1334 ; CHECK-SSE2-LABEL: test_srem_odd_allones_and_poweroftwo:
1335 ; CHECK-SSE2: # %bb.0:
1336 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1337 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1338 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1339 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1340 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1341 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1342 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1343 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
1344 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1345 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
1346 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
1347 ; CHECK-SSE2-NEXT: psrlq $32, %xmm0
1348 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
1349 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1350 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1351 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1352 ; CHECK-SSE2-NEXT: retq
1353 ;
1354 ; CHECK-SSE41-LABEL: test_srem_odd_allones_and_poweroftwo:
1355 ; CHECK-SSE41: # %bb.0:
1356 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1357 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1358 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = <1,u,268435456,u>
1359 ; CHECK-SSE41-NEXT: pmuludq %xmm0, %xmm1
1360 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
1361 ; CHECK-SSE41-NEXT: psrlq $32, %xmm1
1362 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
1363 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435454,858993458]
1364 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1365 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1366 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1367 ; CHECK-SSE41-NEXT: retq
1368 ;
1369 ; CHECK-AVX1-LABEL: test_srem_odd_allones_and_poweroftwo:
1370 ; CHECK-AVX1: # %bb.0:
1371 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1372 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1373 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1374 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3],xmm1[4,5],xmm0[6,7]
1375 ; CHECK-AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1
1376 ; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1377 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1378 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1379 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1380 ; CHECK-AVX1-NEXT: retq
1381 ;
1382 ; CHECK-AVX2-LABEL: test_srem_odd_allones_and_poweroftwo:
1383 ; CHECK-AVX2: # %bb.0:
1384 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1385 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1386 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1387 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1388 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1389 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1390 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1391 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1392 ; CHECK-AVX2-NEXT: retq
1393 ;
1394 ; CHECK-AVX512VL-LABEL: test_srem_odd_allones_and_poweroftwo:
1395 ; CHECK-AVX512VL: # %bb.0:
1396 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1397 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1398 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1399 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1400 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1401 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1402 ; CHECK-AVX512VL-NEXT: retq
1403 %srem = srem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 5>
1404 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1405 %ret = zext <4 x i1> %cmp to <4 x i32>
1406 ret <4 x i32> %ret
1407 }
1409 ; One all-ones divisor and power-of-two divisor divisor in even divisor
1410 define <4 x i32> @test_srem_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {
1411 ; CHECK-SSE2-LABEL: test_srem_even_allones_and_poweroftwo:
1412 ; CHECK-SSE2: # %bb.0:
1413 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1414 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1415 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1416 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1417 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1418 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1419 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1420 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,1,268435456,2147483648]
1421 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
1422 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1423 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1424 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1425 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,3,2,3]
1426 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
1427 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
1428 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
1429 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1430 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
1431 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1432 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1433 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1434 ; CHECK-SSE2-NEXT: retq
1435 ;
1436 ; CHECK-SSE41-LABEL: test_srem_even_allones_and_poweroftwo:
1437 ; CHECK-SSE41: # %bb.0:
1438 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1439 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1440 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1441 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1442 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1443 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1444 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1445 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1446 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1447 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1448 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,268435454,306783378]
1449 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1450 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1451 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1452 ; CHECK-SSE41-NEXT: retq
1453 ;
1454 ; CHECK-AVX1-LABEL: test_srem_even_allones_and_poweroftwo:
1455 ; CHECK-AVX1: # %bb.0:
1456 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1457 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1458 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1459 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1460 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1461 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1462 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1463 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1464 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1465 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
1466 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1467 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1468 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1469 ; CHECK-AVX1-NEXT: retq
1470 ;
1471 ; CHECK-AVX2-LABEL: test_srem_even_allones_and_poweroftwo:
1472 ; CHECK-AVX2: # %bb.0:
1473 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1474 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1475 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1476 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1477 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1478 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1479 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1480 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1481 ; CHECK-AVX2-NEXT: retq
1482 ;
1483 ; CHECK-AVX512VL-LABEL: test_srem_even_allones_and_poweroftwo:
1484 ; CHECK-AVX512VL: # %bb.0:
1485 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1486 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1487 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1488 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1489 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1490 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1491 ; CHECK-AVX512VL-NEXT: retq
1492 %srem = srem <4 x i32> %X, <i32 14, i32 4294967295, i32 16, i32 14>
1493 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1494 %ret = zext <4 x i1> %cmp to <4 x i32>
1495 ret <4 x i32> %ret
1496 }
1498 ; One all-ones divisor and power-of-two divisor divisor in odd+even divisor
1499 define <4 x i32> @test_srem_odd_even_allones_and_poweroftwo(<4 x i32> %X) nounwind {
1500 ; CHECK-SSE2-LABEL: test_srem_odd_even_allones_and_poweroftwo:
1501 ; CHECK-SSE2: # %bb.0:
1502 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1503 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1504 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1505 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1506 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1507 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1508 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1509 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [1,1,268435456,1073741824]
1510 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
1511 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1512 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1513 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1514 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,3,2,3]
1515 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
1516 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
1517 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
1518 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1519 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
1520 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1521 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1522 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1523 ; CHECK-SSE2-NEXT: retq
1524 ;
1525 ; CHECK-SSE41-LABEL: test_srem_odd_even_allones_and_poweroftwo:
1526 ; CHECK-SSE41: # %bb.0:
1527 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1528 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1529 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1530 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1531 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1532 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1533 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1534 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1535 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1536 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1537 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435454,42949672]
1538 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1539 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1540 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1541 ; CHECK-SSE41-NEXT: retq
1542 ;
1543 ; CHECK-AVX1-LABEL: test_srem_odd_even_allones_and_poweroftwo:
1544 ; CHECK-AVX1: # %bb.0:
1545 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1546 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1547 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1548 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1549 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1550 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1551 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1552 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1553 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1554 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
1555 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1556 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1557 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1558 ; CHECK-AVX1-NEXT: retq
1559 ;
1560 ; CHECK-AVX2-LABEL: test_srem_odd_even_allones_and_poweroftwo:
1561 ; CHECK-AVX2: # %bb.0:
1562 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1563 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1564 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1565 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1566 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1567 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1568 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1569 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1570 ; CHECK-AVX2-NEXT: retq
1571 ;
1572 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_allones_and_poweroftwo:
1573 ; CHECK-AVX512VL: # %bb.0:
1574 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1575 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1576 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1577 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1578 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1579 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1580 ; CHECK-AVX512VL-NEXT: retq
1581 %srem = srem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 100>
1582 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1583 %ret = zext <4 x i1> %cmp to <4 x i32>
1584 ret <4 x i32> %ret
1585 }
1587 ;------------------------------------------------------------------------------;
1589 ; One all-ones divisor and one one divisor in odd divisor
1590 define <4 x i32> @test_srem_odd_allones_and_one(<4 x i32> %X) nounwind {
1591 ; CHECK-SSE2-LABEL: test_srem_odd_allones_and_one:
1592 ; CHECK-SSE2: # %bb.0:
1593 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
1594 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1595 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
1596 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1597 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
1598 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
1599 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1600 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1601 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1602 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1603 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1604 ; CHECK-SSE2-NEXT: retq
1605 ;
1606 ; CHECK-SSE41-LABEL: test_srem_odd_allones_and_one:
1607 ; CHECK-SSE41: # %bb.0:
1608 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1609 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1610 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,4294967295,858993458]
1611 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1612 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1613 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1614 ; CHECK-SSE41-NEXT: retq
1615 ;
1616 ; CHECK-AVX1-LABEL: test_srem_odd_allones_and_one:
1617 ; CHECK-AVX1: # %bb.0:
1618 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1619 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1620 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1621 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1622 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1623 ; CHECK-AVX1-NEXT: retq
1624 ;
1625 ; CHECK-AVX2-LABEL: test_srem_odd_allones_and_one:
1626 ; CHECK-AVX2: # %bb.0:
1627 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3435973837,3435973837,3435973837,3435973837]
1628 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
1629 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [429496729,429496729,429496729,429496729]
1630 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
1631 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1632 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1633 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1634 ; CHECK-AVX2-NEXT: retq
1635 ;
1636 ; CHECK-AVX512VL-LABEL: test_srem_odd_allones_and_one:
1637 ; CHECK-AVX512VL: # %bb.0:
1638 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1639 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1640 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1641 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1642 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1643 ; CHECK-AVX512VL-NEXT: retq
1644 %srem = srem <4 x i32> %X, <i32 5, i32 4294967295, i32 1, i32 5>
1645 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1646 %ret = zext <4 x i1> %cmp to <4 x i32>
1647 ret <4 x i32> %ret
1648 }
1650 ; One all-ones divisor and one one divisor in even divisor
1651 define <4 x i32> @test_srem_even_allones_and_one(<4 x i32> %X) nounwind {
1652 ; CHECK-SSE2-LABEL: test_srem_even_allones_and_one:
1653 ; CHECK-SSE2: # %bb.0:
1654 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
1655 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1656 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm0
1657 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1658 ; CHECK-SSE2-NEXT: pmuludq %xmm1, %xmm2
1659 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
1660 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1661 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1662 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1
1663 ; CHECK-SSE2-NEXT: psrld $1, %xmm1
1664 ; CHECK-SSE2-NEXT: pslld $31, %xmm0
1665 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
1666 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1667 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1668 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1669 ; CHECK-SSE2-NEXT: retq
1670 ;
1671 ; CHECK-SSE41-LABEL: test_srem_even_allones_and_one:
1672 ; CHECK-SSE41: # %bb.0:
1673 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1674 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1675 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm1
1676 ; CHECK-SSE41-NEXT: psrld $1, %xmm1
1677 ; CHECK-SSE41-NEXT: pslld $31, %xmm0
1678 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
1679 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,4294967295,306783378]
1680 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1681 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1682 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1683 ; CHECK-SSE41-NEXT: retq
1684 ;
1685 ; CHECK-AVX1-LABEL: test_srem_even_allones_and_one:
1686 ; CHECK-AVX1: # %bb.0:
1687 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1688 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1689 ; CHECK-AVX1-NEXT: vpsrld $1, %xmm0, %xmm1
1690 ; CHECK-AVX1-NEXT: vpslld $31, %xmm0, %xmm0
1691 ; CHECK-AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0
1692 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1693 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1694 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1695 ; CHECK-AVX1-NEXT: retq
1696 ;
1697 ; CHECK-AVX2-LABEL: test_srem_even_allones_and_one:
1698 ; CHECK-AVX2: # %bb.0:
1699 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [3067833783,3067833783,3067833783,3067833783]
1700 ; CHECK-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
1701 ; CHECK-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [306783378,306783378,306783378,306783378]
1702 ; CHECK-AVX2-NEXT: vpaddd %xmm1, %xmm0, %xmm0
1703 ; CHECK-AVX2-NEXT: vpsrld $1, %xmm0, %xmm1
1704 ; CHECK-AVX2-NEXT: vpslld $31, %xmm0, %xmm0
1705 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1706 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1707 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1708 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1709 ; CHECK-AVX2-NEXT: retq
1710 ;
1711 ; CHECK-AVX512VL-LABEL: test_srem_even_allones_and_one:
1712 ; CHECK-AVX512VL: # %bb.0:
1713 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1714 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm0, %xmm0
1715 ; CHECK-AVX512VL-NEXT: vprord $1, %xmm0, %xmm0
1716 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1717 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1718 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1719 ; CHECK-AVX512VL-NEXT: retq
1720 %srem = srem <4 x i32> %X, <i32 14, i32 4294967295, i32 1, i32 14>
1721 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1722 %ret = zext <4 x i1> %cmp to <4 x i32>
1723 ret <4 x i32> %ret
1724 }
1726 ; One all-ones divisor and one one divisor in odd+even divisor
1727 define <4 x i32> @test_srem_odd_even_allones_and_one(<4 x i32> %X) nounwind {
1728 ; CHECK-SSE2-LABEL: test_srem_odd_even_allones_and_one:
1729 ; CHECK-SSE2: # %bb.0:
1730 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1731 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1732 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1733 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1734 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1735 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1736 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1737 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
1738 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
1739 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1740 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
1741 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
1742 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1743 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
1744 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1745 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1746 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1747 ; CHECK-SSE2-NEXT: retq
1748 ;
1749 ; CHECK-SSE41-LABEL: test_srem_odd_even_allones_and_one:
1750 ; CHECK-SSE41: # %bb.0:
1751 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1752 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1753 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1754 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1755 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
1756 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1757 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1758 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1759 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1760 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,4294967295,42949672]
1761 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1762 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1763 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1764 ; CHECK-SSE41-NEXT: retq
1765 ;
1766 ; CHECK-AVX1-LABEL: test_srem_odd_even_allones_and_one:
1767 ; CHECK-AVX1: # %bb.0:
1768 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1769 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1770 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1771 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1772 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1773 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1774 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1775 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1776 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
1777 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1778 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1779 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1780 ; CHECK-AVX1-NEXT: retq
1781 ;
1782 ; CHECK-AVX2-LABEL: test_srem_odd_even_allones_and_one:
1783 ; CHECK-AVX2: # %bb.0:
1784 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1785 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1786 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1787 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1788 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1789 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1790 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1791 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1792 ; CHECK-AVX2-NEXT: retq
1793 ;
1794 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_allones_and_one:
1795 ; CHECK-AVX512VL: # %bb.0:
1796 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1797 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1798 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1799 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1800 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1801 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1802 ; CHECK-AVX512VL-NEXT: retq
1803 %srem = srem <4 x i32> %X, <i32 5, i32 4294967295, i32 1, i32 100>
1804 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1805 %ret = zext <4 x i1> %cmp to <4 x i32>
1806 ret <4 x i32> %ret
1807 }
1809 ;------------------------------------------------------------------------------;
1811 ; One power-of-two divisor divisor and one divisor in odd divisor
1812 define <4 x i32> @test_srem_odd_poweroftwo_and_one(<4 x i32> %X) nounwind {
1813 ; CHECK-SSE2-LABEL: test_srem_odd_poweroftwo_and_one:
1814 ; CHECK-SSE2: # %bb.0:
1815 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1816 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1817 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1818 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1819 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1820 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1821 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1822 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
1823 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
1824 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1825 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
1826 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
1827 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1828 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
1829 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1830 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1831 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1832 ; CHECK-SSE2-NEXT: retq
1833 ;
1834 ; CHECK-SSE41-LABEL: test_srem_odd_poweroftwo_and_one:
1835 ; CHECK-SSE41: # %bb.0:
1836 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1837 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1838 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1839 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1840 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
1841 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1842 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1843 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1844 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1845 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,268435454,4294967295,858993458]
1846 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1847 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1848 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1849 ; CHECK-SSE41-NEXT: retq
1850 ;
1851 ; CHECK-AVX1-LABEL: test_srem_odd_poweroftwo_and_one:
1852 ; CHECK-AVX1: # %bb.0:
1853 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1854 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1855 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1856 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1857 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
1858 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1859 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1860 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1861 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
1862 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1863 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1864 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1865 ; CHECK-AVX1-NEXT: retq
1866 ;
1867 ; CHECK-AVX2-LABEL: test_srem_odd_poweroftwo_and_one:
1868 ; CHECK-AVX2: # %bb.0:
1869 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1870 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1871 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1872 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1873 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1874 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1875 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1876 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1877 ; CHECK-AVX2-NEXT: retq
1878 ;
1879 ; CHECK-AVX512VL-LABEL: test_srem_odd_poweroftwo_and_one:
1880 ; CHECK-AVX512VL: # %bb.0:
1881 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1882 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1883 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1884 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1885 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1886 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1887 ; CHECK-AVX512VL-NEXT: retq
1888 %srem = srem <4 x i32> %X, <i32 5, i32 16, i32 1, i32 5>
1889 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1890 %ret = zext <4 x i1> %cmp to <4 x i32>
1891 ret <4 x i32> %ret
1892 }
1894 ; One power-of-two divisor divisor and one divisor in even divisor
1895 define <4 x i32> @test_srem_even_poweroftwo_and_one(<4 x i32> %X) nounwind {
1896 ; CHECK-SSE2-LABEL: test_srem_even_poweroftwo_and_one:
1897 ; CHECK-SSE2: # %bb.0:
1898 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1899 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1900 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1901 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1902 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1903 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1904 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1905 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,268435456,1,2147483648]
1906 ; CHECK-SSE2-NEXT: pmuludq %xmm0, %xmm1
1907 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,3,2,3]
1908 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3]
1909 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3
1910 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[1,3,2,3]
1911 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
1912 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[0,2,2,3]
1913 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm3[0,2,2,3]
1914 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1915 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
1916 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1917 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1918 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1919 ; CHECK-SSE2-NEXT: retq
1920 ;
1921 ; CHECK-SSE41-LABEL: test_srem_even_poweroftwo_and_one:
1922 ; CHECK-SSE41: # %bb.0:
1923 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1924 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1925 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1926 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1927 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1928 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1929 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1930 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1931 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1932 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
1933 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,268435454,4294967295,306783378]
1934 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
1935 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
1936 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
1937 ; CHECK-SSE41-NEXT: retq
1938 ;
1939 ; CHECK-AVX1-LABEL: test_srem_even_poweroftwo_and_one:
1940 ; CHECK-AVX1: # %bb.0:
1941 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1942 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1943 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1944 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
1945 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1946 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
1947 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
1948 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
1949 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
1950 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
1951 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1952 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1953 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
1954 ; CHECK-AVX1-NEXT: retq
1955 ;
1956 ; CHECK-AVX2-LABEL: test_srem_even_poweroftwo_and_one:
1957 ; CHECK-AVX2: # %bb.0:
1958 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1959 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1960 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1961 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1962 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
1963 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1964 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1965 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
1966 ; CHECK-AVX2-NEXT: retq
1967 ;
1968 ; CHECK-AVX512VL-LABEL: test_srem_even_poweroftwo_and_one:
1969 ; CHECK-AVX512VL: # %bb.0:
1970 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1971 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1972 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
1973 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
1974 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
1975 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
1976 ; CHECK-AVX512VL-NEXT: retq
1977 %srem = srem <4 x i32> %X, <i32 14, i32 16, i32 1, i32 14>
1978 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
1979 %ret = zext <4 x i1> %cmp to <4 x i32>
1980 ret <4 x i32> %ret
1981 }
1983 ; One power-of-two divisor divisor and one divisor in odd+even divisor
1984 define <4 x i32> @test_srem_odd_even_poweroftwo_and_one(<4 x i32> %X) nounwind {
1985 ; CHECK-SSE2-LABEL: test_srem_odd_even_poweroftwo_and_one:
1986 ; CHECK-SSE2: # %bb.0:
1987 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
1988 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1989 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1990 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
1991 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1992 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1993 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1994 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[0,2,2,3]
1995 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
1996 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
1997 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
1998 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
1999 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2000 ; CHECK-SSE2-NEXT: por %xmm1, %xmm0
2001 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2002 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2003 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2004 ; CHECK-SSE2-NEXT: retq
2005 ;
2006 ; CHECK-SSE41-LABEL: test_srem_odd_even_poweroftwo_and_one:
2007 ; CHECK-SSE41: # %bb.0:
2008 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2009 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2010 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
2011 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
2012 ; CHECK-SSE41-NEXT: pxor %xmm2, %xmm2
2013 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
2014 ; CHECK-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
2015 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2016 ; CHECK-SSE41-NEXT: por %xmm2, %xmm0
2017 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,268435454,4294967295,42949672]
2018 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
2019 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
2020 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
2021 ; CHECK-SSE41-NEXT: retq
2022 ;
2023 ; CHECK-AVX1-LABEL: test_srem_odd_even_poweroftwo_and_one:
2024 ; CHECK-AVX1: # %bb.0:
2025 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2026 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2027 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,3,3]
2028 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
2029 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
2030 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7]
2031 ; CHECK-AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,2,2]
2032 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2033 ; CHECK-AVX1-NEXT: vpor %xmm2, %xmm0, %xmm0
2034 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2035 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2036 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
2037 ; CHECK-AVX1-NEXT: retq
2038 ;
2039 ; CHECK-AVX2-LABEL: test_srem_odd_even_poweroftwo_and_one:
2040 ; CHECK-AVX2: # %bb.0:
2041 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2042 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2043 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2044 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2045 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
2046 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2047 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2048 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
2049 ; CHECK-AVX2-NEXT: retq
2050 ;
2051 ; CHECK-AVX512VL-LABEL: test_srem_odd_even_poweroftwo_and_one:
2052 ; CHECK-AVX512VL: # %bb.0:
2053 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2054 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2055 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2056 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2057 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2058 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
2059 ; CHECK-AVX512VL-NEXT: retq
2060 %srem = srem <4 x i32> %X, <i32 5, i32 16, i32 1, i32 100>
2061 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
2062 %ret = zext <4 x i1> %cmp to <4 x i32>
2063 ret <4 x i32> %ret
2064 }
2066 ;------------------------------------------------------------------------------;
2068 define <4 x i32> @test_srem_odd_allones_and_poweroftwo_and_one(<4 x i32> %X) nounwind {
2069 ; CHECK-SSE2-LABEL: test_srem_odd_allones_and_poweroftwo_and_one:
2070 ; CHECK-SSE2: # %bb.0:
2071 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2072 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2073 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2074 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
2075 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2076 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
2077 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
2078 ; CHECK-SSE2-NEXT: psrlq $32, %xmm0
2079 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
2080 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2081 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2082 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2083 ; CHECK-SSE2-NEXT: retq
2084 ;
2085 ; CHECK-SSE41-LABEL: test_srem_odd_allones_and_poweroftwo_and_one:
2086 ; CHECK-SSE41: # %bb.0:
2087 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2088 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2089 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2090 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
2091 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2092 ; CHECK-SSE41-NEXT: psrlq $32, %xmm0
2093 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
2094 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [858993458,4294967295,268435454,4294967295]
2095 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
2096 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
2097 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
2098 ; CHECK-SSE41-NEXT: retq
2099 ;
2100 ; CHECK-AVX1-LABEL: test_srem_odd_allones_and_poweroftwo_and_one:
2101 ; CHECK-AVX1: # %bb.0:
2102 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2103 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2104 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2105 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
2106 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2107 ; CHECK-AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
2108 ; CHECK-AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
2109 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2110 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2111 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
2112 ; CHECK-AVX1-NEXT: retq
2113 ;
2114 ; CHECK-AVX2-LABEL: test_srem_odd_allones_and_poweroftwo_and_one:
2115 ; CHECK-AVX2: # %bb.0:
2116 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2117 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2118 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2119 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2120 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
2121 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2122 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2123 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
2124 ; CHECK-AVX2-NEXT: retq
2125 ;
2126 ; CHECK-AVX512VL-LABEL: test_srem_odd_allones_and_poweroftwo_and_one:
2127 ; CHECK-AVX512VL: # %bb.0:
2128 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2129 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2130 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2131 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2132 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2133 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
2134 ; CHECK-AVX512VL-NEXT: retq
2135 %srem = srem <4 x i32> %X, <i32 5, i32 4294967295, i32 16, i32 1>
2136 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
2137 %ret = zext <4 x i1> %cmp to <4 x i32>
2138 ret <4 x i32> %ret
2139 }
2141 define <4 x i32> @test_srem_even_allones_and_poweroftwo_and_one(<4 x i32> %X) nounwind {
2142 ; CHECK-SSE2-LABEL: test_srem_even_allones_and_poweroftwo_and_one:
2143 ; CHECK-SSE2: # %bb.0:
2144 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2145 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2146 ; CHECK-SSE2-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2147 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,3,2,3]
2148 ; CHECK-SSE2-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2149 ; CHECK-SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,2,2,3]
2150 ; CHECK-SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
2151 ; CHECK-SSE2-NEXT: psrlq $32, %xmm0
2152 ; CHECK-SSE2-NEXT: por %xmm2, %xmm0
2153 ; CHECK-SSE2-NEXT: pxor {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2154 ; CHECK-SSE2-NEXT: pcmpgtd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2155 ; CHECK-SSE2-NEXT: pandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2156 ; CHECK-SSE2-NEXT: retq
2157 ;
2158 ; CHECK-SSE41-LABEL: test_srem_even_allones_and_poweroftwo_and_one:
2159 ; CHECK-SSE41: # %bb.0:
2160 ; CHECK-SSE41-NEXT: pmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2161 ; CHECK-SSE41-NEXT: paddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2162 ; CHECK-SSE41-NEXT: pmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2163 ; CHECK-SSE41-NEXT: pxor %xmm1, %xmm1
2164 ; CHECK-SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2165 ; CHECK-SSE41-NEXT: psrlq $32, %xmm0
2166 ; CHECK-SSE41-NEXT: por %xmm1, %xmm0
2167 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm1 = [306783378,4294967295,268435454,4294967295]
2168 ; CHECK-SSE41-NEXT: pminud %xmm0, %xmm1
2169 ; CHECK-SSE41-NEXT: pcmpeqd %xmm1, %xmm0
2170 ; CHECK-SSE41-NEXT: psrld $31, %xmm0
2171 ; CHECK-SSE41-NEXT: retq
2172 ;
2173 ; CHECK-AVX1-LABEL: test_srem_even_allones_and_poweroftwo_and_one:
2174 ; CHECK-AVX1: # %bb.0:
2175 ; CHECK-AVX1-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2176 ; CHECK-AVX1-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2177 ; CHECK-AVX1-NEXT: vpmuludq {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2178 ; CHECK-AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1
2179 ; CHECK-AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
2180 ; CHECK-AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0
2181 ; CHECK-AVX1-NEXT: vpor %xmm0, %xmm1, %xmm0
2182 ; CHECK-AVX1-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2183 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2184 ; CHECK-AVX1-NEXT: vpsrld $31, %xmm0, %xmm0
2185 ; CHECK-AVX1-NEXT: retq
2186 ;
2187 ; CHECK-AVX2-LABEL: test_srem_even_allones_and_poweroftwo_and_one:
2188 ; CHECK-AVX2: # %bb.0:
2189 ; CHECK-AVX2-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2190 ; CHECK-AVX2-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2191 ; CHECK-AVX2-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2192 ; CHECK-AVX2-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2193 ; CHECK-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
2194 ; CHECK-AVX2-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2195 ; CHECK-AVX2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2196 ; CHECK-AVX2-NEXT: vpsrld $31, %xmm0, %xmm0
2197 ; CHECK-AVX2-NEXT: retq
2198 ;
2199 ; CHECK-AVX512VL-LABEL: test_srem_even_allones_and_poweroftwo_and_one:
2200 ; CHECK-AVX512VL: # %bb.0:
2201 ; CHECK-AVX512VL-NEXT: vpmulld {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2202 ; CHECK-AVX512VL-NEXT: vpaddd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2203 ; CHECK-AVX512VL-NEXT: vprorvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
2204 ; CHECK-AVX512VL-NEXT: vpminud {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
2205 ; CHECK-AVX512VL-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
2206 ; CHECK-AVX512VL-NEXT: vpsrld $31, %xmm0, %xmm0
2207 ; CHECK-AVX512VL-NEXT: retq
2208 %srem = srem <4 x i32> %X, <i32 14, i32 4294967295, i32 16, i32 1>
2209 %cmp = icmp eq <4 x i32> %srem, <i32 0, i32 0, i32 0, i32 0>
2210 %ret = zext <4 x i1> %cmp to <4 x i32>
2211 ret <4 x i32> %ret
2212 }
2214 ; PR51133: the VSELECT should have i1 element type
2215 define <32 x i1> @pr51133(<32 x i8> %x, <32 x i8> %y) {
2216 ; CHECK-SSE2-LABEL: pr51133:
2217 ; CHECK-SSE2: # %bb.0:
2218 ; CHECK-SSE2-NEXT: movq %rdi, %rax
2219 ; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm5
2220 ; CHECK-SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2221 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
2222 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
2223 ; CHECK-SSE2-NEXT: pand %xmm4, %xmm5
2224 ; CHECK-SSE2-NEXT: movdqa %xmm1, %xmm6
2225 ; CHECK-SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2226 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
2227 ; CHECK-SSE2-NEXT: pand %xmm4, %xmm6
2228 ; CHECK-SSE2-NEXT: packuswb %xmm5, %xmm6
2229 ; CHECK-SSE2-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
2230 ; CHECK-SSE2-NEXT: movdqa %xmm6, %xmm5
2231 ; CHECK-SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm6[8],xmm5[9],xmm6[9],xmm5[10],xmm6[10],xmm5[11],xmm6[11],xmm5[12],xmm6[12],xmm5[13],xmm6[13],xmm5[14],xmm6[14],xmm5[15],xmm6[15]
2232 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
2233 ; CHECK-SSE2-NEXT: psrlw $8, %xmm5
2234 ; CHECK-SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2235 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
2236 ; CHECK-SSE2-NEXT: psrlw $8, %xmm6
2237 ; CHECK-SSE2-NEXT: packuswb %xmm5, %xmm6
2238 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm7 = [84,2,36,42,2,0,2,4,2,255,4,36,126,30,2,2]
2239 ; CHECK-SSE2-NEXT: pminub %xmm6, %xmm7
2240 ; CHECK-SSE2-NEXT: pcmpeqb %xmm6, %xmm7
2241 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm5 = [255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255]
2242 ; CHECK-SSE2-NEXT: pandn %xmm5, %xmm7
2243 ; CHECK-SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
2244 ; CHECK-SSE2-NEXT: pxor %xmm6, %xmm6
2245 ; CHECK-SSE2-NEXT: pcmpgtb %xmm6, %xmm1
2246 ; CHECK-SSE2-NEXT: pandn %xmm1, %xmm5
2247 ; CHECK-SSE2-NEXT: por %xmm7, %xmm5
2248 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1
2249 ; CHECK-SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2250 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
2251 ; CHECK-SSE2-NEXT: pand %xmm4, %xmm1
2252 ; CHECK-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2253 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2254 ; CHECK-SSE2-NEXT: pand %xmm4, %xmm0
2255 ; CHECK-SSE2-NEXT: packuswb %xmm1, %xmm0
2256 ; CHECK-SSE2-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2257 ; CHECK-SSE2-NEXT: movdqa %xmm0, %xmm1
2258 ; CHECK-SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
2259 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
2260 ; CHECK-SSE2-NEXT: psrlw $8, %xmm1
2261 ; CHECK-SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2262 ; CHECK-SSE2-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2263 ; CHECK-SSE2-NEXT: psrlw $8, %xmm0
2264 ; CHECK-SSE2-NEXT: packuswb %xmm1, %xmm0
2265 ; CHECK-SSE2-NEXT: movdqa {{.*#+}} xmm1 = [19,51,13,7,127,31,127,3,5,5,51,37,3,127,85,5]
2266 ; CHECK-SSE2-NEXT: pmaxub %xmm0, %xmm1
2267 ; CHECK-SSE2-NEXT: pcmpeqb %xmm0, %xmm1
2268 ; CHECK-SSE2-NEXT: pcmpeqb %xmm6, %xmm3
2269 ; CHECK-SSE2-NEXT: pandn %xmm5, %xmm3
2270 ; CHECK-SSE2-NEXT: pcmpeqb %xmm6, %xmm2
2271 ; CHECK-SSE2-NEXT: pandn %xmm1, %xmm2
2272 ; CHECK-SSE2-NEXT: pmovmskb %xmm2, %ecx
2273 ; CHECK-SSE2-NEXT: pmovmskb %xmm3, %edx
2274 ; CHECK-SSE2-NEXT: shll $16, %edx
2275 ; CHECK-SSE2-NEXT: orl %ecx, %edx
2276 ; CHECK-SSE2-NEXT: movl %edx, (%rdi)
2277 ; CHECK-SSE2-NEXT: retq
2278 ;
2279 ; CHECK-SSE41-LABEL: pr51133:
2280 ; CHECK-SSE41: # %bb.0:
2281 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm4
2282 ; CHECK-SSE41-NEXT: movq %rdi, %rax
2283 ; CHECK-SSE41-NEXT: movdqa %xmm1, %xmm0
2284 ; CHECK-SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2285 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2286 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm5 = [255,255,255,255,255,255,255,255]
2287 ; CHECK-SSE41-NEXT: pand %xmm5, %xmm0
2288 ; CHECK-SSE41-NEXT: pmovzxbw {{.*#+}} xmm6 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
2289 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
2290 ; CHECK-SSE41-NEXT: pand %xmm5, %xmm6
2291 ; CHECK-SSE41-NEXT: packuswb %xmm0, %xmm6
2292 ; CHECK-SSE41-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
2293 ; CHECK-SSE41-NEXT: movdqa %xmm6, %xmm0
2294 ; CHECK-SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm6[8],xmm0[9],xmm6[9],xmm0[10],xmm6[10],xmm0[11],xmm6[11],xmm0[12],xmm6[12],xmm0[13],xmm6[13],xmm0[14],xmm6[14],xmm0[15],xmm6[15]
2295 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2296 ; CHECK-SSE41-NEXT: psrlw $8, %xmm0
2297 ; CHECK-SSE41-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2298 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
2299 ; CHECK-SSE41-NEXT: psrlw $8, %xmm6
2300 ; CHECK-SSE41-NEXT: packuswb %xmm0, %xmm6
2301 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm0 = [84,2,36,42,2,0,2,4,2,255,4,36,126,30,2,2]
2302 ; CHECK-SSE41-NEXT: pminub %xmm6, %xmm0
2303 ; CHECK-SSE41-NEXT: pcmpeqb %xmm6, %xmm0
2304 ; CHECK-SSE41-NEXT: pcmpeqd %xmm7, %xmm7
2305 ; CHECK-SSE41-NEXT: pxor %xmm0, %xmm7
2306 ; CHECK-SSE41-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
2307 ; CHECK-SSE41-NEXT: pxor %xmm6, %xmm6
2308 ; CHECK-SSE41-NEXT: pcmpgtb %xmm6, %xmm1
2309 ; CHECK-SSE41-NEXT: movaps {{.*#+}} xmm0 = [255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255]
2310 ; CHECK-SSE41-NEXT: pblendvb %xmm0, %xmm7, %xmm1
2311 ; CHECK-SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero
2312 ; CHECK-SSE41-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2313 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
2314 ; CHECK-SSE41-NEXT: pand %xmm5, %xmm4
2315 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2316 ; CHECK-SSE41-NEXT: pand %xmm5, %xmm0
2317 ; CHECK-SSE41-NEXT: packuswb %xmm4, %xmm0
2318 ; CHECK-SSE41-NEXT: paddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2319 ; CHECK-SSE41-NEXT: movdqa %xmm0, %xmm4
2320 ; CHECK-SSE41-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm0[8],xmm4[9],xmm0[9],xmm4[10],xmm0[10],xmm4[11],xmm0[11],xmm4[12],xmm0[12],xmm4[13],xmm0[13],xmm4[14],xmm0[14],xmm4[15],xmm0[15]
2321 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
2322 ; CHECK-SSE41-NEXT: psrlw $8, %xmm4
2323 ; CHECK-SSE41-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2324 ; CHECK-SSE41-NEXT: pmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
2325 ; CHECK-SSE41-NEXT: psrlw $8, %xmm0
2326 ; CHECK-SSE41-NEXT: packuswb %xmm4, %xmm0
2327 ; CHECK-SSE41-NEXT: movdqa {{.*#+}} xmm4 = [19,51,13,7,127,31,127,3,5,5,51,37,3,127,85,5]
2328 ; CHECK-SSE41-NEXT: pmaxub %xmm0, %xmm4
2329 ; CHECK-SSE41-NEXT: pcmpeqb %xmm0, %xmm4
2330 ; CHECK-SSE41-NEXT: pcmpeqb %xmm6, %xmm3
2331 ; CHECK-SSE41-NEXT: pandn %xmm1, %xmm3
2332 ; CHECK-SSE41-NEXT: pcmpeqb %xmm6, %xmm2
2333 ; CHECK-SSE41-NEXT: pandn %xmm4, %xmm2
2334 ; CHECK-SSE41-NEXT: pmovmskb %xmm2, %ecx
2335 ; CHECK-SSE41-NEXT: pmovmskb %xmm3, %edx
2336 ; CHECK-SSE41-NEXT: shll $16, %edx
2337 ; CHECK-SSE41-NEXT: orl %ecx, %edx
2338 ; CHECK-SSE41-NEXT: movl %edx, (%rdi)
2339 ; CHECK-SSE41-NEXT: retq
2340 ;
2341 ; CHECK-AVX1-LABEL: pr51133:
2342 ; CHECK-AVX1: # %bb.0:
2343 ; CHECK-AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2
2344 ; CHECK-AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
2345 ; CHECK-AVX1-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm3
2346 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm3, %xmm3
2347 ; CHECK-AVX1-NEXT: vpunpcklbw {{.*#+}} xmm4 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
2348 ; CHECK-AVX1-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm4
2349 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm4, %xmm4
2350 ; CHECK-AVX1-NEXT: vpackuswb %xmm3, %xmm4, %xmm3
2351 ; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm4
2352 ; CHECK-AVX1-NEXT: vpaddb %xmm4, %xmm3, %xmm3
2353 ; CHECK-AVX1-NEXT: vpunpckhbw {{.*#+}} xmm4 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2354 ; CHECK-AVX1-NEXT: vpsraw $8, %xmm4, %xmm4
2355 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm4
2356 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm4, %xmm4
2357 ; CHECK-AVX1-NEXT: vpunpcklbw {{.*#+}} xmm5 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2358 ; CHECK-AVX1-NEXT: vpsraw $8, %xmm5, %xmm5
2359 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5, %xmm5
2360 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm5, %xmm5
2361 ; CHECK-AVX1-NEXT: vpackuswb %xmm4, %xmm5, %xmm4
2362 ; CHECK-AVX1-NEXT: vpsrlw $7, %xmm3, %xmm3
2363 ; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm8 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
2364 ; CHECK-AVX1-NEXT: vpand %xmm3, %xmm8, %xmm3
2365 ; CHECK-AVX1-NEXT: vpaddb %xmm3, %xmm4, %xmm4
2366 ; CHECK-AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2367 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm3, %xmm6
2368 ; CHECK-AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
2369 ; CHECK-AVX1-NEXT: vpand %xmm3, %xmm6, %xmm6
2370 ; CHECK-AVX1-NEXT: vpmovzxbw {{.*#+}} xmm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero
2371 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4, %xmm4
2372 ; CHECK-AVX1-NEXT: vpand %xmm3, %xmm4, %xmm4
2373 ; CHECK-AVX1-NEXT: vpackuswb %xmm6, %xmm4, %xmm4
2374 ; CHECK-AVX1-NEXT: vpsubb %xmm4, %xmm0, %xmm4
2375 ; CHECK-AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0
2376 ; CHECK-AVX1-NEXT: vpunpckhbw {{.*#+}} xmm6 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15]
2377 ; CHECK-AVX1-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6, %xmm6
2378 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm6, %xmm6
2379 ; CHECK-AVX1-NEXT: vpunpcklbw {{.*#+}} xmm7 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
2380 ; CHECK-AVX1-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm7
2381 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm7, %xmm7
2382 ; CHECK-AVX1-NEXT: vpackuswb %xmm6, %xmm7, %xmm6
2383 ; CHECK-AVX1-NEXT: vpmovzxbw {{.*#+}} xmm7 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
2384 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm7
2385 ; CHECK-AVX1-NEXT: vpand %xmm3, %xmm7, %xmm7
2386 ; CHECK-AVX1-NEXT: vpshufb {{.*#+}} xmm5 = zero,zero,xmm0[9],zero,zero,zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,zero,zero,xmm0[15],zero
2387 ; CHECK-AVX1-NEXT: vpackuswb %xmm5, %xmm7, %xmm5
2388 ; CHECK-AVX1-NEXT: vpaddb %xmm5, %xmm6, %xmm5
2389 ; CHECK-AVX1-NEXT: vpunpckhbw {{.*#+}} xmm6 = xmm5[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2390 ; CHECK-AVX1-NEXT: vpsraw $8, %xmm6, %xmm6
2391 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6, %xmm6
2392 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm6, %xmm6
2393 ; CHECK-AVX1-NEXT: vpunpcklbw {{.*#+}} xmm7 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2394 ; CHECK-AVX1-NEXT: vpsraw $8, %xmm7, %xmm7
2395 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm7
2396 ; CHECK-AVX1-NEXT: vpsrlw $8, %xmm7, %xmm7
2397 ; CHECK-AVX1-NEXT: vpackuswb %xmm6, %xmm7, %xmm6
2398 ; CHECK-AVX1-NEXT: vpsrlw $7, %xmm5, %xmm5
2399 ; CHECK-AVX1-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5, %xmm5
2400 ; CHECK-AVX1-NEXT: vpand %xmm5, %xmm8, %xmm5
2401 ; CHECK-AVX1-NEXT: vpaddb %xmm5, %xmm6, %xmm5
2402 ; CHECK-AVX1-NEXT: vpunpckhbw {{.*#+}} xmm6 = xmm5[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2403 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6, %xmm6
2404 ; CHECK-AVX1-NEXT: vpand %xmm3, %xmm6, %xmm6
2405 ; CHECK-AVX1-NEXT: vpmovzxbw {{.*#+}} xmm5 = xmm5[0],zero,xmm5[1],zero,xmm5[2],zero,xmm5[3],zero,xmm5[4],zero,xmm5[5],zero,xmm5[6],zero,xmm5[7],zero
2406 ; CHECK-AVX1-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5, %xmm5
2407 ; CHECK-AVX1-NEXT: vpand %xmm3, %xmm5, %xmm3
2408 ; CHECK-AVX1-NEXT: vpackuswb %xmm6, %xmm3, %xmm3
2409 ; CHECK-AVX1-NEXT: vpsubb %xmm3, %xmm0, %xmm0
2410 ; CHECK-AVX1-NEXT: vpcmpeqb %xmm2, %xmm0, %xmm0
2411 ; CHECK-AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3
2412 ; CHECK-AVX1-NEXT: vpxor %xmm3, %xmm0, %xmm0
2413 ; CHECK-AVX1-NEXT: vpcmpeqb %xmm2, %xmm4, %xmm4
2414 ; CHECK-AVX1-NEXT: vpxor %xmm3, %xmm4, %xmm3
2415 ; CHECK-AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm3, %ymm0
2416 ; CHECK-AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3
2417 ; CHECK-AVX1-NEXT: vpcmpeqb %xmm2, %xmm3, %xmm3
2418 ; CHECK-AVX1-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
2419 ; CHECK-AVX1-NEXT: vinsertf128 $1, %xmm3, %ymm1, %ymm1
2420 ; CHECK-AVX1-NEXT: vandnps %ymm0, %ymm1, %ymm0
2421 ; CHECK-AVX1-NEXT: retq
2422 ;
2423 ; CHECK-AVX2-LABEL: pr51133:
2424 ; CHECK-AVX2: # %bb.0:
2425 ; CHECK-AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2
2426 ; CHECK-AVX2-NEXT: vpunpckhbw {{.*#+}} ymm3 = ymm2[8],ymm0[8],ymm2[9],ymm0[9],ymm2[10],ymm0[10],ymm2[11],ymm0[11],ymm2[12],ymm0[12],ymm2[13],ymm0[13],ymm2[14],ymm0[14],ymm2[15],ymm0[15],ymm2[24],ymm0[24],ymm2[25],ymm0[25],ymm2[26],ymm0[26],ymm2[27],ymm0[27],ymm2[28],ymm0[28],ymm2[29],ymm0[29],ymm2[30],ymm0[30],ymm2[31],ymm0[31]
2427 ; CHECK-AVX2-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm3, %ymm3
2428 ; CHECK-AVX2-NEXT: vpsrlw $8, %ymm3, %ymm3
2429 ; CHECK-AVX2-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm2[0],ymm0[0],ymm2[1],ymm0[1],ymm2[2],ymm0[2],ymm2[3],ymm0[3],ymm2[4],ymm0[4],ymm2[5],ymm0[5],ymm2[6],ymm0[6],ymm2[7],ymm0[7],ymm2[16],ymm0[16],ymm2[17],ymm0[17],ymm2[18],ymm0[18],ymm2[19],ymm0[19],ymm2[20],ymm0[20],ymm2[21],ymm0[21],ymm2[22],ymm0[22],ymm2[23],ymm0[23]
2430 ; CHECK-AVX2-NEXT: vpmulhw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm4, %ymm4
2431 ; CHECK-AVX2-NEXT: vpsrlw $8, %ymm4, %ymm4
2432 ; CHECK-AVX2-NEXT: vpackuswb %ymm3, %ymm4, %ymm3
2433 ; CHECK-AVX2-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
2434 ; CHECK-AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm4, %ymm4
2435 ; CHECK-AVX2-NEXT: vmovdqa {{.*#+}} ymm5 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
2436 ; CHECK-AVX2-NEXT: vpand %ymm5, %ymm4, %ymm4
2437 ; CHECK-AVX2-NEXT: vpshufb {{.*#+}} ymm6 = ymm0[8],zero,ymm0[9],zero,zero,zero,ymm0[11],zero,zero,zero,ymm0[13],zero,zero,zero,ymm0[15],zero,zero,zero,ymm0[25],zero,zero,zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,zero,zero,ymm0[31],zero
2438 ; CHECK-AVX2-NEXT: vpackuswb %ymm6, %ymm4, %ymm4
2439 ; CHECK-AVX2-NEXT: vpaddb %ymm4, %ymm3, %ymm3
2440 ; CHECK-AVX2-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
2441 ; CHECK-AVX2-NEXT: vpsraw $8, %ymm4, %ymm4
2442 ; CHECK-AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm4, %ymm4
2443 ; CHECK-AVX2-NEXT: vpsrlw $8, %ymm4, %ymm4
2444 ; CHECK-AVX2-NEXT: vpunpcklbw {{.*#+}} ymm6 = ymm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
2445 ; CHECK-AVX2-NEXT: vpsraw $8, %ymm6, %ymm6
2446 ; CHECK-AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm6, %ymm6
2447 ; CHECK-AVX2-NEXT: vpsrlw $8, %ymm6, %ymm6
2448 ; CHECK-AVX2-NEXT: vpackuswb %ymm4, %ymm6, %ymm4
2449 ; CHECK-AVX2-NEXT: vpsrlw $7, %ymm3, %ymm3
2450 ; CHECK-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm3, %ymm3
2451 ; CHECK-AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm3, %ymm3
2452 ; CHECK-AVX2-NEXT: vpaddb %ymm3, %ymm4, %ymm3
2453 ; CHECK-AVX2-NEXT: vpunpckhbw {{.*#+}} ymm4 = ymm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
2454 ; CHECK-AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm4, %ymm4
2455 ; CHECK-AVX2-NEXT: vpand %ymm5, %ymm4, %ymm4
2456 ; CHECK-AVX2-NEXT: vpunpcklbw {{.*#+}} ymm3 = ymm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
2457 ; CHECK-AVX2-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm3, %ymm3
2458 ; CHECK-AVX2-NEXT: vpand %ymm5, %ymm3, %ymm3
2459 ; CHECK-AVX2-NEXT: vpackuswb %ymm4, %ymm3, %ymm3
2460 ; CHECK-AVX2-NEXT: vpsubb %ymm3, %ymm0, %ymm0
2461 ; CHECK-AVX2-NEXT: vpcmpeqb %ymm2, %ymm0, %ymm0
2462 ; CHECK-AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3
2463 ; CHECK-AVX2-NEXT: vpxor %ymm3, %ymm0, %ymm0
2464 ; CHECK-AVX2-NEXT: vpcmpeqb %ymm2, %ymm1, %ymm1
2465 ; CHECK-AVX2-NEXT: vpandn %ymm0, %ymm1, %ymm0
2466 ; CHECK-AVX2-NEXT: retq
2467 ;
2468 ; CHECK-AVX512VL-LABEL: pr51133:
2469 ; CHECK-AVX512VL: # %bb.0:
2470 ; CHECK-AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm2 = ymm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
2471 ; CHECK-AVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm2
2472 ; CHECK-AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
2473 ; CHECK-AVX512VL-NEXT: vpand %ymm3, %ymm2, %ymm2
2474 ; CHECK-AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm4 = ymm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
2475 ; CHECK-AVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm4, %ymm4
2476 ; CHECK-AVX512VL-NEXT: vpand %ymm3, %ymm4, %ymm3
2477 ; CHECK-AVX512VL-NEXT: vpackuswb %ymm2, %ymm3, %ymm2
2478 ; CHECK-AVX512VL-NEXT: vpaddb {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm2
2479 ; CHECK-AVX512VL-NEXT: vpunpckhbw {{.*#+}} ymm3 = ymm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15,24,24,25,25,26,26,27,27,28,28,29,29,30,30,31,31]
2480 ; CHECK-AVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm3, %ymm3
2481 ; CHECK-AVX512VL-NEXT: vpsrlw $8, %ymm3, %ymm3
2482 ; CHECK-AVX512VL-NEXT: vpunpcklbw {{.*#+}} ymm2 = ymm2[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7,16,16,17,17,18,18,19,19,20,20,21,21,22,22,23,23]
2483 ; CHECK-AVX512VL-NEXT: vpmullw {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm2
2484 ; CHECK-AVX512VL-NEXT: vpsrlw $8, %ymm2, %ymm2
2485 ; CHECK-AVX512VL-NEXT: vpackuswb %ymm3, %ymm2, %ymm2
2486 ; CHECK-AVX512VL-NEXT: vpminub {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm2, %ymm3
2487 ; CHECK-AVX512VL-NEXT: vpcmpeqb %ymm3, %ymm2, %ymm2
2488 ; CHECK-AVX512VL-NEXT: vmovdqa {{.*#+}} ymm3 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,0,255,255,255,255,255,255,255,255,255,255]
2489 ; CHECK-AVX512VL-NEXT: vpandn %ymm3, %ymm2, %ymm2
2490 ; CHECK-AVX512VL-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
2491 ; CHECK-AVX512VL-NEXT: vpxor %xmm4, %xmm4, %xmm4
2492 ; CHECK-AVX512VL-NEXT: vpcmpgtb %ymm4, %ymm0, %ymm0
2493 ; CHECK-AVX512VL-NEXT: vpandn %ymm0, %ymm3, %ymm3
2494 ; CHECK-AVX512VL-NEXT: vpcmpeqb %ymm4, %ymm1, %ymm0
2495 ; CHECK-AVX512VL-NEXT: vpternlogq $14, %ymm3, %ymm2, %ymm0
2496 ; CHECK-AVX512VL-NEXT: retq
2497 %rem = srem <32 x i8> %x, <i8 13, i8 5, i8 19, i8 34, i8 2, i8 8, i8 2, i8 88, i8 62, i8 62, i8 5, i8 7, i8 97, i8 2, i8 3, i8 60, i8 3, i8 87, i8 7, i8 6, i8 84, i8 -128, i8 127, i8 56, i8 114, i8 1, i8 50, i8 7, i8 2, i8 8, i8 97, i8 117>
2498 %cmp = icmp ne <32 x i8> %rem, zeroinitializer
2499 %cmp4 = icmp ne <32 x i8> %y, zeroinitializer
2500 %cmpres = and <32 x i1> %cmp4, %cmp
2501 ret <32 x i1> %cmpres
2502 }