1 // RUN: not llvm-tblgen --gen-subtarget -I %p/../../include -I %p/Common %s -o - 2>&1 | FileCheck %s
3 include "llvm/Target/Target.td"
5 def FakeTarget : Target { }
7 def FakeModel : SchedMachineModel { }
9 def WriteA : SchedWrite;
10 def WriteB : SchedWrite;
12 let SchedModel = NoSchedModel in {
13 def : InstRW<[WriteA], (instrs COPY)>;
15 def : InstRW<[WriteB], (instrs COPY)>;
16 // CHECK: [[@LINE-1]]:3: error: Overlapping InstRW definition for "COPY" also matches previous "(instrs COPY)".
17 // CHECK-NEXT: def : InstRW<[WriteB], (instrs COPY)>;
19 // CHECK: [[@LINE-6]]:3: note: Previous match was here.
20 // CHECK-NEXT: def : InstRW<[WriteA], (instrs COPY)>;