1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt < %s -indvars -S -indvars-predicate-loops=0 | FileCheck %s
4 ; Make sure that indvars isn't inserting canonical IVs.
5 ; This is kinda hard to do until linear function test replacement is removed.
7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
9 ; We should only have 2 IVs.
10 ; sext should be eliminated while preserving gep inboundsness.
11 define i32 @sum(i32* %arr, i32 %n) nounwind {
14 ; CHECK-NEXT: [[PRECOND:%.*]] = icmp slt i32 0, [[N:%.*]]
15 ; CHECK-NEXT: br i1 [[PRECOND]], label [[PH:%.*]], label [[RETURN:%.*]]
17 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64
18 ; CHECK-NEXT: br label [[LOOP:%.*]]
20 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[PH]] ]
21 ; CHECK-NEXT: [[S_01:%.*]] = phi i32 [ 0, [[PH]] ], [ [[SINC:%.*]], [[LOOP]] ]
22 ; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDVARS_IV]]
23 ; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ADR]], align 4
24 ; CHECK-NEXT: [[SINC]] = add nsw i32 [[S_01]], [[VAL]]
25 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
26 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
27 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
29 ; CHECK-NEXT: [[S_LCSSA:%.*]] = phi i32 [ [[SINC]], [[LOOP]] ]
30 ; CHECK-NEXT: br label [[RETURN]]
32 ; CHECK-NEXT: [[S_0_LCSSA:%.*]] = phi i32 [ [[S_LCSSA]], [[EXIT]] ], [ 0, [[ENTRY:%.*]] ]
33 ; CHECK-NEXT: ret i32 [[S_0_LCSSA]]
36 %precond = icmp slt i32 0, %n
37 br i1 %precond, label %ph, label %return
43 %i.02 = phi i32 [ 0, %ph ], [ %iinc, %loop ]
44 %s.01 = phi i32 [ 0, %ph ], [ %sinc, %loop ]
45 %ofs = sext i32 %i.02 to i64
46 %adr = getelementptr inbounds i32, i32* %arr, i64 %ofs
47 %val = load i32, i32* %adr
48 %sinc = add nsw i32 %s.01, %val
49 %iinc = add nsw i32 %i.02, 1
50 %cond = icmp slt i32 %iinc, %n
51 br i1 %cond, label %loop, label %exit
54 %s.lcssa = phi i32 [ %sinc, %loop ]
58 %s.0.lcssa = phi i32 [ %s.lcssa, %exit ], [ 0, %entry ]
62 ; We should only have 2 IVs.
63 ; %ofs sext should be eliminated while preserving gep inboundsness.
64 ; %vall sext should obviously not be eliminated
65 define i64 @suml(i32* %arr, i32 %n) nounwind {
68 ; CHECK-NEXT: [[PRECOND:%.*]] = icmp slt i32 0, [[N:%.*]]
69 ; CHECK-NEXT: br i1 [[PRECOND]], label [[PH:%.*]], label [[RETURN:%.*]]
71 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[N]] to i64
72 ; CHECK-NEXT: br label [[LOOP:%.*]]
74 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[PH]] ]
75 ; CHECK-NEXT: [[S_01:%.*]] = phi i64 [ 0, [[PH]] ], [ [[SINC:%.*]], [[LOOP]] ]
76 ; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[ARR:%.*]], i64 [[INDVARS_IV]]
77 ; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ADR]], align 4
78 ; CHECK-NEXT: [[VALL:%.*]] = sext i32 [[VAL]] to i64
79 ; CHECK-NEXT: [[SINC]] = add nsw i64 [[S_01]], [[VALL]]
80 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
81 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
82 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
84 ; CHECK-NEXT: [[S_LCSSA:%.*]] = phi i64 [ [[SINC]], [[LOOP]] ]
85 ; CHECK-NEXT: br label [[RETURN]]
87 ; CHECK-NEXT: [[S_0_LCSSA:%.*]] = phi i64 [ [[S_LCSSA]], [[EXIT]] ], [ 0, [[ENTRY:%.*]] ]
88 ; CHECK-NEXT: ret i64 [[S_0_LCSSA]]
91 %precond = icmp slt i32 0, %n
92 br i1 %precond, label %ph, label %return
98 %i.02 = phi i32 [ 0, %ph ], [ %iinc, %loop ]
99 %s.01 = phi i64 [ 0, %ph ], [ %sinc, %loop ]
100 %ofs = sext i32 %i.02 to i64
101 %adr = getelementptr inbounds i32, i32* %arr, i64 %ofs
102 %val = load i32, i32* %adr
103 %vall = sext i32 %val to i64
104 %sinc = add nsw i64 %s.01, %vall
105 %iinc = add nsw i32 %i.02, 1
106 %cond = icmp slt i32 %iinc, %n
107 br i1 %cond, label %loop, label %exit
110 %s.lcssa = phi i64 [ %sinc, %loop ]
114 %s.0.lcssa = phi i64 [ %s.lcssa, %exit ], [ 0, %entry ]
118 ; It's not indvars' job to perform LICM on %ofs
119 ; Preserve exactly one pointer type IV.
120 ; Don't create any extra adds.
121 ; Preserve gep inboundsness, and don't factor it.
122 define void @outofbounds(i32* %first, i32* %last, i32 %idx) nounwind {
123 ; CHECK-LABEL: @outofbounds(
124 ; CHECK-NEXT: [[PRECOND:%.*]] = icmp ne i32* [[FIRST:%.*]], [[LAST:%.*]]
125 ; CHECK-NEXT: br i1 [[PRECOND]], label [[PH:%.*]], label [[RETURN:%.*]]
127 ; CHECK-NEXT: br label [[LOOP:%.*]]
129 ; CHECK-NEXT: [[PTRIV:%.*]] = phi i32* [ [[FIRST]], [[PH]] ], [ [[PTRPOST:%.*]], [[LOOP]] ]
130 ; CHECK-NEXT: [[OFS:%.*]] = sext i32 [[IDX:%.*]] to i64
131 ; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[PTRIV]], i64 [[OFS]]
132 ; CHECK-NEXT: store i32 3, i32* [[ADR]], align 4
133 ; CHECK-NEXT: [[PTRPOST]] = getelementptr inbounds i32, i32* [[PTRIV]], i32 1
134 ; CHECK-NEXT: [[COND:%.*]] = icmp ne i32* [[PTRPOST]], [[LAST]]
135 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
137 ; CHECK-NEXT: br label [[RETURN]]
139 ; CHECK-NEXT: ret void
141 %precond = icmp ne i32* %first, %last
142 br i1 %precond, label %ph, label %return
148 %ptriv = phi i32* [ %first, %ph ], [ %ptrpost, %loop ]
149 %ofs = sext i32 %idx to i64
150 %adr = getelementptr inbounds i32, i32* %ptriv, i64 %ofs
151 store i32 3, i32* %adr
152 %ptrpost = getelementptr inbounds i32, i32* %ptriv, i32 1
153 %cond = icmp ne i32* %ptrpost, %last
154 br i1 %cond, label %loop, label %exit
163 %structI = type { i32 }
166 define void @bitcastiv(i32 %start, i32 %limit, i32 %step, %structI* %base)
167 ; CHECK-LABEL: @bitcastiv(
169 ; CHECK-NEXT: br label [[LOOP:%.*]]
171 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[START:%.*]], [[ENTRY:%.*]] ], [ [[NEXT:%.*]], [[LOOP]] ]
172 ; CHECK-NEXT: [[P:%.*]] = phi %structI* [ [[BASE:%.*]], [[ENTRY]] ], [ [[PINC:%.*]], [[LOOP]] ]
173 ; CHECK-NEXT: [[ADR:%.*]] = getelementptr [[STRUCTI:%.*]], %structI* [[P]], i32 0, i32 0
174 ; CHECK-NEXT: store i32 3, i32* [[ADR]], align 4
175 ; CHECK-NEXT: [[PP:%.*]] = bitcast %structI* [[P]] to i32*
176 ; CHECK-NEXT: store i32 4, i32* [[PP]], align 4
177 ; CHECK-NEXT: [[PINC]] = getelementptr [[STRUCTI]], %structI* [[P]], i32 1
178 ; CHECK-NEXT: [[NEXT]] = add i32 [[IV]], 1
179 ; CHECK-NEXT: [[COND:%.*]] = icmp ne i32 [[NEXT]], [[LIMIT:%.*]]
180 ; CHECK-NEXT: br i1 [[COND]], label [[LOOP]], label [[EXIT:%.*]]
182 ; CHECK-NEXT: ret void
190 %iv = phi i32 [%start, %entry], [%next, %loop]
191 %p = phi %structI* [%base, %entry], [%pinc, %loop]
192 %adr = getelementptr %structI, %structI* %p, i32 0, i32 0
193 store i32 3, i32* %adr
194 %pp = bitcast %structI* %p to i32*
195 store i32 4, i32* %pp
196 %pinc = getelementptr %structI, %structI* %p, i32 1
197 %next = add i32 %iv, 1
198 %cond = icmp ne i32 %next, %limit
199 br i1 %cond, label %loop, label %exit
205 ; Test inserting a truncate at a phi use.
206 define void @maxvisitor(i32 %limit, i32* %base) nounwind {
207 ; CHECK-LABEL: @maxvisitor(
209 ; CHECK-NEXT: [[SMAX:%.*]] = call i32 @llvm.smax.i32(i32 [[LIMIT:%.*]], i32 1)
210 ; CHECK-NEXT: [[WIDE_TRIP_COUNT:%.*]] = zext i32 [[SMAX]] to i64
211 ; CHECK-NEXT: br label [[LOOP:%.*]]
213 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP_INC:%.*]] ], [ 0, [[ENTRY:%.*]] ]
214 ; CHECK-NEXT: [[MAX:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[MAX_NEXT:%.*]], [[LOOP_INC]] ]
215 ; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[BASE:%.*]], i64 [[INDVARS_IV]]
216 ; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[ADR]], align 4
217 ; CHECK-NEXT: [[CMP19:%.*]] = icmp sgt i32 [[VAL]], [[MAX]]
218 ; CHECK-NEXT: br i1 [[CMP19]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
220 ; CHECK-NEXT: [[TMP0:%.*]] = trunc i64 [[INDVARS_IV]] to i32
221 ; CHECK-NEXT: br label [[LOOP_INC]]
223 ; CHECK-NEXT: br label [[LOOP_INC]]
225 ; CHECK-NEXT: [[MAX_NEXT]] = phi i32 [ [[TMP0]], [[IF_THEN]] ], [ [[MAX]], [[IF_ELSE]] ]
226 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1
227 ; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT]], [[WIDE_TRIP_COUNT]]
228 ; CHECK-NEXT: br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT:%.*]]
230 ; CHECK-NEXT: ret void
236 %idx = phi i32 [ 0, %entry ], [ %idx.next, %loop.inc ]
237 %max = phi i32 [ 0, %entry ], [ %max.next, %loop.inc ]
238 %idxprom = sext i32 %idx to i64
239 %adr = getelementptr inbounds i32, i32* %base, i64 %idxprom
240 %val = load i32, i32* %adr
241 %cmp19 = icmp sgt i32 %val, %max
242 br i1 %cmp19, label %if.then, label %if.else
251 %max.next = phi i32 [ %idx, %if.then ], [ %max, %if.else ]
252 %idx.next = add nsw i32 %idx, 1
253 %cmp = icmp slt i32 %idx.next, %limit
254 br i1 %cmp, label %loop, label %exit
260 ; Test an edge case of removing an identity phi that directly feeds
261 ; back to the loop iv.
262 define void @identityphi(i32 %limit) nounwind {
263 ; CHECK-LABEL: @identityphi(
265 ; CHECK-NEXT: br label [[LOOP:%.*]]
267 ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[CONTROL:%.*]]
269 ; CHECK-NEXT: br label [[CONTROL]]
271 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[LIMIT:%.*]]
272 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
274 ; CHECK-NEXT: ret void
280 %iv = phi i32 [ 0, %entry], [ %iv.next, %control ]
281 br i1 undef, label %if.then, label %control
287 %iv.next = phi i32 [ %iv, %loop ], [ undef, %if.then ]
288 %cmp = icmp slt i32 %iv.next, %limit
289 br i1 %cmp, label %loop, label %exit
295 ; Test cloning an or, which is not an OverflowBinaryOperator.
296 define i64 @cloneOr(i32 %limit, i64* %base) nounwind {
297 ; CHECK-LABEL: @cloneOr(
299 ; CHECK-NEXT: [[HALFLIM:%.*]] = ashr i32 [[LIMIT:%.*]], 2
300 ; CHECK-NEXT: [[TMP0:%.*]] = sext i32 [[HALFLIM]] to i64
301 ; CHECK-NEXT: br label [[LOOP:%.*]]
303 ; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
304 ; CHECK-NEXT: [[ADR:%.*]] = getelementptr i64, i64* [[BASE:%.*]], i64 [[INDVARS_IV]]
305 ; CHECK-NEXT: [[VAL:%.*]] = load i64, i64* [[ADR]], align 8
306 ; CHECK-NEXT: [[TMP1:%.*]] = or i64 [[INDVARS_IV]], 1
307 ; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 2
308 ; CHECK-NEXT: [[CMP:%.*]] = icmp slt i64 [[INDVARS_IV_NEXT]], [[TMP0]]
309 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]]
311 ; CHECK-NEXT: [[VAL_LCSSA:%.*]] = phi i64 [ [[VAL]], [[LOOP]] ]
312 ; CHECK-NEXT: [[T3_LCSSA:%.*]] = phi i64 [ [[TMP1]], [[LOOP]] ]
313 ; CHECK-NEXT: [[RESULT:%.*]] = and i64 [[VAL_LCSSA]], [[T3_LCSSA]]
314 ; CHECK-NEXT: ret i64 [[RESULT]]
317 ; ensure that the loop can't overflow
318 %halfLim = ashr i32 %limit, 2
322 %iv = phi i32 [ 0, %entry], [ %iv.next, %loop ]
323 %t1 = sext i32 %iv to i64
324 %adr = getelementptr i64, i64* %base, i64 %t1
325 %val = load i64, i64* %adr
327 %t3 = sext i32 %t2 to i64
328 %iv.next = add i32 %iv, 2
329 %cmp = icmp slt i32 %iv.next, %halfLim
330 br i1 %cmp, label %loop, label %exit
333 %result = and i64 %val, %t3
337 ; The i induction variable looks like a wrap-around, but it really is just
338 ; a simple affine IV. Make sure that indvars simplifies through.
339 ; ReplaceLoopExitValue should fold the return value to constant 9.
340 define i32 @indirectRecurrence() nounwind {
341 ; CHECK-LABEL: @indirectRecurrence(
343 ; CHECK-NEXT: br label [[LOOP:%.*]]
345 ; CHECK-NEXT: [[J_0:%.*]] = phi i32 [ 1, [[ENTRY:%.*]] ], [ [[J_NEXT:%.*]], [[COND_TRUE:%.*]] ]
346 ; CHECK-NEXT: [[TMP:%.*]] = icmp ne i32 [[J_0]], 10
347 ; CHECK-NEXT: br i1 [[TMP]], label [[COND_TRUE]], label [[RETURN:%.*]]
349 ; CHECK-NEXT: [[J_NEXT]] = add nuw nsw i32 [[J_0]], 1
350 ; CHECK-NEXT: br label [[LOOP]]
352 ; CHECK-NEXT: ret i32 9
358 %j.0 = phi i32 [ 1, %entry ], [ %j.next, %cond_true ]
359 %i.0 = phi i32 [ 0, %entry ], [ %j.0, %cond_true ]
360 %tmp = icmp ne i32 %j.0, 10
361 br i1 %tmp, label %cond_true, label %return
364 %j.next = add i32 %j.0, 1
371 ; Eliminate the congruent phis j, k, and l.
372 ; Eliminate the redundant IV increments k.next and l.next.
373 ; Two phis should remain, one starting at %init, and one at %init1.
374 ; Two increments should remain, one by %step and one by %step1.
375 ; Five live-outs should remain.
376 define i32 @isomorphic(i32 %init, i32 %step, i32 %lim) nounwind {
377 ; CHECK-LABEL: @isomorphic(
379 ; CHECK-NEXT: [[STEP1:%.*]] = add i32 [[STEP:%.*]], 1
380 ; CHECK-NEXT: [[INIT1:%.*]] = add i32 [[INIT:%.*]], [[STEP1]]
381 ; CHECK-NEXT: br label [[LOOP:%.*]]
383 ; CHECK-NEXT: [[II:%.*]] = phi i32 [ [[INIT1]], [[ENTRY:%.*]] ], [ [[II_NEXT:%.*]], [[LOOP]] ]
384 ; CHECK-NEXT: [[J:%.*]] = phi i32 [ [[INIT]], [[ENTRY]] ], [ [[J_NEXT:%.*]], [[LOOP]] ]
385 ; CHECK-NEXT: [[II_NEXT]] = add i32 [[II]], [[STEP1]]
386 ; CHECK-NEXT: [[J_NEXT]] = add i32 [[J]], [[STEP1]]
387 ; CHECK-NEXT: [[L_STEP:%.*]] = add i32 [[J]], [[STEP]]
388 ; CHECK-NEXT: [[CMP:%.*]] = icmp ne i32 [[II_NEXT]], [[LIM:%.*]]
389 ; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[RETURN:%.*]]
391 ; CHECK-NEXT: [[I_LCSSA:%.*]] = phi i32 [ [[J]], [[LOOP]] ]
392 ; CHECK-NEXT: [[J_NEXT_LCSSA:%.*]] = phi i32 [ [[J_NEXT]], [[LOOP]] ]
393 ; CHECK-NEXT: [[K_NEXT_LCSSA:%.*]] = phi i32 [ [[II_NEXT]], [[LOOP]] ]
394 ; CHECK-NEXT: [[L_STEP_LCSSA:%.*]] = phi i32 [ [[L_STEP]], [[LOOP]] ]
395 ; CHECK-NEXT: [[L_NEXT_LCSSA:%.*]] = phi i32 [ [[J_NEXT]], [[LOOP]] ]
396 ; CHECK-NEXT: [[SUM1:%.*]] = add i32 [[I_LCSSA]], [[J_NEXT_LCSSA]]
397 ; CHECK-NEXT: [[SUM2:%.*]] = add i32 [[SUM1]], [[K_NEXT_LCSSA]]
398 ; CHECK-NEXT: [[SUM3:%.*]] = add i32 [[SUM1]], [[L_STEP_LCSSA]]
399 ; CHECK-NEXT: [[SUM4:%.*]] = add i32 [[SUM1]], [[L_NEXT_LCSSA]]
400 ; CHECK-NEXT: ret i32 [[SUM4]]
403 %step1 = add i32 %step, 1
404 %init1 = add i32 %init, %step1
405 %l.0 = sub i32 %init1, %step1
409 %ii = phi i32 [ %init1, %entry ], [ %ii.next, %loop ]
410 %i = phi i32 [ %init, %entry ], [ %ii, %loop ]
411 %j = phi i32 [ %init, %entry ], [ %j.next, %loop ]
412 %k = phi i32 [ %init1, %entry ], [ %k.next, %loop ]
413 %l = phi i32 [ %l.0, %entry ], [ %l.next, %loop ]
414 %ii.next = add i32 %ii, %step1
415 %j.next = add i32 %j, %step1
416 %k.next = add i32 %k, %step1
417 %l.step = add i32 %l, %step
418 %l.next = add i32 %l.step, 1
419 %cmp = icmp ne i32 %ii.next, %lim
420 br i1 %cmp, label %loop, label %return
423 %sum1 = add i32 %i, %j.next
424 %sum2 = add i32 %sum1, %k.next
425 %sum3 = add i32 %sum1, %l.step
426 %sum4 = add i32 %sum1, %l.next
430 ; Test a GEP IV that is derived from another GEP IV by a nop gep that
431 ; lowers the type without changing the expression.
432 %structIF = type { i32, float }
434 define void @congruentgepiv(%structIF* %base) nounwind uwtable ssp {
435 ; CHECK-LABEL: @congruentgepiv(
437 ; CHECK-NEXT: br label [[LOOP:%.*]]
439 ; CHECK-NEXT: [[INDVARS1:%.*]] = bitcast %structIF* [[BASE:%.*]] to i32*
440 ; CHECK-NEXT: store i32 4, i32* [[INDVARS1]], align 4
441 ; CHECK-NEXT: br i1 false, label [[LATCH:%.*]], label [[EXIT:%.*]]
443 ; CHECK-NEXT: br label [[LOOP]]
445 ; CHECK-NEXT: ret void
448 %first = getelementptr inbounds %structIF, %structIF* %base, i64 0, i32 0
452 %ptr.iv = phi %structIF* [ %ptr.inc, %latch ], [ %base, %entry ]
453 %next = phi i32* [ %next.inc, %latch ], [ %first, %entry ]
454 store i32 4, i32* %next
455 br i1 undef, label %latch, label %exit
457 latch: ; preds = %for.inc50.i
458 %ptr.inc = getelementptr inbounds %structIF, %structIF* %ptr.iv, i64 1
459 %next.inc = getelementptr inbounds %structIF, %structIF* %ptr.inc, i64 0, i32 0
466 declare void @use32(i32 %x)
467 declare void @use64(i64 %x)
469 ; Test a widened IV that is used by a phi on different paths within the loop.
470 define void @phiUsesTrunc() nounwind {
471 ; CHECK-LABEL: @phiUsesTrunc(
473 ; CHECK-NEXT: br i1 undef, label [[FOR_BODY_PREHEADER:%.*]], label [[FOR_END:%.*]]
474 ; CHECK: for.body.preheader:
475 ; CHECK-NEXT: br label [[FOR_BODY:%.*]]
477 ; CHECK-NEXT: br i1 undef, label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]]
479 ; CHECK-NEXT: br i1 undef, label [[IF_THEN33:%.*]], label [[FOR_INC:%.*]]
481 ; CHECK-NEXT: br label [[FOR_INC]]
483 ; CHECK-NEXT: br i1 undef, label [[IF_THEN97:%.*]], label [[FOR_INC]]
485 ; CHECK-NEXT: call void @use64(i64 1)
486 ; CHECK-NEXT: br label [[FOR_INC]]
488 ; CHECK-NEXT: [[KMIN_1:%.*]] = phi i32 [ 1, [[IF_THEN33]] ], [ 0, [[IF_THEN]] ], [ 1, [[IF_THEN97]] ], [ 0, [[IF_ELSE]] ]
489 ; CHECK-NEXT: call void @use32(i32 [[KMIN_1]])
490 ; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[FOR_END_LOOPEXIT:%.*]]
491 ; CHECK: for.end.loopexit:
492 ; CHECK-NEXT: br label [[FOR_END]]
494 ; CHECK-NEXT: ret void
497 br i1 undef, label %for.body, label %for.end
500 %iv = phi i32 [ %inc, %for.inc ], [ 1, %entry ]
501 br i1 undef, label %if.then, label %if.else
504 br i1 undef, label %if.then33, label %for.inc
510 br i1 undef, label %if.then97, label %for.inc
513 %idxprom100 = sext i32 %iv to i64
514 call void @use64(i64 %idxprom100)
518 %kmin.1 = phi i32 [ %iv, %if.then33 ], [ 0, %if.then ], [ %iv, %if.then97 ], [ 0, %if.else ]
519 call void @use32(i32 %kmin.1)
520 %inc = add nsw i32 %iv, 1
521 br i1 undef, label %for.body, label %for.end