| blob | 9b9778c49b624736c11c01328283998f17303935 |
1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
2 ; RUN: opt < %s -S -openmp-opt-cgscc | FileCheck %s
3 ; RUN: opt < %s -S -passes=openmp-opt-cgscc | FileCheck %s
5 declare void @useI32(i32)
6 declare void @unknown()
7 declare void @aligned_barrier() "llvm.assume"="ompx_aligned_barrier"
8 declare void @llvm.nvvm.barrier0()
9 declare i32 @llvm.nvvm.barrier0.and(i32)
10 declare i32 @llvm.nvvm.barrier0.or(i32)
11 declare i32 @llvm.nvvm.barrier0.popc(i32)
12 declare void @llvm.amdgcn.s.barrier()
14 ;.
15 ; CHECK: @[[GC1:[a-zA-Z0-9_$"\\.-]+]] = constant i32 42
16 ; CHECK: @[[GC2:[a-zA-Z0-9_$"\\.-]+]] = addrspace(4) global i32 0
17 ; CHECK: @[[GPTR4:[a-zA-Z0-9_$"\\.-]+]] = addrspace(4) global i32 addrspace(4)* null
18 ; CHECK: @[[G:[a-zA-Z0-9_$"\\.-]+]] = global i32 42
19 ; CHECK: @[[GS:[a-zA-Z0-9_$"\\.-]+]] = addrspace(3) global i32 0
20 ; CHECK: @[[GPTR:[a-zA-Z0-9_$"\\.-]+]] = global i32* null
21 ; CHECK: @[[PG1:[a-zA-Z0-9_$"\\.-]+]] = thread_local global i32 42
22 ; CHECK: @[[PG2:[a-zA-Z0-9_$"\\.-]+]] = addrspace(5) global i32 0
23 ; CHECK: @[[GPTR5:[a-zA-Z0-9_$"\\.-]+]] = global i32 addrspace(5)* null
24 ; CHECK: @[[G1:[a-zA-Z0-9_$"\\.-]+]] = global i32 42
25 ; CHECK: @[[G2:[a-zA-Z0-9_$"\\.-]+]] = addrspace(1) global i32 0
26 ;.
27 define void @pos_empty_1() {
28 ; CHECK-LABEL: define {{[^@]+}}@pos_empty_1() {
29 ; CHECK-NEXT: ret void
30 ;
31 call void @unknown() "llvm.assume"="ompx_aligned_barrier"
32 ret void
33 }
34 define void @pos_empty_2() {
35 ; CHECK-LABEL: define {{[^@]+}}@pos_empty_2() {
36 ; CHECK-NEXT: ret void
37 ;
38 call void @aligned_barrier()
39 ret void
40 }
41 define void @pos_empty_3() {
42 ; CHECK-LABEL: define {{[^@]+}}@pos_empty_3() {
43 ; CHECK-NEXT: ret void
44 ;
45 call void @llvm.nvvm.barrier0()
46 ret void
47 }
48 define void @pos_empty_4() {
49 ; CHECK-LABEL: define {{[^@]+}}@pos_empty_4() {
50 ; CHECK-NEXT: ret void
51 ;
52 call i32 @llvm.nvvm.barrier0.and(i32 0)
53 ret void
54 }
55 define void @pos_empty_5() {
56 ; CHECK-LABEL: define {{[^@]+}}@pos_empty_5() {
57 ; CHECK-NEXT: ret void
58 ;
59 call i32 @llvm.nvvm.barrier0.or(i32 0)
60 ret void
61 }
62 define void @pos_empty_6() {
63 ; CHECK-LABEL: define {{[^@]+}}@pos_empty_6() {
64 ; CHECK-NEXT: ret void
65 ;
66 call i32 @llvm.nvvm.barrier0.popc(i32 0)
67 ret void
68 }
69 define void @neg_empty_7() {
70 ; CHECK-LABEL: define {{[^@]+}}@neg_empty_7() {
71 ; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()
72 ; CHECK-NEXT: ret void
73 ;
74 call void @llvm.amdgcn.s.barrier()
75 ret void
76 }
77 define void @neg_empty_1() {
78 ; CHECK-LABEL: define {{[^@]+}}@neg_empty_1() {
79 ; CHECK-NEXT: call void @unknown()
80 ; CHECK-NEXT: ret void
81 ;
82 call void @unknown()
83 ret void
84 }
85 define void @neg_empty_2() {
86 ; CHECK-LABEL: define {{[^@]+}}@neg_empty_2() {
87 ; CHECK-NEXT: call void @aligned_barrier()
88 ; CHECK-NEXT: ret void
89 ;
90 call void @aligned_barrier()
91 ret void
92 }
94 @GC1 = constant i32 42
95 @GC2 = addrspace(4) global i32 0
96 @GPtr4 = addrspace(4) global i32 addrspace(4)* null
97 define void @pos_constant_loads() {
98 ; CHECK-LABEL: define {{[^@]+}}@pos_constant_loads() {
99 ; CHECK-NEXT: [[ARG:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)** addrspacecast (i32 addrspace(4)* addrspace(4)* @GPtr4 to i32 addrspace(4)**), align 8
100 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* addrspacecast (i32 addrspace(4)* @GC2 to i32*), align 4
101 ; CHECK-NEXT: [[ARGC:%.*]] = addrspacecast i32 addrspace(4)* [[ARG]] to i32*
102 ; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[ARGC]], align 4
103 ; CHECK-NEXT: call void @aligned_barrier()
104 ; CHECK-NEXT: [[D:%.*]] = add i32 42, [[B]]
105 ; CHECK-NEXT: [[E:%.*]] = add i32 [[D]], [[C]]
106 ; CHECK-NEXT: call void @useI32(i32 [[E]])
107 ; CHECK-NEXT: ret void
108 ;
109 %GPtr4c = addrspacecast i32 addrspace(4)*addrspace(4)* @GPtr4 to i32 addrspace(4)**
110 %arg = load i32 addrspace(4)*, i32 addrspace(4)** %GPtr4c
111 %a = load i32, i32* @GC1
112 call void @aligned_barrier()
113 %GC2c = addrspacecast i32 addrspace(4)* @GC2 to i32*
114 %b = load i32, i32* %GC2c
115 call void @aligned_barrier()
116 %argc = addrspacecast i32 addrspace(4)* %arg to i32*
117 %c = load i32, i32* %argc
118 call void @aligned_barrier()
119 %d = add i32 %a, %b
120 %e = add i32 %d, %c
121 call void @useI32(i32 %e)
122 ret void
123 }
124 @G = global i32 42
125 @GS = addrspace(3) global i32 0
126 @GPtr = global i32* null
127 ; TODO: We could remove some of the barriers due to the lack of write effects.
128 define void @neg_loads() {
129 ; CHECK-LABEL: define {{[^@]+}}@neg_loads() {
130 ; CHECK-NEXT: [[ARG:%.*]] = load i32*, i32** @GPtr, align 8
131 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* @G, align 4
132 ; CHECK-NEXT: call void @aligned_barrier()
133 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @GS to i32*), align 4
134 ; CHECK-NEXT: call void @aligned_barrier()
135 ; CHECK-NEXT: [[C:%.*]] = load i32, i32* [[ARG]], align 4
136 ; CHECK-NEXT: call void @aligned_barrier()
137 ; CHECK-NEXT: [[D:%.*]] = add i32 [[A]], [[B]]
138 ; CHECK-NEXT: [[E:%.*]] = add i32 [[D]], [[C]]
139 ; CHECK-NEXT: call void @useI32(i32 [[E]])
140 ; CHECK-NEXT: ret void
141 ;
142 %arg = load i32*, i32** @GPtr
143 %a = load i32, i32* @G
144 call void @aligned_barrier()
145 %GSc = addrspacecast i32 addrspace(3)* @GS to i32*
146 %b = load i32, i32* %GSc
147 call void @aligned_barrier()
148 %c = load i32, i32* %arg
149 call void @aligned_barrier()
150 %d = add i32 %a, %b
151 %e = add i32 %d, %c
152 call void @useI32(i32 %e)
153 ret void
154 }
155 @PG1 = thread_local global i32 42
156 @PG2 = addrspace(5) global i32 0
157 @GPtr5 = global i32 addrspace(5)* null
158 define void @pos_priv_mem() {
159 ; CHECK-LABEL: define {{[^@]+}}@pos_priv_mem() {
160 ; CHECK-NEXT: [[ARG:%.*]] = load i32 addrspace(5)*, i32 addrspace(5)** @GPtr5, align 8
161 ; CHECK-NEXT: [[LOC:%.*]] = alloca i32, align 4
162 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* @PG1, align 4
163 ; CHECK-NEXT: store i32 [[A]], i32* [[LOC]], align 4
164 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* addrspacecast (i32 addrspace(5)* @PG2 to i32*), align 4
165 ; CHECK-NEXT: call void @aligned_barrier()
166 ; CHECK-NEXT: [[ARGC:%.*]] = addrspacecast i32 addrspace(5)* [[ARG]] to i32*
167 ; CHECK-NEXT: store i32 [[B]], i32* [[ARGC]], align 4
168 ; CHECK-NEXT: [[V:%.*]] = load i32, i32* [[LOC]], align 4
169 ; CHECK-NEXT: store i32 [[V]], i32* @PG1, align 4
170 ; CHECK-NEXT: ret void
171 ;
172 %arg = load i32 addrspace(5)*, i32 addrspace(5)** @GPtr5
173 %loc = alloca i32
174 %a = load i32, i32* @PG1
175 call void @aligned_barrier()
176 store i32 %a, i32* %loc
177 %PG2c = addrspacecast i32 addrspace(5)* @PG2 to i32*
178 %b = load i32, i32* %PG2c
179 call void @aligned_barrier()
180 %argc = addrspacecast i32 addrspace(5)* %arg to i32*
181 store i32 %b, i32* %argc
182 call void @aligned_barrier()
183 %v = load i32, i32* %loc
184 store i32 %v, i32* @PG1
185 call void @aligned_barrier()
186 ret void
187 }
188 @G1 = global i32 42
189 @G2 = addrspace(1) global i32 0
190 define void @neg_mem() {
191 ; CHECK-LABEL: define {{[^@]+}}@neg_mem() {
192 ; CHECK-NEXT: [[ARG:%.*]] = load i32*, i32** @GPtr, align 8
193 ; CHECK-NEXT: [[A:%.*]] = load i32, i32* @G1, align 4
194 ; CHECK-NEXT: call void @aligned_barrier()
195 ; CHECK-NEXT: store i32 [[A]], i32* [[ARG]], align 4
196 ; CHECK-NEXT: call void @aligned_barrier()
197 ; CHECK-NEXT: [[B:%.*]] = load i32, i32* addrspacecast (i32 addrspace(1)* @G2 to i32*), align 4
198 ; CHECK-NEXT: store i32 [[B]], i32* @G1, align 4
199 ; CHECK-NEXT: ret void
200 ;
201 %arg = load i32*, i32** @GPtr
202 %a = load i32, i32* @G1
203 call void @aligned_barrier()
204 store i32 %a, i32* %arg
205 call void @aligned_barrier()
206 %G2c = addrspacecast i32 addrspace(1)* @G2 to i32*
207 %b = load i32, i32* %G2c
208 store i32 %b, i32* @G1
209 call void @aligned_barrier()
210 ret void
211 }
213 define void @pos_multiple() {
214 ; CHECK-LABEL: define {{[^@]+}}@pos_multiple() {
215 ; CHECK-NEXT: call void @llvm.amdgcn.s.barrier()
216 ; CHECK-NEXT: ret void
217 ;
218 call void @llvm.nvvm.barrier0()
219 call void @aligned_barrier()
220 call void @aligned_barrier()
221 call void @llvm.amdgcn.s.barrier()
222 call void @aligned_barrier()
223 call void @llvm.nvvm.barrier0()
224 call void @aligned_barrier()
225 call void @aligned_barrier()
226 ret void
227 }
229 !llvm.module.flags = !{!12,!13}
230 !nvvm.annotations = !{!0,!1,!2,!3,!4,!5,!6,!7,!8,!9,!10,!11}
232 !0 = !{void ()* @pos_empty_1, !"kernel", i32 1}
233 !1 = !{void ()* @pos_empty_2, !"kernel", i32 1}
234 !2 = !{void ()* @pos_empty_3, !"kernel", i32 1}
235 !3 = !{void ()* @pos_empty_4, !"kernel", i32 1}
236 !4 = !{void ()* @pos_empty_5, !"kernel", i32 1}
237 !5 = !{void ()* @pos_empty_6, !"kernel", i32 1}
238 !6 = !{void ()* @neg_empty_7, !"kernel", i32 1}
239 !7 = !{void ()* @pos_constant_loads, !"kernel", i32 1}
240 !8 = !{void ()* @neg_loads, !"kernel", i32 1}
241 !9 = !{void ()* @pos_priv_mem, !"kernel", i32 1}
242 !10 = !{void ()* @neg_mem, !"kernel", i32 1}
243 !11 = !{void ()* @pos_multiple, !"kernel", i32 1}
244 !12 = !{i32 7, !"openmp", i32 50}
245 !13 = !{i32 7, !"openmp-device", i32 50}
246 ;.
247 ; CHECK: attributes #[[ATTR0:[0-9]+]] = { "llvm.assume"="ompx_aligned_barrier" }
248 ; CHECK: attributes #[[ATTR1:[0-9]+]] = { convergent nocallback nounwind }
249 ; CHECK: attributes #[[ATTR2:[0-9]+]] = { convergent nounwind willreturn }
250 ;.
251 ; CHECK: [[META0:![0-9]+]] = !{i32 7, !"openmp", i32 50}
252 ; CHECK: [[META1:![0-9]+]] = !{i32 7, !"openmp-device", i32 50}
253 ; CHECK: [[META2:![0-9]+]] = !{void ()* @pos_empty_1, !"kernel", i32 1}
254 ; CHECK: [[META3:![0-9]+]] = !{void ()* @pos_empty_2, !"kernel", i32 1}
255 ; CHECK: [[META4:![0-9]+]] = !{void ()* @pos_empty_3, !"kernel", i32 1}
256 ; CHECK: [[META5:![0-9]+]] = !{void ()* @pos_empty_4, !"kernel", i32 1}
257 ; CHECK: [[META6:![0-9]+]] = !{void ()* @pos_empty_5, !"kernel", i32 1}
258 ; CHECK: [[META7:![0-9]+]] = !{void ()* @pos_empty_6, !"kernel", i32 1}
259 ; CHECK: [[META8:![0-9]+]] = !{void ()* @neg_empty_7, !"kernel", i32 1}
260 ; CHECK: [[META9:![0-9]+]] = !{void ()* @pos_constant_loads, !"kernel", i32 1}
261 ; CHECK: [[META10:![0-9]+]] = !{void ()* @neg_loads, !"kernel", i32 1}
262 ; CHECK: [[META11:![0-9]+]] = !{void ()* @pos_priv_mem, !"kernel", i32 1}
263 ; CHECK: [[META12:![0-9]+]] = !{void ()* @neg_mem, !"kernel", i32 1}
264 ; CHECK: [[META13:![0-9]+]] = !{void ()* @pos_multiple, !"kernel", i32 1}
265 ;.