lldb/unittests/Disassembler/TestArm64Disassembly.cpp

   1 //===-- TestArm64Disassembly.cpp ------------------------------------*- C++
   2 //-*-===//
   3
   4 //
   5 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   6 // See https://llvm.org/LICENSE.txt for license information.
   7 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   8 //
   9 //===----------------------------------------------------------------------===//
  10
  11 #include "gtest/gtest.h"
  12
  13 #include "lldb/Core/Address.h"
  14 #include "lldb/Core/Disassembler.h"
  15 #include "lldb/Utility/ArchSpec.h"
  16 #include "lldb/Target/ExecutionContext.h"
  17
  18 #include "Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h"
  19 #include "llvm/Support/TargetSelect.h"
  20
  21 using namespace lldb;
  22 using namespace lldb_private;
  23
  24 class TestArm64Disassembly : public testing::Test {
  25 public:
  26   static void SetUpTestCase();
  27   static void TearDownTestCase();
  28
  29   //  virtual void SetUp() override { }
  30   //  virtual void TearDown() override { }
  31
  32 protected:
  33 };
  34
  35 void TestArm64Disassembly::SetUpTestCase() {
  36   llvm::InitializeAllTargets();
  37   llvm::InitializeAllAsmPrinters();
  38   llvm::InitializeAllTargetMCs();
  39   llvm::InitializeAllDisassemblers();
  40   DisassemblerLLVMC::Initialize();
  41 }
  42
  43 void TestArm64Disassembly::TearDownTestCase() {
  44   DisassemblerLLVMC::Terminate();
  45 }
  46
  47 TEST_F(TestArm64Disassembly, TestArmv81Instruction) {
  48   ArchSpec arch("arm64-apple-ios");
  49
  50   const unsigned num_of_instructions = 2;
  51   uint8_t data[] = {
  52       0xff, 0x43, 0x00, 0xd1, // 0xd10043ff :  sub    sp, sp, #0x10
  53       0x62, 0x7c, 0xa1, 0xc8, // 0xc8a17c62 :  cas    x1, x2, [x3] (cas defined in ARM v8.1 & newer)
  54   };
  55
  56   DisassemblerSP disass_sp;
  57   Address start_addr(0x100);
  58   disass_sp = Disassembler::DisassembleBytes(arch, nullptr, nullptr, start_addr,
  59                                  &data, sizeof (data), num_of_instructions, false);
  60
  61   // If we failed to get a disassembler, we can assume it is because
  62   // the llvm we linked against was not built with the ARM target,
  63   // and we should skip these tests without marking anything as failing.
  64
  65   if (disass_sp) {
  66     const InstructionList inst_list (disass_sp->GetInstructionList());
  67     EXPECT_EQ (num_of_instructions, inst_list.GetSize());
  68
  69     InstructionSP inst_sp;
  70     const char *mnemonic;
  71     ExecutionContext exe_ctx (nullptr, nullptr, nullptr);
  72     inst_sp = inst_list.GetInstructionAtIndex (0);
  73     mnemonic = inst_sp->GetMnemonic(&exe_ctx);
  74     ASSERT_STREQ ("sub", mnemonic);
  75
  76     inst_sp = inst_list.GetInstructionAtIndex (1);
  77     mnemonic = inst_sp->GetMnemonic(&exe_ctx);
  78     ASSERT_STREQ ("cas", mnemonic);
  79   }
  80 }