1 //===-- TestArmv7Disassembly.cpp ------------------------------------*- C++
5 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
6 // See https://llvm.org/LICENSE.txt for license information.
7 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
9 //===----------------------------------------------------------------------===//
11 #include "gtest/gtest.h"
13 #include "lldb/Core/Address.h"
14 #include "lldb/Core/Disassembler.h"
15 #include "lldb/Utility/ArchSpec.h"
16 #include "lldb/Target/ExecutionContext.h"
18 #include "Plugins/Disassembler/LLVMC/DisassemblerLLVMC.h"
19 #include "llvm/Support/TargetSelect.h"
22 using namespace lldb_private
;
24 class TestArmv7Disassembly
: public testing::Test
{
26 static void SetUpTestCase();
27 static void TearDownTestCase();
29 // virtual void SetUp() override { }
30 // virtual void TearDown() override { }
35 void TestArmv7Disassembly::SetUpTestCase() {
36 llvm::InitializeAllTargets();
37 llvm::InitializeAllAsmPrinters();
38 llvm::InitializeAllTargetMCs();
39 llvm::InitializeAllDisassemblers();
40 DisassemblerLLVMC::Initialize();
43 void TestArmv7Disassembly::TearDownTestCase() {
44 DisassemblerLLVMC::Terminate();
47 TEST_F(TestArmv7Disassembly
, TestCortexFPDisass
) {
48 ArchSpec
arch("armv7em--");
50 const unsigned num_of_instructions
= 3;
52 0x00, 0xee, 0x10, 0x2a, // 0xee002a10 : vmov s0, r2
53 0xb8, 0xee, 0xc0, 0x0b, // 0xeeb80bc0 : vcvt.f64.s32 d0, s0
54 0xb6, 0xee, 0x00, 0x0a, // 0xeeb60a00 : vmov.f32 s0, #5.000000e-01
57 // these can be disassembled by hand with llvm-mc, e.g.
59 // 0x00, 0xee, 0x10, 0x2a, // 0xee002a10 : vmov s0, r2
61 // echo 0x00 0xee 0x10 0x2a | llvm-mc -arch thumb -disassemble -mattr=+fp-armv8
64 DisassemblerSP disass_sp
;
65 Address
start_addr(0x100);
66 disass_sp
= Disassembler::DisassembleBytes(arch
, nullptr, nullptr, start_addr
,
67 &data
, sizeof (data
), num_of_instructions
, false);
69 // If we failed to get a disassembler, we can assume it is because
70 // the llvm we linked against was not built with the ARM target,
71 // and we should skip these tests without marking anything as failing.
74 const InstructionList
inst_list (disass_sp
->GetInstructionList());
75 EXPECT_EQ (num_of_instructions
, inst_list
.GetSize());
77 InstructionSP inst_sp
;
79 ExecutionContext
exe_ctx (nullptr, nullptr, nullptr);
80 inst_sp
= inst_list
.GetInstructionAtIndex (0);
81 mnemonic
= inst_sp
->GetMnemonic(&exe_ctx
);
82 ASSERT_STREQ ("vmov", mnemonic
);
84 inst_sp
= inst_list
.GetInstructionAtIndex (1);
85 mnemonic
= inst_sp
->GetMnemonic(&exe_ctx
);
86 ASSERT_STREQ ("vcvt.f64.s32", mnemonic
);
88 inst_sp
= inst_list
.GetInstructionAtIndex (2);
89 mnemonic
= inst_sp
->GetMnemonic(&exe_ctx
);
90 ASSERT_STREQ ("vmov.f32", mnemonic
);