1 // Test how BOLT handles indirect branch sequence of instructions in
2 // AArch64MCPlus builder.
6 // REQUIRES
: system-linux
7 // RUN
: llvm-mc
-filetype
=obj
-triple aarch64-unknown-unknown
%s
-o
%t.o
8 // RUN
: %clang
%cflags
--target
=aarch64-unknown-linux
%t.o
-o
%t.exe
-Wl
,-q
9 // RUN
: llvm-bolt
%t.exe
-o
%t.bolt
--print-cfg
--strict\
10 // RUN
: -v
=1 2>&1 | FileCheck
%s
12 // Pattern
1: there is no shift amount after the
'add' instruction.
14 // adr x6
, 0x219fb0 <sigall_set+
0x88>
15 // add x6
, x6
, x14
, lsl
#2
17 // add x6
, x6
, w7
, sxtw
=> no shift amount
21 // Pattern
2: nop/adr pair is used in place of adrp
/add
23 // nop => nop/adr instead of adrp
/add
24 // adr x13
, 0x215a18 <_nl_value_type_LC_COLLATE+
0x50>
25 // ldrh w13
, [x13
, w12
, uxtw
#1]
26 // adr x12
, 0x247b30 <__gettextparse+
0x5b0>
27 // add x13
, x12
, w13
, sxth
#2
33 .type _start, %function
42 // CHECK
: BOLT-WARNING
: Failed to match indirect branch
: ShiftVAL
!= 2
44 .type test1, %function
48 add x3
, x3
, x1
, lsl
#2
60 // CHECK
: BOLT-WARNING
: Failed to match indirect branch
: nop/adr instead of adrp
/add
62 .type test2, %function
66 ldrh w3
, [x3
, x1
, lsl
#1]
68 add x3
, x1
, w3
, sxth
#2
75 .section .rodata,"a",@progbits
77 .word test1_0-datatable
78 .word test1_1-datatable
79 .word test1_2-datatable
82 .hword (test2_0-test2_0)>>2
83 .hword (test2_1-test2_0)>>2