clang/lib/Basic/Targets/SystemZ.h

   1 //===--- SystemZ.h - Declare SystemZ target feature support -----*- C++ -*-===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8 //
   9 // This file declares SystemZ TargetInfo objects.
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #ifndef LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
  14 #define LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H
  15
  16 #include "clang/Basic/TargetInfo.h"
  17 #include "clang/Basic/TargetOptions.h"
  18 #include "llvm/Support/Compiler.h"
  19 #include "llvm/TargetParser/Triple.h"
  20
  21 namespace clang {
  22 namespace targets {
  23
  24 static const unsigned ZOSAddressMap[] = {
  25     0, // Default
  26     0, // opencl_global
  27     0, // opencl_local
  28     0, // opencl_constant
  29     0, // opencl_private
  30     0, // opencl_generic
  31     0, // opencl_global_device
  32     0, // opencl_global_host
  33     0, // cuda_device
  34     0, // cuda_constant
  35     0, // cuda_shared
  36     0, // sycl_global
  37     0, // sycl_global_device
  38     0, // sycl_global_host
  39     0, // sycl_local
  40     0, // sycl_private
  41     0, // ptr32_sptr
  42     1, // ptr32_uptr
  43     0, // ptr64
  44     0, // hlsl_groupshared
  45     0  // wasm_funcref
  46 };
  47
  48 class LLVM_LIBRARY_VISIBILITY SystemZTargetInfo : public TargetInfo {
  49
  50   static const char *const GCCRegNames[];
  51   int ISARevision;
  52   bool HasTransactionalExecution;
  53   bool HasVector;
  54   bool SoftFloat;
  55   bool UnalignedSymbols;
  56   enum AddrSpace { ptr32 = 1 };
  57
  58 public:
  59   SystemZTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
  60       : TargetInfo(Triple), ISARevision(getISARevision("z10")),
  61         HasTransactionalExecution(false), HasVector(false), SoftFloat(false),
  62         UnalignedSymbols(false) {
  63     IntMaxType = SignedLong;
  64     Int64Type = SignedLong;
  65     IntWidth = IntAlign = 32;
  66     LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
  67     Int128Align = 64;
  68     PointerWidth = PointerAlign = 64;
  69     LongDoubleWidth = 128;
  70     LongDoubleAlign = 64;
  71     LongDoubleFormat = &llvm::APFloat::IEEEquad();
  72     DefaultAlignForAttributeAligned = 64;
  73     MinGlobalAlign = 16;
  74     HasUnalignedAccess = true;
  75     if (Triple.isOSzOS()) {
  76       if (Triple.isArch64Bit()) {
  77         AddrSpaceMap = &ZOSAddressMap;
  78       }
  79       TLSSupported = false;
  80       // All vector types are default aligned on an 8-byte boundary, even if the
  81       // vector facility is not available. That is different from Linux.
  82       MaxVectorAlign = 64;
  83       // Compared to Linux/ELF, the data layout differs only in some details:
  84       // - name mangling is GOFF.
  85       // - 32 bit pointers, either as default or special address space
  86       resetDataLayout("E-m:l-p1:32:32-i1:8:16-i8:8:16-i64:64-f128:64-v128:64-"
  87                       "a:8:16-n32:64");
  88     } else {
  89       TLSSupported = true;
  90       resetDataLayout("E-m:e-i1:8:16-i8:8:16-i64:64-f128:64"
  91                       "-v128:64-a:8:16-n32:64");
  92     }
  93     MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 128;
  94     HasStrictFP = true;
  95   }
  96
  97   unsigned getMinGlobalAlign(uint64_t Size, bool HasNonWeakDef) const override;
  98
  99   void getTargetDefines(const LangOptions &Opts,
 100                         MacroBuilder &Builder) const override;
 101
 102   ArrayRef<Builtin::Info> getTargetBuiltins() const override;
 103
 104   ArrayRef<const char *> getGCCRegNames() const override;
 105
 106   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
 107     // No aliases.
 108     return {};
 109   }
 110
 111   ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
 112
 113   bool isSPRegName(StringRef RegName) const override {
 114     return RegName == "r15";
 115   }
 116
 117   bool validateAsmConstraint(const char *&Name,
 118                              TargetInfo::ConstraintInfo &info) const override;
 119
 120   std::string convertConstraint(const char *&Constraint) const override {
 121     switch (Constraint[0]) {
 122     case 'p': // Keep 'p' constraint.
 123       return std::string("p");
 124     case 'Z':
 125       switch (Constraint[1]) {
 126       case 'Q': // Address with base and unsigned 12-bit displacement
 127       case 'R': // Likewise, plus an index
 128       case 'S': // Address with base and signed 20-bit displacement
 129       case 'T': // Likewise, plus an index
 130         // "^" hints llvm that this is a 2 letter constraint.
 131         // "Constraint++" is used to promote the string iterator
 132         // to the next constraint.
 133         return std::string("^") + std::string(Constraint++, 2);
 134       default:
 135         break;
 136       }
 137       break;
 138     default:
 139       break;
 140     }
 141     return TargetInfo::convertConstraint(Constraint);
 142   }
 143
 144   std::string_view getClobbers() const override {
 145     // FIXME: Is this really right?
 146     return "";
 147   }
 148
 149   BuiltinVaListKind getBuiltinVaListKind() const override {
 150     return TargetInfo::SystemZBuiltinVaList;
 151   }
 152
 153   int getISARevision(StringRef Name) const;
 154
 155   bool isValidCPUName(StringRef Name) const override {
 156     return getISARevision(Name) != -1;
 157   }
 158
 159   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
 160
 161   bool isValidTuneCPUName(StringRef Name) const override {
 162     return isValidCPUName(Name);
 163   }
 164
 165   void fillValidTuneCPUList(SmallVectorImpl<StringRef> &Values) const override {
 166     fillValidCPUList(Values);
 167   }
 168
 169   bool setCPU(const std::string &Name) override {
 170     ISARevision = getISARevision(Name);
 171     return ISARevision != -1;
 172   }
 173
 174   bool
 175   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
 176                  StringRef CPU,
 177                  const std::vector<std::string> &FeaturesVec) const override {
 178     int ISARevision = getISARevision(CPU);
 179     if (ISARevision >= 10)
 180       Features["transactional-execution"] = true;
 181     if (ISARevision >= 11)
 182       Features["vector"] = true;
 183     if (ISARevision >= 12)
 184       Features["vector-enhancements-1"] = true;
 185     if (ISARevision >= 13)
 186       Features["vector-enhancements-2"] = true;
 187     if (ISARevision >= 14)
 188       Features["nnp-assist"] = true;
 189     return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 190   }
 191
 192   bool handleTargetFeatures(std::vector<std::string> &Features,
 193                             DiagnosticsEngine &Diags) override {
 194     HasTransactionalExecution = false;
 195     HasVector = false;
 196     SoftFloat = false;
 197     UnalignedSymbols = false;
 198     for (const auto &Feature : Features) {
 199       if (Feature == "+transactional-execution")
 200         HasTransactionalExecution = true;
 201       else if (Feature == "+vector")
 202         HasVector = true;
 203       else if (Feature == "+soft-float")
 204         SoftFloat = true;
 205       else if (Feature == "+unaligned-symbols")
 206         UnalignedSymbols = true;
 207     }
 208     HasVector &= !SoftFloat;
 209
 210     // If we use the vector ABI, vector types are 64-bit aligned. The
 211     // DataLayout string is always set to this alignment as it is not a
 212     // requirement that it follows the alignment emitted by the front end. It
 213     // is assumed generally that the Datalayout should reflect only the
 214     // target triple and not any specific feature.
 215     if (HasVector && !getTriple().isOSzOS())
 216       MaxVectorAlign = 64;
 217
 218     return true;
 219   }
 220
 221   bool hasFeature(StringRef Feature) const override;
 222
 223   CallingConvCheckResult checkCallingConvention(CallingConv CC) const override {
 224     switch (CC) {
 225     case CC_C:
 226     case CC_Swift:
 227     case CC_OpenCLKernel:
 228       return CCCR_OK;
 229     case CC_SwiftAsync:
 230       return CCCR_Error;
 231     default:
 232       return CCCR_Warning;
 233     }
 234   }
 235
 236   StringRef getABI() const override {
 237     if (HasVector)
 238       return "vector";
 239     return "";
 240   }
 241
 242   const char *getLongDoubleMangling() const override { return "g"; }
 243
 244   bool hasBitIntType() const override { return true; }
 245
 246   int getEHDataRegisterNumber(unsigned RegNo) const override {
 247     return RegNo < 4 ? 6 + RegNo : -1;
 248   }
 249
 250   std::pair<unsigned, unsigned> hardwareInterferenceSizes() const override {
 251     return std::make_pair(256, 256);
 252   }
 253   uint64_t getPointerWidthV(LangAS AddrSpace) const override {
 254     return (getTriple().isOSzOS() && getTriple().isArch64Bit() &&
 255             getTargetAddressSpace(AddrSpace) == ptr32)
 256                ? 32
 257                : PointerWidth;
 258   }
 259
 260   uint64_t getPointerAlignV(LangAS AddrSpace) const override {
 261     return getPointerWidthV(AddrSpace);
 262   }
 263 };
 264 } // namespace targets
 265 } // namespace clang
 266 #endif // LLVM_CLANG_LIB_BASIC_TARGETS_SYSTEMZ_H