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[libc] Switch to using the generic `<gpuintrin.h>` implementations (#121810)
[llvm-project.git] / clang / lib / Sema / SemaX86.cpp
blob0b4b78c5b15dc52da6ccdeeae29c2dcb88ee7d3a
1 //===------ SemaX86.cpp ---------- X86 target-specific routines -----------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements semantic analysis functions specific to X86.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "clang/Sema/SemaX86.h"
14 #include "clang/Basic/DiagnosticSema.h"
15 #include "clang/Basic/TargetBuiltins.h"
16 #include "clang/Basic/TargetInfo.h"
17 #include "clang/Sema/Attr.h"
18 #include "clang/Sema/ParsedAttr.h"
19 #include "clang/Sema/Sema.h"
20 #include "llvm/ADT/APSInt.h"
21 #include "llvm/TargetParser/Triple.h"
22 #include <bitset>
23
24 namespace clang {
25
26 SemaX86::SemaX86(Sema &S) : SemaBase(S) {}
27
28 // Check if the rounding mode is legal.
29 bool SemaX86::CheckBuiltinRoundingOrSAE(unsigned BuiltinID, CallExpr *TheCall) {
30 // Indicates if this instruction has rounding control or just SAE.
31 bool HasRC = false;
32
33 unsigned ArgNum = 0;
34 switch (BuiltinID) {
35 default:
36 return false;
37 case X86::BI__builtin_ia32_vcvttsd2si32:
38 case X86::BI__builtin_ia32_vcvttsd2si64:
39 case X86::BI__builtin_ia32_vcvttsd2usi32:
40 case X86::BI__builtin_ia32_vcvttsd2usi64:
41 case X86::BI__builtin_ia32_vcvttss2si32:
42 case X86::BI__builtin_ia32_vcvttss2si64:
43 case X86::BI__builtin_ia32_vcvttss2usi32:
44 case X86::BI__builtin_ia32_vcvttss2usi64:
45 case X86::BI__builtin_ia32_vcvttsh2si32:
46 case X86::BI__builtin_ia32_vcvttsh2si64:
47 case X86::BI__builtin_ia32_vcvttsh2usi32:
48 case X86::BI__builtin_ia32_vcvttsh2usi64:
49 case X86::BI__builtin_ia32_vcvttsd2sis32:
50 case X86::BI__builtin_ia32_vcvttsd2usis32:
51 case X86::BI__builtin_ia32_vcvttss2sis32:
52 case X86::BI__builtin_ia32_vcvttss2usis32:
53 case X86::BI__builtin_ia32_vcvttsd2sis64:
54 case X86::BI__builtin_ia32_vcvttsd2usis64:
55 case X86::BI__builtin_ia32_vcvttss2sis64:
56 case X86::BI__builtin_ia32_vcvttss2usis64:
57 ArgNum = 1;
58 break;
59 case X86::BI__builtin_ia32_maxpd512:
60 case X86::BI__builtin_ia32_maxps512:
61 case X86::BI__builtin_ia32_minpd512:
62 case X86::BI__builtin_ia32_minps512:
63 case X86::BI__builtin_ia32_maxph512:
64 case X86::BI__builtin_ia32_minph512:
65 case X86::BI__builtin_ia32_vmaxpd256_round:
66 case X86::BI__builtin_ia32_vmaxps256_round:
67 case X86::BI__builtin_ia32_vminpd256_round:
68 case X86::BI__builtin_ia32_vminps256_round:
69 case X86::BI__builtin_ia32_vmaxph256_round:
70 case X86::BI__builtin_ia32_vminph256_round:
71 ArgNum = 2;
72 break;
73 case X86::BI__builtin_ia32_vcvtph2pd512_mask:
74 case X86::BI__builtin_ia32_vcvtph2psx512_mask:
75 case X86::BI__builtin_ia32_cvtps2pd512_mask:
76 case X86::BI__builtin_ia32_cvttpd2dq512_mask:
77 case X86::BI__builtin_ia32_cvttpd2qq512_mask:
78 case X86::BI__builtin_ia32_cvttpd2udq512_mask:
79 case X86::BI__builtin_ia32_cvttpd2uqq512_mask:
80 case X86::BI__builtin_ia32_cvttps2dq512_mask:
81 case X86::BI__builtin_ia32_cvttps2qq512_mask:
82 case X86::BI__builtin_ia32_cvttps2udq512_mask:
83 case X86::BI__builtin_ia32_cvttps2uqq512_mask:
84 case X86::BI__builtin_ia32_vcvttph2w512_mask:
85 case X86::BI__builtin_ia32_vcvttph2uw512_mask:
86 case X86::BI__builtin_ia32_vcvttph2dq512_mask:
87 case X86::BI__builtin_ia32_vcvttph2udq512_mask:
88 case X86::BI__builtin_ia32_vcvttph2qq512_mask:
89 case X86::BI__builtin_ia32_vcvttph2uqq512_mask:
90 case X86::BI__builtin_ia32_getexppd512_mask:
91 case X86::BI__builtin_ia32_getexpps512_mask:
92 case X86::BI__builtin_ia32_getexpph512_mask:
93 case X86::BI__builtin_ia32_vcomisd:
94 case X86::BI__builtin_ia32_vcomiss:
95 case X86::BI__builtin_ia32_vcomish:
96 case X86::BI__builtin_ia32_vcvtph2ps512_mask:
97 case X86::BI__builtin_ia32_vgetexppd256_round_mask:
98 case X86::BI__builtin_ia32_vgetexpps256_round_mask:
99 case X86::BI__builtin_ia32_vgetexpph256_round_mask:
100 case X86::BI__builtin_ia32_vcvttph2ibs256_mask:
101 case X86::BI__builtin_ia32_vcvttph2iubs256_mask:
102 case X86::BI__builtin_ia32_vcvttps2ibs256_mask:
103 case X86::BI__builtin_ia32_vcvttps2iubs256_mask:
104 case X86::BI__builtin_ia32_vcvttph2ibs512_mask:
105 case X86::BI__builtin_ia32_vcvttph2iubs512_mask:
106 case X86::BI__builtin_ia32_vcvttps2ibs512_mask:
107 case X86::BI__builtin_ia32_vcvttps2iubs512_mask:
108 ArgNum = 3;
109 break;
110 case X86::BI__builtin_ia32_cmppd512_mask:
111 case X86::BI__builtin_ia32_cmpps512_mask:
112 case X86::BI__builtin_ia32_cmpph512_mask:
113 case X86::BI__builtin_ia32_vcmppd256_round_mask:
114 case X86::BI__builtin_ia32_vcmpps256_round_mask:
115 case X86::BI__builtin_ia32_vcmpph256_round_mask:
116 case X86::BI__builtin_ia32_cmpsd_mask:
117 case X86::BI__builtin_ia32_cmpss_mask:
118 case X86::BI__builtin_ia32_cmpsh_mask:
119 case X86::BI__builtin_ia32_vcvtsh2sd_round_mask:
120 case X86::BI__builtin_ia32_vcvtsh2ss_round_mask:
121 case X86::BI__builtin_ia32_cvtss2sd_round_mask:
122 case X86::BI__builtin_ia32_getexpsd128_round_mask:
123 case X86::BI__builtin_ia32_getexpss128_round_mask:
124 case X86::BI__builtin_ia32_getexpsh128_round_mask:
125 case X86::BI__builtin_ia32_getmantpd512_mask:
126 case X86::BI__builtin_ia32_getmantps512_mask:
127 case X86::BI__builtin_ia32_getmantph512_mask:
128 case X86::BI__builtin_ia32_vgetmantpd256_round_mask:
129 case X86::BI__builtin_ia32_vgetmantps256_round_mask:
130 case X86::BI__builtin_ia32_vgetmantph256_round_mask:
131 case X86::BI__builtin_ia32_maxsd_round_mask:
132 case X86::BI__builtin_ia32_maxss_round_mask:
133 case X86::BI__builtin_ia32_maxsh_round_mask:
134 case X86::BI__builtin_ia32_minsd_round_mask:
135 case X86::BI__builtin_ia32_minss_round_mask:
136 case X86::BI__builtin_ia32_minsh_round_mask:
137 case X86::BI__builtin_ia32_reducepd512_mask:
138 case X86::BI__builtin_ia32_reduceps512_mask:
139 case X86::BI__builtin_ia32_reduceph512_mask:
140 case X86::BI__builtin_ia32_rndscalepd_mask:
141 case X86::BI__builtin_ia32_rndscaleps_mask:
142 case X86::BI__builtin_ia32_rndscaleph_mask:
143 case X86::BI__builtin_ia32_vreducepd256_round_mask:
144 case X86::BI__builtin_ia32_vreduceps256_round_mask:
145 case X86::BI__builtin_ia32_vreduceph256_round_mask:
146 case X86::BI__builtin_ia32_vrndscalepd256_round_mask:
147 case X86::BI__builtin_ia32_vrndscaleps256_round_mask:
148 case X86::BI__builtin_ia32_vrndscaleph256_round_mask:
149 ArgNum = 4;
150 break;
151 case X86::BI__builtin_ia32_fixupimmpd512_mask:
152 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
153 case X86::BI__builtin_ia32_fixupimmps512_mask:
154 case X86::BI__builtin_ia32_fixupimmps512_maskz:
155 case X86::BI__builtin_ia32_vfixupimmpd256_round_mask:
156 case X86::BI__builtin_ia32_vfixupimmpd256_round_maskz:
157 case X86::BI__builtin_ia32_vfixupimmps256_round_mask:
158 case X86::BI__builtin_ia32_vfixupimmps256_round_maskz:
159 case X86::BI__builtin_ia32_fixupimmsd_mask:
160 case X86::BI__builtin_ia32_fixupimmsd_maskz:
161 case X86::BI__builtin_ia32_fixupimmss_mask:
162 case X86::BI__builtin_ia32_fixupimmss_maskz:
163 case X86::BI__builtin_ia32_getmantsd_round_mask:
164 case X86::BI__builtin_ia32_getmantss_round_mask:
165 case X86::BI__builtin_ia32_getmantsh_round_mask:
166 case X86::BI__builtin_ia32_rangepd512_mask:
167 case X86::BI__builtin_ia32_rangeps512_mask:
168 case X86::BI__builtin_ia32_vrangepd256_round_mask:
169 case X86::BI__builtin_ia32_vrangeps256_round_mask:
170 case X86::BI__builtin_ia32_rangesd128_round_mask:
171 case X86::BI__builtin_ia32_rangess128_round_mask:
172 case X86::BI__builtin_ia32_reducesd_mask:
173 case X86::BI__builtin_ia32_reducess_mask:
174 case X86::BI__builtin_ia32_reducesh_mask:
175 case X86::BI__builtin_ia32_rndscalesd_round_mask:
176 case X86::BI__builtin_ia32_rndscaless_round_mask:
177 case X86::BI__builtin_ia32_rndscalesh_round_mask:
178 case X86::BI__builtin_ia32_vminmaxpd256_round_mask:
179 case X86::BI__builtin_ia32_vminmaxps256_round_mask:
180 case X86::BI__builtin_ia32_vminmaxph256_round_mask:
181 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
182 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
183 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
184 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
185 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
186 case X86::BI__builtin_ia32_vminmaxss_round_mask:
187 ArgNum = 5;
188 break;
189 case X86::BI__builtin_ia32_vcvtsd2si64:
190 case X86::BI__builtin_ia32_vcvtsd2si32:
191 case X86::BI__builtin_ia32_vcvtsd2usi32:
192 case X86::BI__builtin_ia32_vcvtsd2usi64:
193 case X86::BI__builtin_ia32_vcvtss2si32:
194 case X86::BI__builtin_ia32_vcvtss2si64:
195 case X86::BI__builtin_ia32_vcvtss2usi32:
196 case X86::BI__builtin_ia32_vcvtss2usi64:
197 case X86::BI__builtin_ia32_vcvtsh2si32:
198 case X86::BI__builtin_ia32_vcvtsh2si64:
199 case X86::BI__builtin_ia32_vcvtsh2usi32:
200 case X86::BI__builtin_ia32_vcvtsh2usi64:
201 case X86::BI__builtin_ia32_sqrtpd512:
202 case X86::BI__builtin_ia32_sqrtps512:
203 case X86::BI__builtin_ia32_sqrtph512:
204 case X86::BI__builtin_ia32_vsqrtpd256_round:
205 case X86::BI__builtin_ia32_vsqrtps256_round:
206 case X86::BI__builtin_ia32_vsqrtph256_round:
207 ArgNum = 1;
208 HasRC = true;
209 break;
210 case X86::BI__builtin_ia32_addph512:
211 case X86::BI__builtin_ia32_divph512:
212 case X86::BI__builtin_ia32_mulph512:
213 case X86::BI__builtin_ia32_subph512:
214 case X86::BI__builtin_ia32_addpd512:
215 case X86::BI__builtin_ia32_addps512:
216 case X86::BI__builtin_ia32_divpd512:
217 case X86::BI__builtin_ia32_divps512:
218 case X86::BI__builtin_ia32_mulpd512:
219 case X86::BI__builtin_ia32_mulps512:
220 case X86::BI__builtin_ia32_subpd512:
221 case X86::BI__builtin_ia32_subps512:
222 case X86::BI__builtin_ia32_vaddpd256_round:
223 case X86::BI__builtin_ia32_vaddph256_round:
224 case X86::BI__builtin_ia32_vaddps256_round:
225 case X86::BI__builtin_ia32_vdivpd256_round:
226 case X86::BI__builtin_ia32_vdivph256_round:
227 case X86::BI__builtin_ia32_vdivps256_round:
228 case X86::BI__builtin_ia32_vmulpd256_round:
229 case X86::BI__builtin_ia32_vmulph256_round:
230 case X86::BI__builtin_ia32_vmulps256_round:
231 case X86::BI__builtin_ia32_vsubpd256_round:
232 case X86::BI__builtin_ia32_vsubph256_round:
233 case X86::BI__builtin_ia32_vsubps256_round:
234 case X86::BI__builtin_ia32_cvtsi2sd64:
235 case X86::BI__builtin_ia32_cvtsi2ss32:
236 case X86::BI__builtin_ia32_cvtsi2ss64:
237 case X86::BI__builtin_ia32_cvtusi2sd64:
238 case X86::BI__builtin_ia32_cvtusi2ss32:
239 case X86::BI__builtin_ia32_cvtusi2ss64:
240 case X86::BI__builtin_ia32_vcvtusi2sh:
241 case X86::BI__builtin_ia32_vcvtusi642sh:
242 case X86::BI__builtin_ia32_vcvtsi2sh:
243 case X86::BI__builtin_ia32_vcvtsi642sh:
244 ArgNum = 2;
245 HasRC = true;
246 break;
247 case X86::BI__builtin_ia32_cvtdq2ps512_mask:
248 case X86::BI__builtin_ia32_cvtudq2ps512_mask:
249 case X86::BI__builtin_ia32_vcvtpd2ph512_mask:
250 case X86::BI__builtin_ia32_vcvtps2phx512_mask:
251 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
252 case X86::BI__builtin_ia32_cvtpd2dq512_mask:
253 case X86::BI__builtin_ia32_cvtpd2qq512_mask:
254 case X86::BI__builtin_ia32_cvtpd2udq512_mask:
255 case X86::BI__builtin_ia32_cvtpd2uqq512_mask:
256 case X86::BI__builtin_ia32_cvtps2dq512_mask:
257 case X86::BI__builtin_ia32_cvtps2qq512_mask:
258 case X86::BI__builtin_ia32_cvtps2udq512_mask:
259 case X86::BI__builtin_ia32_cvtps2uqq512_mask:
260 case X86::BI__builtin_ia32_cvtqq2pd512_mask:
261 case X86::BI__builtin_ia32_cvtqq2ps512_mask:
262 case X86::BI__builtin_ia32_cvtuqq2pd512_mask:
263 case X86::BI__builtin_ia32_cvtuqq2ps512_mask:
264 case X86::BI__builtin_ia32_vcvtdq2ph512_mask:
265 case X86::BI__builtin_ia32_vcvtudq2ph512_mask:
266 case X86::BI__builtin_ia32_vcvtw2ph512_mask:
267 case X86::BI__builtin_ia32_vcvtuw2ph512_mask:
268 case X86::BI__builtin_ia32_vcvtph2w512_mask:
269 case X86::BI__builtin_ia32_vcvtph2uw512_mask:
270 case X86::BI__builtin_ia32_vcvtph2dq512_mask:
271 case X86::BI__builtin_ia32_vcvtph2udq512_mask:
272 case X86::BI__builtin_ia32_vcvtph2qq512_mask:
273 case X86::BI__builtin_ia32_vcvtph2uqq512_mask:
274 case X86::BI__builtin_ia32_vcvtqq2ph512_mask:
275 case X86::BI__builtin_ia32_vcvtuqq2ph512_mask:
276 case X86::BI__builtin_ia32_vcvtph2pd256_round_mask:
277 case X86::BI__builtin_ia32_vcvtph2psx256_round_mask:
278 case X86::BI__builtin_ia32_vcvtps2pd256_round_mask:
279 case X86::BI__builtin_ia32_vcvttpd2dq256_round_mask:
280 case X86::BI__builtin_ia32_vcvttpd2qq256_round_mask:
281 case X86::BI__builtin_ia32_vcvttpd2udq256_round_mask:
282 case X86::BI__builtin_ia32_vcvttpd2uqq256_round_mask:
283 case X86::BI__builtin_ia32_vcvttps2dq256_round_mask:
284 case X86::BI__builtin_ia32_vcvttps2qq256_round_mask:
285 case X86::BI__builtin_ia32_vcvttps2udq256_round_mask:
286 case X86::BI__builtin_ia32_vcvttps2uqq256_round_mask:
287 case X86::BI__builtin_ia32_vcvttph2w256_round_mask:
288 case X86::BI__builtin_ia32_vcvttph2uw256_round_mask:
289 case X86::BI__builtin_ia32_vcvttph2dq256_round_mask:
290 case X86::BI__builtin_ia32_vcvttph2udq256_round_mask:
291 case X86::BI__builtin_ia32_vcvttph2qq256_round_mask:
292 case X86::BI__builtin_ia32_vcvttph2uqq256_round_mask:
293 case X86::BI__builtin_ia32_vcvtdq2ps256_round_mask:
294 case X86::BI__builtin_ia32_vcvtudq2ps256_round_mask:
295 case X86::BI__builtin_ia32_vcvtpd2ph256_round_mask:
296 case X86::BI__builtin_ia32_vcvtps2phx256_round_mask:
297 case X86::BI__builtin_ia32_vcvtpd2ps256_round_mask:
298 case X86::BI__builtin_ia32_vcvtpd2dq256_round_mask:
299 case X86::BI__builtin_ia32_vcvtpd2qq256_round_mask:
300 case X86::BI__builtin_ia32_vcvtpd2udq256_round_mask:
301 case X86::BI__builtin_ia32_vcvtpd2uqq256_round_mask:
302 case X86::BI__builtin_ia32_vcvtps2dq256_round_mask:
303 case X86::BI__builtin_ia32_vcvtps2qq256_round_mask:
304 case X86::BI__builtin_ia32_vcvtps2udq256_round_mask:
305 case X86::BI__builtin_ia32_vcvtps2uqq256_round_mask:
306 case X86::BI__builtin_ia32_vcvtqq2pd256_round_mask:
307 case X86::BI__builtin_ia32_vcvtqq2ps256_round_mask:
308 case X86::BI__builtin_ia32_vcvtuqq2pd256_round_mask:
309 case X86::BI__builtin_ia32_vcvtuqq2ps256_round_mask:
310 case X86::BI__builtin_ia32_vcvtdq2ph256_round_mask:
311 case X86::BI__builtin_ia32_vcvtudq2ph256_round_mask:
312 case X86::BI__builtin_ia32_vcvtw2ph256_round_mask:
313 case X86::BI__builtin_ia32_vcvtuw2ph256_round_mask:
314 case X86::BI__builtin_ia32_vcvtph2w256_round_mask:
315 case X86::BI__builtin_ia32_vcvtph2uw256_round_mask:
316 case X86::BI__builtin_ia32_vcvtph2dq256_round_mask:
317 case X86::BI__builtin_ia32_vcvtph2udq256_round_mask:
318 case X86::BI__builtin_ia32_vcvtph2qq256_round_mask:
319 case X86::BI__builtin_ia32_vcvtph2uqq256_round_mask:
320 case X86::BI__builtin_ia32_vcvtqq2ph256_round_mask:
321 case X86::BI__builtin_ia32_vcvtuqq2ph256_round_mask:
322 case X86::BI__builtin_ia32_vcvtph2ibs256_mask:
323 case X86::BI__builtin_ia32_vcvtph2iubs256_mask:
324 case X86::BI__builtin_ia32_vcvtps2ibs256_mask:
325 case X86::BI__builtin_ia32_vcvtps2iubs256_mask:
326 case X86::BI__builtin_ia32_vcvtph2ibs512_mask:
327 case X86::BI__builtin_ia32_vcvtph2iubs512_mask:
328 case X86::BI__builtin_ia32_vcvtps2ibs512_mask:
329 case X86::BI__builtin_ia32_vcvtps2iubs512_mask:
330 ArgNum = 3;
331 HasRC = true;
332 break;
333 case X86::BI__builtin_ia32_addsh_round_mask:
334 case X86::BI__builtin_ia32_addss_round_mask:
335 case X86::BI__builtin_ia32_addsd_round_mask:
336 case X86::BI__builtin_ia32_divsh_round_mask:
337 case X86::BI__builtin_ia32_divss_round_mask:
338 case X86::BI__builtin_ia32_divsd_round_mask:
339 case X86::BI__builtin_ia32_mulsh_round_mask:
340 case X86::BI__builtin_ia32_mulss_round_mask:
341 case X86::BI__builtin_ia32_mulsd_round_mask:
342 case X86::BI__builtin_ia32_subsh_round_mask:
343 case X86::BI__builtin_ia32_subss_round_mask:
344 case X86::BI__builtin_ia32_subsd_round_mask:
345 case X86::BI__builtin_ia32_scalefph512_mask:
346 case X86::BI__builtin_ia32_scalefpd512_mask:
347 case X86::BI__builtin_ia32_scalefps512_mask:
348 case X86::BI__builtin_ia32_vscalefph256_round_mask:
349 case X86::BI__builtin_ia32_vscalefpd256_round_mask:
350 case X86::BI__builtin_ia32_vscalefps256_round_mask:
351 case X86::BI__builtin_ia32_scalefsd_round_mask:
352 case X86::BI__builtin_ia32_scalefss_round_mask:
353 case X86::BI__builtin_ia32_scalefsh_round_mask:
354 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
355 case X86::BI__builtin_ia32_vcvtss2sh_round_mask:
356 case X86::BI__builtin_ia32_vcvtsd2sh_round_mask:
357 case X86::BI__builtin_ia32_sqrtsd_round_mask:
358 case X86::BI__builtin_ia32_sqrtss_round_mask:
359 case X86::BI__builtin_ia32_sqrtsh_round_mask:
360 case X86::BI__builtin_ia32_vfmaddsd3_mask:
361 case X86::BI__builtin_ia32_vfmaddsd3_maskz:
362 case X86::BI__builtin_ia32_vfmaddsd3_mask3:
363 case X86::BI__builtin_ia32_vfmaddss3_mask:
364 case X86::BI__builtin_ia32_vfmaddss3_maskz:
365 case X86::BI__builtin_ia32_vfmaddss3_mask3:
366 case X86::BI__builtin_ia32_vfmaddsh3_mask:
367 case X86::BI__builtin_ia32_vfmaddsh3_maskz:
368 case X86::BI__builtin_ia32_vfmaddsh3_mask3:
369 case X86::BI__builtin_ia32_vfmaddpd512_mask:
370 case X86::BI__builtin_ia32_vfmaddpd512_maskz:
371 case X86::BI__builtin_ia32_vfmaddpd512_mask3:
372 case X86::BI__builtin_ia32_vfmsubpd512_mask3:
373 case X86::BI__builtin_ia32_vfmaddps512_mask:
374 case X86::BI__builtin_ia32_vfmaddps512_maskz:
375 case X86::BI__builtin_ia32_vfmaddps512_mask3:
376 case X86::BI__builtin_ia32_vfmsubps512_mask3:
377 case X86::BI__builtin_ia32_vfmaddph512_mask:
378 case X86::BI__builtin_ia32_vfmaddph512_maskz:
379 case X86::BI__builtin_ia32_vfmaddph512_mask3:
380 case X86::BI__builtin_ia32_vfmsubph512_mask3:
381 case X86::BI__builtin_ia32_vfmaddsubpd512_mask:
382 case X86::BI__builtin_ia32_vfmaddsubpd512_maskz:
383 case X86::BI__builtin_ia32_vfmaddsubpd512_mask3:
384 case X86::BI__builtin_ia32_vfmsubaddpd512_mask3:
385 case X86::BI__builtin_ia32_vfmaddsubps512_mask:
386 case X86::BI__builtin_ia32_vfmaddsubps512_maskz:
387 case X86::BI__builtin_ia32_vfmaddsubps512_mask3:
388 case X86::BI__builtin_ia32_vfmsubaddps512_mask3:
389 case X86::BI__builtin_ia32_vfmaddsubph512_mask:
390 case X86::BI__builtin_ia32_vfmaddsubph512_maskz:
391 case X86::BI__builtin_ia32_vfmaddsubph512_mask3:
392 case X86::BI__builtin_ia32_vfmsubaddph512_mask3:
393 case X86::BI__builtin_ia32_vfmaddpd256_round_mask:
394 case X86::BI__builtin_ia32_vfmaddpd256_round_maskz:
395 case X86::BI__builtin_ia32_vfmaddpd256_round_mask3:
396 case X86::BI__builtin_ia32_vfmsubpd256_round_mask3:
397 case X86::BI__builtin_ia32_vfmaddps256_round_mask:
398 case X86::BI__builtin_ia32_vfmaddps256_round_maskz:
399 case X86::BI__builtin_ia32_vfmaddps256_round_mask3:
400 case X86::BI__builtin_ia32_vfmsubps256_round_mask3:
401 case X86::BI__builtin_ia32_vfmaddph256_round_mask:
402 case X86::BI__builtin_ia32_vfmaddph256_round_maskz:
403 case X86::BI__builtin_ia32_vfmaddph256_round_mask3:
404 case X86::BI__builtin_ia32_vfmsubph256_round_mask3:
405 case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask:
406 case X86::BI__builtin_ia32_vfmaddsubpd256_round_maskz:
407 case X86::BI__builtin_ia32_vfmaddsubpd256_round_mask3:
408 case X86::BI__builtin_ia32_vfmsubaddpd256_round_mask3:
409 case X86::BI__builtin_ia32_vfmaddsubps256_round_mask:
410 case X86::BI__builtin_ia32_vfmaddsubps256_round_maskz:
411 case X86::BI__builtin_ia32_vfmaddsubps256_round_mask3:
412 case X86::BI__builtin_ia32_vfmsubaddps256_round_mask3:
413 case X86::BI__builtin_ia32_vfmaddsubph256_round_mask:
414 case X86::BI__builtin_ia32_vfmaddsubph256_round_maskz:
415 case X86::BI__builtin_ia32_vfmaddsubph256_round_mask3:
416 case X86::BI__builtin_ia32_vfmsubaddph256_round_mask3:
417 case X86::BI__builtin_ia32_vfmaddcph256_round_mask:
418 case X86::BI__builtin_ia32_vfmaddcph256_round_maskz:
419 case X86::BI__builtin_ia32_vfmaddcph256_round_mask3:
420 case X86::BI__builtin_ia32_vfcmaddcph256_round_mask:
421 case X86::BI__builtin_ia32_vfcmaddcph256_round_maskz:
422 case X86::BI__builtin_ia32_vfcmaddcph256_round_mask3:
423 case X86::BI__builtin_ia32_vfmulcph256_round_mask:
424 case X86::BI__builtin_ia32_vfcmulcph256_round_mask:
425 case X86::BI__builtin_ia32_vfmaddcsh_mask:
426 case X86::BI__builtin_ia32_vfmaddcsh_round_mask:
427 case X86::BI__builtin_ia32_vfmaddcsh_round_mask3:
428 case X86::BI__builtin_ia32_vfmaddcph512_mask:
429 case X86::BI__builtin_ia32_vfmaddcph512_maskz:
430 case X86::BI__builtin_ia32_vfmaddcph512_mask3:
431 case X86::BI__builtin_ia32_vfcmaddcsh_mask:
432 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask:
433 case X86::BI__builtin_ia32_vfcmaddcsh_round_mask3:
434 case X86::BI__builtin_ia32_vfcmaddcph512_mask:
435 case X86::BI__builtin_ia32_vfcmaddcph512_maskz:
436 case X86::BI__builtin_ia32_vfcmaddcph512_mask3:
437 case X86::BI__builtin_ia32_vfmulcsh_mask:
438 case X86::BI__builtin_ia32_vfmulcph512_mask:
439 case X86::BI__builtin_ia32_vfcmulcsh_mask:
440 case X86::BI__builtin_ia32_vfcmulcph512_mask:
441 case X86::BI__builtin_ia32_vcvt2ps2phx256_mask:
442 case X86::BI__builtin_ia32_vcvt2ps2phx512_mask:
443 ArgNum = 4;
444 HasRC = true;
445 break;
446 case X86::BI__builtin_ia32_vcvttpd2dqs256_round_mask:
447 case X86::BI__builtin_ia32_vcvttpd2dqs512_round_mask:
448 case X86::BI__builtin_ia32_vcvttpd2udqs256_round_mask:
449 case X86::BI__builtin_ia32_vcvttpd2udqs512_round_mask:
450 case X86::BI__builtin_ia32_vcvttpd2qqs256_round_mask:
451 case X86::BI__builtin_ia32_vcvttpd2qqs512_round_mask:
452 case X86::BI__builtin_ia32_vcvttpd2uqqs256_round_mask:
453 case X86::BI__builtin_ia32_vcvttpd2uqqs512_round_mask:
454 case X86::BI__builtin_ia32_vcvttps2dqs256_round_mask:
455 case X86::BI__builtin_ia32_vcvttps2dqs512_round_mask:
456 case X86::BI__builtin_ia32_vcvttps2udqs256_round_mask:
457 case X86::BI__builtin_ia32_vcvttps2udqs512_round_mask:
458 case X86::BI__builtin_ia32_vcvttps2qqs256_round_mask:
459 case X86::BI__builtin_ia32_vcvttps2qqs512_round_mask:
460 case X86::BI__builtin_ia32_vcvttps2uqqs256_round_mask:
461 case X86::BI__builtin_ia32_vcvttps2uqqs512_round_mask:
462 ArgNum = 3;
463 break;
464 }
465
466 llvm::APSInt Result;
467
468 // We can't check the value of a dependent argument.
469 Expr *Arg = TheCall->getArg(ArgNum);
470 if (Arg->isTypeDependent() || Arg->isValueDependent())
471 return false;
472
473 // Check constant-ness first.
474 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
475 return true;
476
477 // Make sure rounding mode is either ROUND_CUR_DIRECTION or ROUND_NO_EXC bit
478 // is set. If the intrinsic has rounding control(bits 1:0), make sure its only
479 // combined with ROUND_NO_EXC. If the intrinsic does not have rounding
480 // control, allow ROUND_NO_EXC and ROUND_CUR_DIRECTION together.
481 if (Result == 4 /*ROUND_CUR_DIRECTION*/ || Result == 8 /*ROUND_NO_EXC*/ ||
482 (!HasRC && Result == 12 /*ROUND_CUR_DIRECTION|ROUND_NO_EXC*/) ||
483 (HasRC && Result.getZExtValue() >= 8 && Result.getZExtValue() <= 11))
484 return false;
485
486 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_rounding)
487 << Arg->getSourceRange();
488 }
489
490 // Check if the gather/scatter scale is legal.
491 bool SemaX86::CheckBuiltinGatherScatterScale(unsigned BuiltinID,
492 CallExpr *TheCall) {
493 unsigned ArgNum = 0;
494 switch (BuiltinID) {
495 default:
496 return false;
497 case X86::BI__builtin_ia32_gatherd_pd:
498 case X86::BI__builtin_ia32_gatherd_pd256:
499 case X86::BI__builtin_ia32_gatherq_pd:
500 case X86::BI__builtin_ia32_gatherq_pd256:
501 case X86::BI__builtin_ia32_gatherd_ps:
502 case X86::BI__builtin_ia32_gatherd_ps256:
503 case X86::BI__builtin_ia32_gatherq_ps:
504 case X86::BI__builtin_ia32_gatherq_ps256:
505 case X86::BI__builtin_ia32_gatherd_q:
506 case X86::BI__builtin_ia32_gatherd_q256:
507 case X86::BI__builtin_ia32_gatherq_q:
508 case X86::BI__builtin_ia32_gatherq_q256:
509 case X86::BI__builtin_ia32_gatherd_d:
510 case X86::BI__builtin_ia32_gatherd_d256:
511 case X86::BI__builtin_ia32_gatherq_d:
512 case X86::BI__builtin_ia32_gatherq_d256:
513 case X86::BI__builtin_ia32_gather3div2df:
514 case X86::BI__builtin_ia32_gather3div2di:
515 case X86::BI__builtin_ia32_gather3div4df:
516 case X86::BI__builtin_ia32_gather3div4di:
517 case X86::BI__builtin_ia32_gather3div4sf:
518 case X86::BI__builtin_ia32_gather3div4si:
519 case X86::BI__builtin_ia32_gather3div8sf:
520 case X86::BI__builtin_ia32_gather3div8si:
521 case X86::BI__builtin_ia32_gather3siv2df:
522 case X86::BI__builtin_ia32_gather3siv2di:
523 case X86::BI__builtin_ia32_gather3siv4df:
524 case X86::BI__builtin_ia32_gather3siv4di:
525 case X86::BI__builtin_ia32_gather3siv4sf:
526 case X86::BI__builtin_ia32_gather3siv4si:
527 case X86::BI__builtin_ia32_gather3siv8sf:
528 case X86::BI__builtin_ia32_gather3siv8si:
529 case X86::BI__builtin_ia32_gathersiv8df:
530 case X86::BI__builtin_ia32_gathersiv16sf:
531 case X86::BI__builtin_ia32_gatherdiv8df:
532 case X86::BI__builtin_ia32_gatherdiv16sf:
533 case X86::BI__builtin_ia32_gathersiv8di:
534 case X86::BI__builtin_ia32_gathersiv16si:
535 case X86::BI__builtin_ia32_gatherdiv8di:
536 case X86::BI__builtin_ia32_gatherdiv16si:
537 case X86::BI__builtin_ia32_scatterdiv2df:
538 case X86::BI__builtin_ia32_scatterdiv2di:
539 case X86::BI__builtin_ia32_scatterdiv4df:
540 case X86::BI__builtin_ia32_scatterdiv4di:
541 case X86::BI__builtin_ia32_scatterdiv4sf:
542 case X86::BI__builtin_ia32_scatterdiv4si:
543 case X86::BI__builtin_ia32_scatterdiv8sf:
544 case X86::BI__builtin_ia32_scatterdiv8si:
545 case X86::BI__builtin_ia32_scattersiv2df:
546 case X86::BI__builtin_ia32_scattersiv2di:
547 case X86::BI__builtin_ia32_scattersiv4df:
548 case X86::BI__builtin_ia32_scattersiv4di:
549 case X86::BI__builtin_ia32_scattersiv4sf:
550 case X86::BI__builtin_ia32_scattersiv4si:
551 case X86::BI__builtin_ia32_scattersiv8sf:
552 case X86::BI__builtin_ia32_scattersiv8si:
553 case X86::BI__builtin_ia32_scattersiv8df:
554 case X86::BI__builtin_ia32_scattersiv16sf:
555 case X86::BI__builtin_ia32_scatterdiv8df:
556 case X86::BI__builtin_ia32_scatterdiv16sf:
557 case X86::BI__builtin_ia32_scattersiv8di:
558 case X86::BI__builtin_ia32_scattersiv16si:
559 case X86::BI__builtin_ia32_scatterdiv8di:
560 case X86::BI__builtin_ia32_scatterdiv16si:
561 ArgNum = 4;
562 break;
563 }
564
565 llvm::APSInt Result;
566
567 // We can't check the value of a dependent argument.
568 Expr *Arg = TheCall->getArg(ArgNum);
569 if (Arg->isTypeDependent() || Arg->isValueDependent())
570 return false;
571
572 // Check constant-ness first.
573 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
574 return true;
575
576 if (Result == 1 || Result == 2 || Result == 4 || Result == 8)
577 return false;
578
579 return Diag(TheCall->getBeginLoc(), diag::err_x86_builtin_invalid_scale)
580 << Arg->getSourceRange();
581 }
582
583 enum { TileRegLow = 0, TileRegHigh = 7 };
584
585 bool SemaX86::CheckBuiltinTileArgumentsRange(CallExpr *TheCall,
586 ArrayRef<int> ArgNums) {
587 for (int ArgNum : ArgNums) {
588 if (SemaRef.BuiltinConstantArgRange(TheCall, ArgNum, TileRegLow,
589 TileRegHigh))
590 return true;
591 }
592 return false;
593 }
594
595 bool SemaX86::CheckBuiltinTileDuplicate(CallExpr *TheCall,
596 ArrayRef<int> ArgNums) {
597 // Because the max number of tile register is TileRegHigh + 1, so here we use
598 // each bit to represent the usage of them in bitset.
599 std::bitset<TileRegHigh + 1> ArgValues;
600 for (int ArgNum : ArgNums) {
601 Expr *Arg = TheCall->getArg(ArgNum);
602 if (Arg->isTypeDependent() || Arg->isValueDependent())
603 continue;
604
605 llvm::APSInt Result;
606 if (SemaRef.BuiltinConstantArg(TheCall, ArgNum, Result))
607 return true;
608 int ArgExtValue = Result.getExtValue();
609 assert((ArgExtValue >= TileRegLow && ArgExtValue <= TileRegHigh) &&
610 "Incorrect tile register num.");
611 if (ArgValues.test(ArgExtValue))
612 return Diag(TheCall->getBeginLoc(),
613 diag::err_x86_builtin_tile_arg_duplicate)
614 << TheCall->getArg(ArgNum)->getSourceRange();
615 ArgValues.set(ArgExtValue);
616 }
617 return false;
618 }
619
620 bool SemaX86::CheckBuiltinTileRangeAndDuplicate(CallExpr *TheCall,
621 ArrayRef<int> ArgNums) {
622 return CheckBuiltinTileArgumentsRange(TheCall, ArgNums) ||
623 CheckBuiltinTileDuplicate(TheCall, ArgNums);
624 }
625
626 bool SemaX86::CheckBuiltinTileArguments(unsigned BuiltinID, CallExpr *TheCall) {
627 switch (BuiltinID) {
628 default:
629 return false;
630 case X86::BI__builtin_ia32_tileloadd64:
631 case X86::BI__builtin_ia32_tileloaddt164:
632 case X86::BI__builtin_ia32_tileloaddrs64:
633 case X86::BI__builtin_ia32_tileloaddrst164:
634 case X86::BI__builtin_ia32_tilestored64:
635 case X86::BI__builtin_ia32_tilezero:
636 case X86::BI__builtin_ia32_t2rpntlvwz0:
637 case X86::BI__builtin_ia32_t2rpntlvwz0t1:
638 case X86::BI__builtin_ia32_t2rpntlvwz1:
639 case X86::BI__builtin_ia32_t2rpntlvwz1t1:
640 case X86::BI__builtin_ia32_t2rpntlvwz0rst1:
641 case X86::BI__builtin_ia32_t2rpntlvwz1rs:
642 case X86::BI__builtin_ia32_t2rpntlvwz1rst1:
643 case X86::BI__builtin_ia32_t2rpntlvwz0rs:
644 case X86::BI__builtin_ia32_tcvtrowps2pbf16h:
645 case X86::BI__builtin_ia32_tcvtrowps2pbf16l:
646 case X86::BI__builtin_ia32_tcvtrowps2phh:
647 case X86::BI__builtin_ia32_tcvtrowps2phl:
648 case X86::BI__builtin_ia32_tcvtrowd2ps:
649 case X86::BI__builtin_ia32_tilemovrow:
650 return CheckBuiltinTileArgumentsRange(TheCall, 0);
651 case X86::BI__builtin_ia32_tdpbssd:
652 case X86::BI__builtin_ia32_tdpbsud:
653 case X86::BI__builtin_ia32_tdpbusd:
654 case X86::BI__builtin_ia32_tdpbuud:
655 case X86::BI__builtin_ia32_tdpbf16ps:
656 case X86::BI__builtin_ia32_tdpfp16ps:
657 case X86::BI__builtin_ia32_tcmmimfp16ps:
658 case X86::BI__builtin_ia32_tcmmrlfp16ps:
659 case X86::BI__builtin_ia32_tdpbf8ps:
660 case X86::BI__builtin_ia32_tdpbhf8ps:
661 case X86::BI__builtin_ia32_tdphbf8ps:
662 case X86::BI__builtin_ia32_tdphf8ps:
663 case X86::BI__builtin_ia32_ttdpbf16ps:
664 case X86::BI__builtin_ia32_ttdpfp16ps:
665 case X86::BI__builtin_ia32_ttcmmimfp16ps:
666 case X86::BI__builtin_ia32_ttcmmrlfp16ps:
667 case X86::BI__builtin_ia32_tconjtcmmimfp16ps:
668 case X86::BI__builtin_ia32_tmmultf32ps:
669 case X86::BI__builtin_ia32_ttmmultf32ps:
670 return CheckBuiltinTileRangeAndDuplicate(TheCall, {0, 1, 2});
671 case X86::BI__builtin_ia32_ttransposed:
672 case X86::BI__builtin_ia32_tconjtfp16:
673 return CheckBuiltinTileArgumentsRange(TheCall, {0, 1});
674 }
675 }
676 static bool isX86_32Builtin(unsigned BuiltinID) {
677 // These builtins only work on x86-32 targets.
678 switch (BuiltinID) {
679 case X86::BI__builtin_ia32_readeflags_u32:
680 case X86::BI__builtin_ia32_writeeflags_u32:
681 return true;
682 }
683
684 return false;
685 }
686
687 bool SemaX86::CheckBuiltinFunctionCall(const TargetInfo &TI, unsigned BuiltinID,
688 CallExpr *TheCall) {
689 // Check for 32-bit only builtins on a 64-bit target.
690 const llvm::Triple &TT = TI.getTriple();
691 if (TT.getArch() != llvm::Triple::x86 && isX86_32Builtin(BuiltinID))
692 return Diag(TheCall->getCallee()->getBeginLoc(),
693 diag::err_32_bit_builtin_64_bit_tgt);
694
695 // If the intrinsic has rounding or SAE make sure its valid.
696 if (CheckBuiltinRoundingOrSAE(BuiltinID, TheCall))
697 return true;
698
699 // If the intrinsic has a gather/scatter scale immediate make sure its valid.
700 if (CheckBuiltinGatherScatterScale(BuiltinID, TheCall))
701 return true;
702
703 // If the intrinsic has a tile arguments, make sure they are valid.
704 if (CheckBuiltinTileArguments(BuiltinID, TheCall))
705 return true;
706
707 // For intrinsics which take an immediate value as part of the instruction,
708 // range check them here.
709 int i = 0, l = 0, u = 0;
710 switch (BuiltinID) {
711 default:
712 return false;
713 case X86::BI__builtin_ia32_vec_ext_v2di:
714 case X86::BI__builtin_ia32_vextractf128_pd256:
715 case X86::BI__builtin_ia32_vextractf128_ps256:
716 case X86::BI__builtin_ia32_vextractf128_si256:
717 case X86::BI__builtin_ia32_extract128i256:
718 case X86::BI__builtin_ia32_extractf64x4_mask:
719 case X86::BI__builtin_ia32_extracti64x4_mask:
720 case X86::BI__builtin_ia32_extractf32x8_mask:
721 case X86::BI__builtin_ia32_extracti32x8_mask:
722 case X86::BI__builtin_ia32_extractf64x2_256_mask:
723 case X86::BI__builtin_ia32_extracti64x2_256_mask:
724 case X86::BI__builtin_ia32_extractf32x4_256_mask:
725 case X86::BI__builtin_ia32_extracti32x4_256_mask:
726 i = 1;
727 l = 0;
728 u = 1;
729 break;
730 case X86::BI__builtin_ia32_vec_set_v2di:
731 case X86::BI__builtin_ia32_vinsertf128_pd256:
732 case X86::BI__builtin_ia32_vinsertf128_ps256:
733 case X86::BI__builtin_ia32_vinsertf128_si256:
734 case X86::BI__builtin_ia32_insert128i256:
735 case X86::BI__builtin_ia32_insertf32x8:
736 case X86::BI__builtin_ia32_inserti32x8:
737 case X86::BI__builtin_ia32_insertf64x4:
738 case X86::BI__builtin_ia32_inserti64x4:
739 case X86::BI__builtin_ia32_insertf64x2_256:
740 case X86::BI__builtin_ia32_inserti64x2_256:
741 case X86::BI__builtin_ia32_insertf32x4_256:
742 case X86::BI__builtin_ia32_inserti32x4_256:
743 i = 2;
744 l = 0;
745 u = 1;
746 break;
747 case X86::BI__builtin_ia32_vpermilpd:
748 case X86::BI__builtin_ia32_vec_ext_v4hi:
749 case X86::BI__builtin_ia32_vec_ext_v4si:
750 case X86::BI__builtin_ia32_vec_ext_v4sf:
751 case X86::BI__builtin_ia32_vec_ext_v4di:
752 case X86::BI__builtin_ia32_extractf32x4_mask:
753 case X86::BI__builtin_ia32_extracti32x4_mask:
754 case X86::BI__builtin_ia32_extractf64x2_512_mask:
755 case X86::BI__builtin_ia32_extracti64x2_512_mask:
756 i = 1;
757 l = 0;
758 u = 3;
759 break;
760 case X86::BI_mm_prefetch:
761 case X86::BI__builtin_ia32_vec_ext_v8hi:
762 case X86::BI__builtin_ia32_vec_ext_v8si:
763 i = 1;
764 l = 0;
765 u = 7;
766 break;
767 case X86::BI__builtin_ia32_sha1rnds4:
768 case X86::BI__builtin_ia32_blendpd:
769 case X86::BI__builtin_ia32_shufpd:
770 case X86::BI__builtin_ia32_vec_set_v4hi:
771 case X86::BI__builtin_ia32_vec_set_v4si:
772 case X86::BI__builtin_ia32_vec_set_v4di:
773 case X86::BI__builtin_ia32_shuf_f32x4_256:
774 case X86::BI__builtin_ia32_shuf_f64x2_256:
775 case X86::BI__builtin_ia32_shuf_i32x4_256:
776 case X86::BI__builtin_ia32_shuf_i64x2_256:
777 case X86::BI__builtin_ia32_insertf64x2_512:
778 case X86::BI__builtin_ia32_inserti64x2_512:
779 case X86::BI__builtin_ia32_insertf32x4:
780 case X86::BI__builtin_ia32_inserti32x4:
781 i = 2;
782 l = 0;
783 u = 3;
784 break;
785 case X86::BI__builtin_ia32_vpermil2pd:
786 case X86::BI__builtin_ia32_vpermil2pd256:
787 case X86::BI__builtin_ia32_vpermil2ps:
788 case X86::BI__builtin_ia32_vpermil2ps256:
789 i = 3;
790 l = 0;
791 u = 3;
792 break;
793 case X86::BI__builtin_ia32_cmpb128_mask:
794 case X86::BI__builtin_ia32_cmpw128_mask:
795 case X86::BI__builtin_ia32_cmpd128_mask:
796 case X86::BI__builtin_ia32_cmpq128_mask:
797 case X86::BI__builtin_ia32_cmpb256_mask:
798 case X86::BI__builtin_ia32_cmpw256_mask:
799 case X86::BI__builtin_ia32_cmpd256_mask:
800 case X86::BI__builtin_ia32_cmpq256_mask:
801 case X86::BI__builtin_ia32_cmpb512_mask:
802 case X86::BI__builtin_ia32_cmpw512_mask:
803 case X86::BI__builtin_ia32_cmpd512_mask:
804 case X86::BI__builtin_ia32_cmpq512_mask:
805 case X86::BI__builtin_ia32_ucmpb128_mask:
806 case X86::BI__builtin_ia32_ucmpw128_mask:
807 case X86::BI__builtin_ia32_ucmpd128_mask:
808 case X86::BI__builtin_ia32_ucmpq128_mask:
809 case X86::BI__builtin_ia32_ucmpb256_mask:
810 case X86::BI__builtin_ia32_ucmpw256_mask:
811 case X86::BI__builtin_ia32_ucmpd256_mask:
812 case X86::BI__builtin_ia32_ucmpq256_mask:
813 case X86::BI__builtin_ia32_ucmpb512_mask:
814 case X86::BI__builtin_ia32_ucmpw512_mask:
815 case X86::BI__builtin_ia32_ucmpd512_mask:
816 case X86::BI__builtin_ia32_ucmpq512_mask:
817 case X86::BI__builtin_ia32_vpcomub:
818 case X86::BI__builtin_ia32_vpcomuw:
819 case X86::BI__builtin_ia32_vpcomud:
820 case X86::BI__builtin_ia32_vpcomuq:
821 case X86::BI__builtin_ia32_vpcomb:
822 case X86::BI__builtin_ia32_vpcomw:
823 case X86::BI__builtin_ia32_vpcomd:
824 case X86::BI__builtin_ia32_vpcomq:
825 case X86::BI__builtin_ia32_vec_set_v8hi:
826 case X86::BI__builtin_ia32_vec_set_v8si:
827 i = 2;
828 l = 0;
829 u = 7;
830 break;
831 case X86::BI__builtin_ia32_vpermilpd256:
832 case X86::BI__builtin_ia32_roundps:
833 case X86::BI__builtin_ia32_roundpd:
834 case X86::BI__builtin_ia32_roundps256:
835 case X86::BI__builtin_ia32_roundpd256:
836 case X86::BI__builtin_ia32_getmantpd128_mask:
837 case X86::BI__builtin_ia32_getmantpd256_mask:
838 case X86::BI__builtin_ia32_getmantps128_mask:
839 case X86::BI__builtin_ia32_getmantps256_mask:
840 case X86::BI__builtin_ia32_getmantpd512_mask:
841 case X86::BI__builtin_ia32_getmantps512_mask:
842 case X86::BI__builtin_ia32_getmantph128_mask:
843 case X86::BI__builtin_ia32_getmantph256_mask:
844 case X86::BI__builtin_ia32_getmantph512_mask:
845 case X86::BI__builtin_ia32_vgetmantpd256_round_mask:
846 case X86::BI__builtin_ia32_vgetmantps256_round_mask:
847 case X86::BI__builtin_ia32_vgetmantph256_round_mask:
848 case X86::BI__builtin_ia32_vec_ext_v16qi:
849 case X86::BI__builtin_ia32_vec_ext_v16hi:
850 i = 1;
851 l = 0;
852 u = 15;
853 break;
854 case X86::BI__builtin_ia32_pblendd128:
855 case X86::BI__builtin_ia32_blendps:
856 case X86::BI__builtin_ia32_blendpd256:
857 case X86::BI__builtin_ia32_shufpd256:
858 case X86::BI__builtin_ia32_roundss:
859 case X86::BI__builtin_ia32_roundsd:
860 case X86::BI__builtin_ia32_rangepd128_mask:
861 case X86::BI__builtin_ia32_rangepd256_mask:
862 case X86::BI__builtin_ia32_rangepd512_mask:
863 case X86::BI__builtin_ia32_rangeps128_mask:
864 case X86::BI__builtin_ia32_rangeps256_mask:
865 case X86::BI__builtin_ia32_rangeps512_mask:
866 case X86::BI__builtin_ia32_vrangepd256_round_mask:
867 case X86::BI__builtin_ia32_vrangeps256_round_mask:
868 case X86::BI__builtin_ia32_getmantsd_round_mask:
869 case X86::BI__builtin_ia32_getmantss_round_mask:
870 case X86::BI__builtin_ia32_getmantsh_round_mask:
871 case X86::BI__builtin_ia32_vec_set_v16qi:
872 case X86::BI__builtin_ia32_vec_set_v16hi:
873 i = 2;
874 l = 0;
875 u = 15;
876 break;
877 case X86::BI__builtin_ia32_vec_ext_v32qi:
878 i = 1;
879 l = 0;
880 u = 31;
881 break;
882 case X86::BI__builtin_ia32_cmpps:
883 case X86::BI__builtin_ia32_cmpss:
884 case X86::BI__builtin_ia32_cmppd:
885 case X86::BI__builtin_ia32_cmpsd:
886 case X86::BI__builtin_ia32_cmpps256:
887 case X86::BI__builtin_ia32_cmppd256:
888 case X86::BI__builtin_ia32_cmpps128_mask:
889 case X86::BI__builtin_ia32_cmppd128_mask:
890 case X86::BI__builtin_ia32_cmpps256_mask:
891 case X86::BI__builtin_ia32_cmppd256_mask:
892 case X86::BI__builtin_ia32_cmpps512_mask:
893 case X86::BI__builtin_ia32_cmppd512_mask:
894 case X86::BI__builtin_ia32_cmpph512_mask:
895 case X86::BI__builtin_ia32_vcmppd256_round_mask:
896 case X86::BI__builtin_ia32_vcmpps256_round_mask:
897 case X86::BI__builtin_ia32_vcmpph256_round_mask:
898 case X86::BI__builtin_ia32_cmpsd_mask:
899 case X86::BI__builtin_ia32_cmpss_mask:
900 case X86::BI__builtin_ia32_vec_set_v32qi:
901 i = 2;
902 l = 0;
903 u = 31;
904 break;
905 case X86::BI__builtin_ia32_permdf256:
906 case X86::BI__builtin_ia32_permdi256:
907 case X86::BI__builtin_ia32_permdf512:
908 case X86::BI__builtin_ia32_permdi512:
909 case X86::BI__builtin_ia32_vpermilps:
910 case X86::BI__builtin_ia32_vpermilps256:
911 case X86::BI__builtin_ia32_vpermilpd512:
912 case X86::BI__builtin_ia32_vpermilps512:
913 case X86::BI__builtin_ia32_pshufd:
914 case X86::BI__builtin_ia32_pshufd256:
915 case X86::BI__builtin_ia32_pshufd512:
916 case X86::BI__builtin_ia32_pshufhw:
917 case X86::BI__builtin_ia32_pshufhw256:
918 case X86::BI__builtin_ia32_pshufhw512:
919 case X86::BI__builtin_ia32_pshuflw:
920 case X86::BI__builtin_ia32_pshuflw256:
921 case X86::BI__builtin_ia32_pshuflw512:
922 case X86::BI__builtin_ia32_vcvtps2ph:
923 case X86::BI__builtin_ia32_vcvtps2ph_mask:
924 case X86::BI__builtin_ia32_vcvtps2ph256:
925 case X86::BI__builtin_ia32_vcvtps2ph256_mask:
926 case X86::BI__builtin_ia32_vcvtps2ph512_mask:
927 case X86::BI__builtin_ia32_rndscaleps_128_mask:
928 case X86::BI__builtin_ia32_rndscalepd_128_mask:
929 case X86::BI__builtin_ia32_rndscaleps_256_mask:
930 case X86::BI__builtin_ia32_rndscalepd_256_mask:
931 case X86::BI__builtin_ia32_rndscaleps_mask:
932 case X86::BI__builtin_ia32_rndscalepd_mask:
933 case X86::BI__builtin_ia32_rndscaleph_mask:
934 case X86::BI__builtin_ia32_vrndscalenepbf16_128_mask:
935 case X86::BI__builtin_ia32_vrndscalenepbf16_256_mask:
936 case X86::BI__builtin_ia32_vrndscalenepbf16_mask:
937 case X86::BI__builtin_ia32_reducepd128_mask:
938 case X86::BI__builtin_ia32_reducepd256_mask:
939 case X86::BI__builtin_ia32_reducepd512_mask:
940 case X86::BI__builtin_ia32_reduceps128_mask:
941 case X86::BI__builtin_ia32_reduceps256_mask:
942 case X86::BI__builtin_ia32_reduceps512_mask:
943 case X86::BI__builtin_ia32_reduceph128_mask:
944 case X86::BI__builtin_ia32_reduceph256_mask:
945 case X86::BI__builtin_ia32_reduceph512_mask:
946 case X86::BI__builtin_ia32_vreducenepbf16128_mask:
947 case X86::BI__builtin_ia32_vreducenepbf16256_mask:
948 case X86::BI__builtin_ia32_vreducenepbf16512_mask:
949 case X86::BI__builtin_ia32_vreducepd256_round_mask:
950 case X86::BI__builtin_ia32_vreduceps256_round_mask:
951 case X86::BI__builtin_ia32_vreduceph256_round_mask:
952 case X86::BI__builtin_ia32_vrndscalepd256_round_mask:
953 case X86::BI__builtin_ia32_vrndscaleps256_round_mask:
954 case X86::BI__builtin_ia32_vrndscaleph256_round_mask:
955 case X86::BI__builtin_ia32_prold512:
956 case X86::BI__builtin_ia32_prolq512:
957 case X86::BI__builtin_ia32_prold128:
958 case X86::BI__builtin_ia32_prold256:
959 case X86::BI__builtin_ia32_prolq128:
960 case X86::BI__builtin_ia32_prolq256:
961 case X86::BI__builtin_ia32_prord512:
962 case X86::BI__builtin_ia32_prorq512:
963 case X86::BI__builtin_ia32_prord128:
964 case X86::BI__builtin_ia32_prord256:
965 case X86::BI__builtin_ia32_prorq128:
966 case X86::BI__builtin_ia32_prorq256:
967 case X86::BI__builtin_ia32_fpclasspd128_mask:
968 case X86::BI__builtin_ia32_fpclasspd256_mask:
969 case X86::BI__builtin_ia32_fpclassps128_mask:
970 case X86::BI__builtin_ia32_fpclassps256_mask:
971 case X86::BI__builtin_ia32_fpclassps512_mask:
972 case X86::BI__builtin_ia32_fpclasspd512_mask:
973 case X86::BI__builtin_ia32_fpclassph128_mask:
974 case X86::BI__builtin_ia32_fpclassph256_mask:
975 case X86::BI__builtin_ia32_fpclassph512_mask:
976 case X86::BI__builtin_ia32_vfpclasspbf16128_mask:
977 case X86::BI__builtin_ia32_vfpclasspbf16256_mask:
978 case X86::BI__builtin_ia32_vfpclasspbf16512_mask:
979 case X86::BI__builtin_ia32_fpclasssd_mask:
980 case X86::BI__builtin_ia32_fpclassss_mask:
981 case X86::BI__builtin_ia32_fpclasssh_mask:
982 case X86::BI__builtin_ia32_pslldqi128_byteshift:
983 case X86::BI__builtin_ia32_pslldqi256_byteshift:
984 case X86::BI__builtin_ia32_pslldqi512_byteshift:
985 case X86::BI__builtin_ia32_psrldqi128_byteshift:
986 case X86::BI__builtin_ia32_psrldqi256_byteshift:
987 case X86::BI__builtin_ia32_psrldqi512_byteshift:
988 case X86::BI__builtin_ia32_kshiftliqi:
989 case X86::BI__builtin_ia32_kshiftlihi:
990 case X86::BI__builtin_ia32_kshiftlisi:
991 case X86::BI__builtin_ia32_kshiftlidi:
992 case X86::BI__builtin_ia32_kshiftriqi:
993 case X86::BI__builtin_ia32_kshiftrihi:
994 case X86::BI__builtin_ia32_kshiftrisi:
995 case X86::BI__builtin_ia32_kshiftridi:
996 i = 1;
997 l = 0;
998 u = 255;
999 break;
1000 case X86::BI__builtin_ia32_vperm2f128_pd256:
1001 case X86::BI__builtin_ia32_vperm2f128_ps256:
1002 case X86::BI__builtin_ia32_vperm2f128_si256:
1003 case X86::BI__builtin_ia32_permti256:
1004 case X86::BI__builtin_ia32_pblendw128:
1005 case X86::BI__builtin_ia32_pblendw256:
1006 case X86::BI__builtin_ia32_blendps256:
1007 case X86::BI__builtin_ia32_pblendd256:
1008 case X86::BI__builtin_ia32_palignr128:
1009 case X86::BI__builtin_ia32_palignr256:
1010 case X86::BI__builtin_ia32_palignr512:
1011 case X86::BI__builtin_ia32_alignq512:
1012 case X86::BI__builtin_ia32_alignd512:
1013 case X86::BI__builtin_ia32_alignd128:
1014 case X86::BI__builtin_ia32_alignd256:
1015 case X86::BI__builtin_ia32_alignq128:
1016 case X86::BI__builtin_ia32_alignq256:
1017 case X86::BI__builtin_ia32_vcomisd:
1018 case X86::BI__builtin_ia32_vcomiss:
1019 case X86::BI__builtin_ia32_shuf_f32x4:
1020 case X86::BI__builtin_ia32_shuf_f64x2:
1021 case X86::BI__builtin_ia32_shuf_i32x4:
1022 case X86::BI__builtin_ia32_shuf_i64x2:
1023 case X86::BI__builtin_ia32_shufpd512:
1024 case X86::BI__builtin_ia32_shufps:
1025 case X86::BI__builtin_ia32_shufps256:
1026 case X86::BI__builtin_ia32_shufps512:
1027 case X86::BI__builtin_ia32_dbpsadbw128:
1028 case X86::BI__builtin_ia32_dbpsadbw256:
1029 case X86::BI__builtin_ia32_dbpsadbw512:
1030 case X86::BI__builtin_ia32_vpshldd128:
1031 case X86::BI__builtin_ia32_vpshldd256:
1032 case X86::BI__builtin_ia32_vpshldd512:
1033 case X86::BI__builtin_ia32_vpshldq128:
1034 case X86::BI__builtin_ia32_vpshldq256:
1035 case X86::BI__builtin_ia32_vpshldq512:
1036 case X86::BI__builtin_ia32_vpshldw128:
1037 case X86::BI__builtin_ia32_vpshldw256:
1038 case X86::BI__builtin_ia32_vpshldw512:
1039 case X86::BI__builtin_ia32_vpshrdd128:
1040 case X86::BI__builtin_ia32_vpshrdd256:
1041 case X86::BI__builtin_ia32_vpshrdd512:
1042 case X86::BI__builtin_ia32_vpshrdq128:
1043 case X86::BI__builtin_ia32_vpshrdq256:
1044 case X86::BI__builtin_ia32_vpshrdq512:
1045 case X86::BI__builtin_ia32_vpshrdw128:
1046 case X86::BI__builtin_ia32_vpshrdw256:
1047 case X86::BI__builtin_ia32_vpshrdw512:
1048 case X86::BI__builtin_ia32_vminmaxnepbf16128:
1049 case X86::BI__builtin_ia32_vminmaxnepbf16256:
1050 case X86::BI__builtin_ia32_vminmaxnepbf16512:
1051 case X86::BI__builtin_ia32_vminmaxpd128_mask:
1052 case X86::BI__builtin_ia32_vminmaxpd256_round_mask:
1053 case X86::BI__builtin_ia32_vminmaxph128_mask:
1054 case X86::BI__builtin_ia32_vminmaxph256_round_mask:
1055 case X86::BI__builtin_ia32_vminmaxps128_mask:
1056 case X86::BI__builtin_ia32_vminmaxps256_round_mask:
1057 case X86::BI__builtin_ia32_vminmaxpd512_round_mask:
1058 case X86::BI__builtin_ia32_vminmaxps512_round_mask:
1059 case X86::BI__builtin_ia32_vminmaxph512_round_mask:
1060 case X86::BI__builtin_ia32_vminmaxsd_round_mask:
1061 case X86::BI__builtin_ia32_vminmaxsh_round_mask:
1062 case X86::BI__builtin_ia32_vminmaxss_round_mask:
1063 i = 2;
1064 l = 0;
1065 u = 255;
1066 break;
1067 case X86::BI__builtin_ia32_fixupimmpd512_mask:
1068 case X86::BI__builtin_ia32_fixupimmpd512_maskz:
1069 case X86::BI__builtin_ia32_fixupimmps512_mask:
1070 case X86::BI__builtin_ia32_fixupimmps512_maskz:
1071 case X86::BI__builtin_ia32_fixupimmsd_mask:
1072 case X86::BI__builtin_ia32_fixupimmsd_maskz:
1073 case X86::BI__builtin_ia32_fixupimmss_mask:
1074 case X86::BI__builtin_ia32_fixupimmss_maskz:
1075 case X86::BI__builtin_ia32_fixupimmpd128_mask:
1076 case X86::BI__builtin_ia32_fixupimmpd128_maskz:
1077 case X86::BI__builtin_ia32_fixupimmpd256_mask:
1078 case X86::BI__builtin_ia32_fixupimmpd256_maskz:
1079 case X86::BI__builtin_ia32_fixupimmps128_mask:
1080 case X86::BI__builtin_ia32_fixupimmps128_maskz:
1081 case X86::BI__builtin_ia32_fixupimmps256_mask:
1082 case X86::BI__builtin_ia32_fixupimmps256_maskz:
1083 case X86::BI__builtin_ia32_pternlogd512_mask:
1084 case X86::BI__builtin_ia32_pternlogd512_maskz:
1085 case X86::BI__builtin_ia32_pternlogq512_mask:
1086 case X86::BI__builtin_ia32_pternlogq512_maskz:
1087 case X86::BI__builtin_ia32_pternlogd128_mask:
1088 case X86::BI__builtin_ia32_pternlogd128_maskz:
1089 case X86::BI__builtin_ia32_pternlogd256_mask:
1090 case X86::BI__builtin_ia32_pternlogd256_maskz:
1091 case X86::BI__builtin_ia32_pternlogq128_mask:
1092 case X86::BI__builtin_ia32_pternlogq128_maskz:
1093 case X86::BI__builtin_ia32_pternlogq256_mask:
1094 case X86::BI__builtin_ia32_pternlogq256_maskz:
1095 case X86::BI__builtin_ia32_vsm3rnds2:
1096 i = 3;
1097 l = 0;
1098 u = 255;
1099 break;
1100 case X86::BI__builtin_ia32_reducesd_mask:
1101 case X86::BI__builtin_ia32_reducess_mask:
1102 case X86::BI__builtin_ia32_rndscalesd_round_mask:
1103 case X86::BI__builtin_ia32_rndscaless_round_mask:
1104 case X86::BI__builtin_ia32_rndscalesh_round_mask:
1105 case X86::BI__builtin_ia32_reducesh_mask:
1106 i = 4;
1107 l = 0;
1108 u = 255;
1109 break;
1110 case X86::BI__builtin_ia32_cmpccxadd32:
1111 case X86::BI__builtin_ia32_cmpccxadd64:
1112 i = 3;
1113 l = 0;
1114 u = 15;
1115 break;
1116 }
1117
1118 // Note that we don't force a hard error on the range check here, allowing
1119 // template-generated or macro-generated dead code to potentially have out-of-
1120 // range values. These need to code generate, but don't need to necessarily
1121 // make any sense. We use a warning that defaults to an error.
1122 return SemaRef.BuiltinConstantArgRange(TheCall, i, l, u,
1123 /*RangeIsError*/ false);
1124 }
1125
1126 void SemaX86::handleAnyInterruptAttr(Decl *D, const ParsedAttr &AL) {
1127 // Semantic checks for a function with the 'interrupt' attribute.
1128 // a) Must be a function.
1129 // b) Must have the 'void' return type.
1130 // c) Must take 1 or 2 arguments.
1131 // d) The 1st argument must be a pointer.
1132 // e) The 2nd argument (if any) must be an unsigned integer.
1133 ASTContext &Context = getASTContext();
1134
1135 if (!isFuncOrMethodForAttrSubject(D) || !hasFunctionProto(D) ||
1136 isInstanceMethod(D) ||
1137 CXXMethodDecl::isStaticOverloadedOperator(
1138 cast<NamedDecl>(D)->getDeclName().getCXXOverloadedOperator())) {
1139 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1140 << AL << AL.isRegularKeywordAttribute()
1141 << ExpectedFunctionWithProtoType;
1142 return;
1143 }
1144 // Interrupt handler must have void return type.
1145 if (!getFunctionOrMethodResultType(D)->isVoidType()) {
1146 Diag(getFunctionOrMethodResultSourceRange(D).getBegin(),
1147 diag::err_anyx86_interrupt_attribute)
1148 << (SemaRef.Context.getTargetInfo().getTriple().getArch() ==
1149 llvm::Triple::x86
1150 ? 0
1151 : 1)
1152 << 0;
1153 return;
1154 }
1155 // Interrupt handler must have 1 or 2 parameters.
1156 unsigned NumParams = getFunctionOrMethodNumParams(D);
1157 if (NumParams < 1 || NumParams > 2) {
1158 Diag(D->getBeginLoc(), diag::err_anyx86_interrupt_attribute)
1159 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1160 ? 0
1161 : 1)
1162 << 1;
1163 return;
1164 }
1165 // The first argument must be a pointer.
1166 if (!getFunctionOrMethodParamType(D, 0)->isPointerType()) {
1167 Diag(getFunctionOrMethodParamRange(D, 0).getBegin(),
1168 diag::err_anyx86_interrupt_attribute)
1169 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1170 ? 0
1171 : 1)
1172 << 2;
1173 return;
1174 }
1175 // The second argument, if present, must be an unsigned integer.
1176 unsigned TypeSize =
1177 Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86_64
1178 ? 64
1179 : 32;
1180 if (NumParams == 2 &&
1181 (!getFunctionOrMethodParamType(D, 1)->isUnsignedIntegerType() ||
1182 Context.getTypeSize(getFunctionOrMethodParamType(D, 1)) != TypeSize)) {
1183 Diag(getFunctionOrMethodParamRange(D, 1).getBegin(),
1184 diag::err_anyx86_interrupt_attribute)
1185 << (Context.getTargetInfo().getTriple().getArch() == llvm::Triple::x86
1186 ? 0
1187 : 1)
1188 << 3 << Context.getIntTypeForBitwidth(TypeSize, /*Signed=*/false);
1189 return;
1190 }
1191 D->addAttr(::new (Context) AnyX86InterruptAttr(Context, AL));
1192 D->addAttr(UsedAttr::CreateImplicit(Context));
1193 }
1194
1195 void SemaX86::handleForceAlignArgPointerAttr(Decl *D, const ParsedAttr &AL) {
1196 // If we try to apply it to a function pointer, don't warn, but don't
1197 // do anything, either. It doesn't matter anyway, because there's nothing
1198 // special about calling a force_align_arg_pointer function.
1199 const auto *VD = dyn_cast<ValueDecl>(D);
1200 if (VD && VD->getType()->isFunctionPointerType())
1201 return;
1202 // Also don't warn on function pointer typedefs.
1203 const auto *TD = dyn_cast<TypedefNameDecl>(D);
1204 if (TD && (TD->getUnderlyingType()->isFunctionPointerType() ||
1205 TD->getUnderlyingType()->isFunctionType()))
1206 return;
1207 // Attribute can only be applied to function types.
1208 if (!isa<FunctionDecl>(D)) {
1209 Diag(AL.getLoc(), diag::warn_attribute_wrong_decl_type)
1210 << AL << AL.isRegularKeywordAttribute() << ExpectedFunction;
1211 return;
1212 }
1213
1214 D->addAttr(::new (getASTContext())
1215 X86ForceAlignArgPointerAttr(getASTContext(), AL));
1216 }
1217
1218 } // namespace clang
LLVM monorepo